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src/hotspot/cpu/x86/assembler_x86.hpp

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rev 50900 : [mq]: cleanup-asm.patch


1249   // takes a branch opcode (cc) and a label (L) and generates
1250   // either a backward branch or a forward branch and links it
1251   // to the label fixup chain. Usage:
1252   //
1253   // Label L;      // unbound label
1254   // jcc(cc, L);   // forward branch to unbound label
1255   // bind(L);      // bind label to the current pc
1256   // jcc(cc, L);   // backward branch to bound label
1257   // bind(L);      // illegal: a label may be bound only once
1258   //
1259   // Note: The same Label can be used for forward and backward branches
1260   // but it may be bound only once.
1261 
1262   void jcc(Condition cc, Label& L, bool maybe_short = true);
1263 
1264   // Conditional jump to a 8-bit offset to L.
1265   // WARNING: be very careful using this for forward jumps.  If the label is
1266   // not bound within an 8-bit offset of this instruction, a run-time error
1267   // will occur.
1268   void jccb(Condition cc, Label& L);
1269   void jccb_if_possible(Condition cc, Label& L);
1270 
1271   void jmp(Address entry);    // pc <- entry
1272 
1273   // Label operations & relative jumps (PPUM Appendix D)
1274   void jmp(Label& L, bool maybe_short = true);   // unconditional jump to L
1275 
1276   void jmp(Register entry); // pc <- entry
1277 
1278   // Unconditional 8-bit offset jump to L.
1279   // WARNING: be very careful using this for forward jumps.  If the label is
1280   // not bound within an 8-bit offset of this instruction, a run-time error
1281   // will occur.
1282   void jmpb(Label& L);
1283   void jmpb_if_possible(Label& L);
1284 
1285   void ldmxcsr( Address src );
1286 
1287   void leal(Register dst, Address src);
1288 
1289   void leaq(Register dst, Address src);
1290 
1291   void lfence();
1292 
1293   void lock();
1294 
1295   void lzcntl(Register dst, Register src);
1296 
1297 #ifdef _LP64
1298   void lzcntq(Register dst, Register src);
1299 #endif
1300 
1301   enum Membar_mask_bits {
1302     StoreStore = 1 << 3,
1303     LoadStore  = 1 << 2,




1249   // takes a branch opcode (cc) and a label (L) and generates
1250   // either a backward branch or a forward branch and links it
1251   // to the label fixup chain. Usage:
1252   //
1253   // Label L;      // unbound label
1254   // jcc(cc, L);   // forward branch to unbound label
1255   // bind(L);      // bind label to the current pc
1256   // jcc(cc, L);   // backward branch to bound label
1257   // bind(L);      // illegal: a label may be bound only once
1258   //
1259   // Note: The same Label can be used for forward and backward branches
1260   // but it may be bound only once.
1261 
1262   void jcc(Condition cc, Label& L, bool maybe_short = true);
1263 
1264   // Conditional jump to a 8-bit offset to L.
1265   // WARNING: be very careful using this for forward jumps.  If the label is
1266   // not bound within an 8-bit offset of this instruction, a run-time error
1267   // will occur.
1268   void jccb(Condition cc, Label& L);

1269 
1270   void jmp(Address entry);    // pc <- entry
1271 
1272   // Label operations & relative jumps (PPUM Appendix D)
1273   void jmp(Label& L, bool maybe_short = true);   // unconditional jump to L
1274 
1275   void jmp(Register entry); // pc <- entry
1276 
1277   // Unconditional 8-bit offset jump to L.
1278   // WARNING: be very careful using this for forward jumps.  If the label is
1279   // not bound within an 8-bit offset of this instruction, a run-time error
1280   // will occur.
1281   void jmpb(Label& L);

1282 
1283   void ldmxcsr( Address src );
1284 
1285   void leal(Register dst, Address src);
1286 
1287   void leaq(Register dst, Address src);
1288 
1289   void lfence();
1290 
1291   void lock();
1292 
1293   void lzcntl(Register dst, Register src);
1294 
1295 #ifdef _LP64
1296   void lzcntq(Register dst, Register src);
1297 #endif
1298 
1299   enum Membar_mask_bits {
1300     StoreStore = 1 << 3,
1301     LoadStore  = 1 << 2,


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