1 /*
2 * Copyright (c) 2005, 2018, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2014, Red Hat Inc. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "precompiled.hpp"
27 #include "asm/macroAssembler.inline.hpp"
28 #include "c1/c1_Compilation.hpp"
29 #include "c1/c1_FrameMap.hpp"
30 #include "c1/c1_Instruction.hpp"
31 #include "c1/c1_LIRAssembler.hpp"
32 #include "c1/c1_LIRGenerator.hpp"
33 #include "c1/c1_Runtime1.hpp"
34 #include "c1/c1_ValueStack.hpp"
35 #include "ci/ciArray.hpp"
36 #include "ci/ciObjArrayKlass.hpp"
37 #include "ci/ciTypeArrayKlass.hpp"
38 #include "runtime/sharedRuntime.hpp"
39 #include "runtime/stubRoutines.hpp"
40 #include "vmreg_aarch64.inline.hpp"
41
42 #ifdef ASSERT
43 #define __ gen()->lir(__FILE__, __LINE__)->
44 #else
45 #define __ gen()->lir()->
46 #endif
47
48 // Item will be loaded into a byte register; Intel only
49 void LIRItem::load_byte_item() {
50 load_item();
51 }
52
53
54 void LIRItem::load_nonconstant() {
55 LIR_Opr r = value()->operand();
56 if (r->is_constant()) {
57 _result = r;
58 } else {
59 load_item();
60 }
61 }
62
63 //--------------------------------------------------------------
64 // LIRGenerator
65 //--------------------------------------------------------------
66
67
68 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::r0_oop_opr; }
69 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::r3_opr; }
70 LIR_Opr LIRGenerator::divInOpr() { Unimplemented(); return LIR_OprFact::illegalOpr; }
71 LIR_Opr LIRGenerator::divOutOpr() { Unimplemented(); return LIR_OprFact::illegalOpr; }
72 LIR_Opr LIRGenerator::remOutOpr() { Unimplemented(); return LIR_OprFact::illegalOpr; }
73 LIR_Opr LIRGenerator::shiftCountOpr() { Unimplemented(); return LIR_OprFact::illegalOpr; }
74 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); }
75 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::r0_opr; }
76 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
77
78
79 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
80 LIR_Opr opr;
81 switch (type->tag()) {
82 case intTag: opr = FrameMap::r0_opr; break;
83 case objectTag: opr = FrameMap::r0_oop_opr; break;
84 case longTag: opr = FrameMap::long0_opr; break;
85 case floatTag: opr = FrameMap::fpu0_float_opr; break;
86 case doubleTag: opr = FrameMap::fpu0_double_opr; break;
87
88 case addressTag:
89 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
90 }
91
92 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
93 return opr;
94 }
95
96
97 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
98 LIR_Opr reg = new_register(T_INT);
99 set_vreg_flag(reg, LIRGenerator::byte_reg);
100 return reg;
101 }
102
103
104 //--------- loading items into registers --------------------------------
105
106
107 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
108 if (v->type()->as_IntConstant() != NULL) {
109 return v->type()->as_IntConstant()->value() == 0L;
110 } else if (v->type()->as_LongConstant() != NULL) {
111 return v->type()->as_LongConstant()->value() == 0L;
112 } else if (v->type()->as_ObjectConstant() != NULL) {
113 return v->type()->as_ObjectConstant()->value()->is_null_object();
114 } else {
115 return false;
116 }
117 }
118
119 bool LIRGenerator::can_inline_as_constant(Value v) const {
120 // FIXME: Just a guess
121 if (v->type()->as_IntConstant() != NULL) {
122 return Assembler::operand_valid_for_add_sub_immediate(v->type()->as_IntConstant()->value());
123 } else if (v->type()->as_LongConstant() != NULL) {
124 return v->type()->as_LongConstant()->value() == 0L;
125 } else if (v->type()->as_ObjectConstant() != NULL) {
126 return v->type()->as_ObjectConstant()->value()->is_null_object();
127 } else {
128 return false;
129 }
130 }
131
132
133 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const { return false; }
134
135
136 LIR_Opr LIRGenerator::safepoint_poll_register() {
137 return LIR_OprFact::illegalOpr;
138 }
139
140
141 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
142 int shift, int disp, BasicType type) {
143 assert(base->is_register(), "must be");
144 intx large_disp = disp;
145
146 // accumulate fixed displacements
147 if (index->is_constant()) {
148 LIR_Const *constant = index->as_constant_ptr();
149 if (constant->type() == T_INT) {
150 large_disp += index->as_jint() << shift;
151 } else {
152 assert(constant->type() == T_LONG, "should be");
153 jlong c = index->as_jlong() << shift;
154 if ((jlong)((jint)c) == c) {
155 large_disp += c;
156 index = LIR_OprFact::illegalOpr;
157 } else {
158 LIR_Opr tmp = new_register(T_LONG);
159 __ move(index, tmp);
160 index = tmp;
161 // apply shift and displacement below
162 }
163 }
164 }
165
166 if (index->is_register()) {
167 // apply the shift and accumulate the displacement
168 if (shift > 0) {
169 LIR_Opr tmp = new_pointer_register();
170 __ shift_left(index, shift, tmp);
171 index = tmp;
172 }
173 if (large_disp != 0) {
174 LIR_Opr tmp = new_pointer_register();
175 if (Assembler::operand_valid_for_add_sub_immediate(large_disp)) {
176 __ add(tmp, tmp, LIR_OprFact::intptrConst(large_disp));
177 index = tmp;
178 } else {
179 __ move(tmp, LIR_OprFact::intptrConst(large_disp));
180 __ add(tmp, index, tmp);
181 index = tmp;
182 }
183 large_disp = 0;
184 }
185 } else if (large_disp != 0 && !Address::offset_ok_for_immed(large_disp, shift)) {
186 // index is illegal so replace it with the displacement loaded into a register
187 index = new_pointer_register();
188 __ move(LIR_OprFact::intptrConst(large_disp), index);
189 large_disp = 0;
190 }
191
192 // at this point we either have base + index or base + displacement
193 if (large_disp == 0) {
194 return new LIR_Address(base, index, type);
195 } else {
196 assert(Address::offset_ok_for_immed(large_disp, 0), "must be");
197 return new LIR_Address(base, large_disp, type);
198 }
199 }
200
201 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
202 BasicType type) {
203 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
204 int elem_size = type2aelembytes(type);
205 int shift = exact_log2(elem_size);
206
207 LIR_Address* addr;
208 if (index_opr->is_constant()) {
209 addr = new LIR_Address(array_opr,
210 offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type);
211 } else {
212 if (offset_in_bytes) {
213 LIR_Opr tmp = new_pointer_register();
214 __ add(array_opr, LIR_OprFact::intConst(offset_in_bytes), tmp);
215 array_opr = tmp;
216 offset_in_bytes = 0;
217 }
218 addr = new LIR_Address(array_opr,
219 index_opr,
220 LIR_Address::scale(type),
221 offset_in_bytes, type);
222 }
223 return addr;
224 }
225
226 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
227 LIR_Opr r;
228 if (type == T_LONG) {
229 r = LIR_OprFact::longConst(x);
230 if (!Assembler::operand_valid_for_logical_immediate(false, x)) {
231 LIR_Opr tmp = new_register(type);
232 __ move(r, tmp);
233 return tmp;
234 }
235 } else if (type == T_INT) {
236 r = LIR_OprFact::intConst(x);
237 if (!Assembler::operand_valid_for_logical_immediate(true, x)) {
238 // This is all rather nasty. We don't know whether our constant
239 // is required for a logical or an arithmetic operation, wo we
240 // don't know what the range of valid values is!!
241 LIR_Opr tmp = new_register(type);
242 __ move(r, tmp);
243 return tmp;
244 }
245 } else {
246 ShouldNotReachHere();
247 r = NULL; // unreachable
248 }
249 return r;
250 }
251
252
253
254 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
255 LIR_Opr pointer = new_pointer_register();
256 __ move(LIR_OprFact::intptrConst(counter), pointer);
257 LIR_Address* addr = new LIR_Address(pointer, type);
258 increment_counter(addr, step);
259 }
260
261
262 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
263 LIR_Opr imm = NULL;
264 switch(addr->type()) {
265 case T_INT:
266 imm = LIR_OprFact::intConst(step);
267 break;
268 case T_LONG:
269 imm = LIR_OprFact::longConst(step);
270 break;
271 default:
272 ShouldNotReachHere();
273 }
274 LIR_Opr reg = new_register(addr->type());
275 __ load(addr, reg);
276 __ add(reg, imm, reg);
277 __ store(reg, addr);
278 }
279
280 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
281 LIR_Opr reg = new_register(T_INT);
282 __ load(generate_address(base, disp, T_INT), reg, info);
283 __ cmp(condition, reg, LIR_OprFact::intConst(c));
284 }
285
286 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
287 LIR_Opr reg1 = new_register(T_INT);
288 __ load(generate_address(base, disp, type), reg1, info);
289 __ cmp(condition, reg, reg1);
290 }
291
292
293 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
294
295 if (is_power_of_2(c - 1)) {
296 __ shift_left(left, exact_log2(c - 1), tmp);
297 __ add(tmp, left, result);
298 return true;
299 } else if (is_power_of_2(c + 1)) {
300 __ shift_left(left, exact_log2(c + 1), tmp);
301 __ sub(tmp, left, result);
302 return true;
303 } else {
304 return false;
305 }
306 }
307
308 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
309 BasicType type = item->type();
310 __ store(item, new LIR_Address(FrameMap::sp_opr, in_bytes(offset_from_sp), type));
311 }
312
313 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
314 LIR_Opr tmp1 = new_register(objectType);
315 LIR_Opr tmp2 = new_register(objectType);
316 LIR_Opr tmp3 = new_register(objectType);
317 __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
318 }
319
320 //----------------------------------------------------------------------
321 // visitor functions
322 //----------------------------------------------------------------------
323
324 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
325 assert(x->is_pinned(),"");
326 LIRItem obj(x->obj(), this);
327 obj.load_item();
328
329 set_no_result(x);
330
331 // "lock" stores the address of the monitor stack slot, so this is not an oop
332 LIR_Opr lock = new_register(T_INT);
333 // Need a scratch register for biased locking
334 LIR_Opr scratch = LIR_OprFact::illegalOpr;
335 if (UseBiasedLocking) {
336 scratch = new_register(T_INT);
337 }
338
339 CodeEmitInfo* info_for_exception = NULL;
340 if (x->needs_null_check()) {
341 info_for_exception = state_for(x);
342 }
343 // this CodeEmitInfo must not have the xhandlers because here the
344 // object is already locked (xhandlers expect object to be unlocked)
345 CodeEmitInfo* info = state_for(x, x->state(), true);
346 monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
347 x->monitor_no(), info_for_exception, info);
348 }
349
350
351 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
352 assert(x->is_pinned(),"");
353
354 LIRItem obj(x->obj(), this);
355 obj.dont_load_item();
356
357 LIR_Opr lock = new_register(T_INT);
358 LIR_Opr obj_temp = new_register(T_INT);
359 set_no_result(x);
360 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
361 }
362
363
364 void LIRGenerator::do_NegateOp(NegateOp* x) {
365
366 LIRItem from(x->x(), this);
367 from.load_item();
368 LIR_Opr result = rlock_result(x);
369 __ negate (from.result(), result);
370
371 }
372
373 // for _fadd, _fmul, _fsub, _fdiv, _frem
374 // _dadd, _dmul, _dsub, _ddiv, _drem
375 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
376
377 if (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem) {
378 // float remainder is implemented as a direct call into the runtime
379 LIRItem right(x->x(), this);
380 LIRItem left(x->y(), this);
381
382 BasicTypeList signature(2);
383 if (x->op() == Bytecodes::_frem) {
384 signature.append(T_FLOAT);
385 signature.append(T_FLOAT);
386 } else {
387 signature.append(T_DOUBLE);
388 signature.append(T_DOUBLE);
389 }
390 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
391
392 const LIR_Opr result_reg = result_register_for(x->type());
393 left.load_item_force(cc->at(1));
394 right.load_item();
395
396 __ move(right.result(), cc->at(0));
397
398 address entry;
399 if (x->op() == Bytecodes::_frem) {
400 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
401 } else {
402 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
403 }
404
405 LIR_Opr result = rlock_result(x);
406 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
407 __ move(result_reg, result);
408
409 return;
410 }
411
412 LIRItem left(x->x(), this);
413 LIRItem right(x->y(), this);
414 LIRItem* left_arg = &left;
415 LIRItem* right_arg = &right;
416
417 // Always load right hand side.
418 right.load_item();
419
420 if (!left.is_register())
421 left.load_item();
422
423 LIR_Opr reg = rlock(x);
424 LIR_Opr tmp = LIR_OprFact::illegalOpr;
425 if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) {
426 tmp = new_register(T_DOUBLE);
427 }
428
429 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), NULL);
430
431 set_result(x, round_item(reg));
432 }
433
434 // for _ladd, _lmul, _lsub, _ldiv, _lrem
435 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
436
437 // missing test if instr is commutative and if we should swap
438 LIRItem left(x->x(), this);
439 LIRItem right(x->y(), this);
440
441 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem) {
442
443 // the check for division by zero destroys the right operand
444 right.set_destroys_register();
445
446 // check for division by zero (destroys registers of right operand!)
447 CodeEmitInfo* info = state_for(x);
448
449 left.load_item();
450 right.load_item();
451
452 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
453 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
454
455 rlock_result(x);
456 switch (x->op()) {
457 case Bytecodes::_lrem:
458 __ rem (left.result(), right.result(), x->operand());
459 break;
460 case Bytecodes::_ldiv:
461 __ div (left.result(), right.result(), x->operand());
462 break;
463 default:
464 ShouldNotReachHere();
465 break;
466 }
467
468
469 } else {
470 assert (x->op() == Bytecodes::_lmul || x->op() == Bytecodes::_ladd || x->op() == Bytecodes::_lsub,
471 "expect lmul, ladd or lsub");
472 // add, sub, mul
473 left.load_item();
474 if (! right.is_register()) {
475 if (x->op() == Bytecodes::_lmul
476 || ! right.is_constant()
477 || ! Assembler::operand_valid_for_add_sub_immediate(right.get_jlong_constant())) {
478 right.load_item();
479 } else { // add, sub
480 assert (x->op() == Bytecodes::_ladd || x->op() == Bytecodes::_lsub, "expect ladd or lsub");
481 // don't load constants to save register
482 right.load_nonconstant();
483 }
484 }
485 rlock_result(x);
486 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
487 }
488 }
489
490 // for: _iadd, _imul, _isub, _idiv, _irem
491 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
492
493 // Test if instr is commutative and if we should swap
494 LIRItem left(x->x(), this);
495 LIRItem right(x->y(), this);
496 LIRItem* left_arg = &left;
497 LIRItem* right_arg = &right;
498 if (x->is_commutative() && left.is_stack() && right.is_register()) {
499 // swap them if left is real stack (or cached) and right is real register(not cached)
500 left_arg = &right;
501 right_arg = &left;
502 }
503
504 left_arg->load_item();
505
506 // do not need to load right, as we can handle stack and constants
507 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
508
509 right_arg->load_item();
510 rlock_result(x);
511
512 CodeEmitInfo* info = state_for(x);
513 LIR_Opr tmp = new_register(T_INT);
514 __ cmp(lir_cond_equal, right_arg->result(), LIR_OprFact::longConst(0));
515 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
516 info = state_for(x);
517
518 if (x->op() == Bytecodes::_irem) {
519 __ irem(left_arg->result(), right_arg->result(), x->operand(), tmp, NULL);
520 } else if (x->op() == Bytecodes::_idiv) {
521 __ idiv(left_arg->result(), right_arg->result(), x->operand(), tmp, NULL);
522 }
523
524 } else if (x->op() == Bytecodes::_iadd || x->op() == Bytecodes::_isub) {
525 if (right.is_constant()
526 && Assembler::operand_valid_for_add_sub_immediate(right.get_jint_constant())) {
527 right.load_nonconstant();
528 } else {
529 right.load_item();
530 }
531 rlock_result(x);
532 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), LIR_OprFact::illegalOpr);
533 } else {
534 assert (x->op() == Bytecodes::_imul, "expect imul");
535 if (right.is_constant()) {
536 jint c = right.get_jint_constant();
537 if (c > 0 && c < max_jint && (is_power_of_2(c) || is_power_of_2(c - 1) || is_power_of_2(c + 1))) {
538 right_arg->dont_load_item();
539 } else {
540 // Cannot use constant op.
541 right_arg->load_item();
542 }
543 } else {
544 right.load_item();
545 }
546 rlock_result(x);
547 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), new_register(T_INT));
548 }
549 }
550
551 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
552 // when an operand with use count 1 is the left operand, then it is
553 // likely that no move for 2-operand-LIR-form is necessary
554 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
555 x->swap_operands();
556 }
557
558 ValueTag tag = x->type()->tag();
559 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
560 switch (tag) {
561 case floatTag:
562 case doubleTag: do_ArithmeticOp_FPU(x); return;
563 case longTag: do_ArithmeticOp_Long(x); return;
564 case intTag: do_ArithmeticOp_Int(x); return;
565 }
566 ShouldNotReachHere();
567 }
568
569 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
570 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
571
572 LIRItem left(x->x(), this);
573 LIRItem right(x->y(), this);
574
575 left.load_item();
576
577 rlock_result(x);
578 if (right.is_constant()) {
579 right.dont_load_item();
580
581 switch (x->op()) {
582 case Bytecodes::_ishl: {
583 int c = right.get_jint_constant() & 0x1f;
584 __ shift_left(left.result(), c, x->operand());
585 break;
586 }
587 case Bytecodes::_ishr: {
588 int c = right.get_jint_constant() & 0x1f;
589 __ shift_right(left.result(), c, x->operand());
590 break;
591 }
592 case Bytecodes::_iushr: {
593 int c = right.get_jint_constant() & 0x1f;
594 __ unsigned_shift_right(left.result(), c, x->operand());
595 break;
596 }
597 case Bytecodes::_lshl: {
598 int c = right.get_jint_constant() & 0x3f;
599 __ shift_left(left.result(), c, x->operand());
600 break;
601 }
602 case Bytecodes::_lshr: {
603 int c = right.get_jint_constant() & 0x3f;
604 __ shift_right(left.result(), c, x->operand());
605 break;
606 }
607 case Bytecodes::_lushr: {
608 int c = right.get_jint_constant() & 0x3f;
609 __ unsigned_shift_right(left.result(), c, x->operand());
610 break;
611 }
612 default:
613 ShouldNotReachHere();
614 }
615 } else {
616 right.load_item();
617 LIR_Opr tmp = new_register(T_INT);
618 switch (x->op()) {
619 case Bytecodes::_ishl: {
620 __ logical_and(right.result(), LIR_OprFact::intConst(0x1f), tmp);
621 __ shift_left(left.result(), tmp, x->operand(), tmp);
622 break;
623 }
624 case Bytecodes::_ishr: {
625 __ logical_and(right.result(), LIR_OprFact::intConst(0x1f), tmp);
626 __ shift_right(left.result(), tmp, x->operand(), tmp);
627 break;
628 }
629 case Bytecodes::_iushr: {
630 __ logical_and(right.result(), LIR_OprFact::intConst(0x1f), tmp);
631 __ unsigned_shift_right(left.result(), tmp, x->operand(), tmp);
632 break;
633 }
634 case Bytecodes::_lshl: {
635 __ logical_and(right.result(), LIR_OprFact::intConst(0x3f), tmp);
636 __ shift_left(left.result(), tmp, x->operand(), tmp);
637 break;
638 }
639 case Bytecodes::_lshr: {
640 __ logical_and(right.result(), LIR_OprFact::intConst(0x3f), tmp);
641 __ shift_right(left.result(), tmp, x->operand(), tmp);
642 break;
643 }
644 case Bytecodes::_lushr: {
645 __ logical_and(right.result(), LIR_OprFact::intConst(0x3f), tmp);
646 __ unsigned_shift_right(left.result(), tmp, x->operand(), tmp);
647 break;
648 }
649 default:
650 ShouldNotReachHere();
651 }
652 }
653 }
654
655 // _iand, _land, _ior, _lor, _ixor, _lxor
656 void LIRGenerator::do_LogicOp(LogicOp* x) {
657
658 LIRItem left(x->x(), this);
659 LIRItem right(x->y(), this);
660
661 left.load_item();
662
663 rlock_result(x);
664 if (right.is_constant()
665 && ((right.type()->tag() == intTag
666 && Assembler::operand_valid_for_logical_immediate(true, right.get_jint_constant()))
667 || (right.type()->tag() == longTag
668 && Assembler::operand_valid_for_logical_immediate(false, right.get_jlong_constant())))) {
669 right.dont_load_item();
670 } else {
671 right.load_item();
672 }
673 switch (x->op()) {
674 case Bytecodes::_iand:
675 case Bytecodes::_land:
676 __ logical_and(left.result(), right.result(), x->operand()); break;
677 case Bytecodes::_ior:
678 case Bytecodes::_lor:
679 __ logical_or (left.result(), right.result(), x->operand()); break;
680 case Bytecodes::_ixor:
681 case Bytecodes::_lxor:
682 __ logical_xor(left.result(), right.result(), x->operand()); break;
683 default: Unimplemented();
684 }
685 }
686
687 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
688 void LIRGenerator::do_CompareOp(CompareOp* x) {
689 LIRItem left(x->x(), this);
690 LIRItem right(x->y(), this);
691 ValueTag tag = x->x()->type()->tag();
692 if (tag == longTag) {
693 left.set_destroys_register();
694 }
695 left.load_item();
696 right.load_item();
697 LIR_Opr reg = rlock_result(x);
698
699 if (x->x()->type()->is_float_kind()) {
700 Bytecodes::Code code = x->op();
701 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
702 } else if (x->x()->type()->tag() == longTag) {
703 __ lcmp2int(left.result(), right.result(), reg);
704 } else {
705 Unimplemented();
706 }
707 }
708
709 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
710 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
711 new_value.load_item();
712 cmp_value.load_item();
713 if (type == T_OBJECT || type == T_ARRAY) {
714 __ cas_obj(addr, cmp_value.result(), new_value.result(), new_register(T_INT), new_register(T_INT));
715 } else if (type == T_INT) {
716 __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
717 } else if (type == T_LONG) {
718 __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
719 } else {
720 ShouldNotReachHere();
721 Unimplemented();
722 }
723 LIR_Opr result = new_register(T_INT);
724 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
725 result, type);
726 return result;
727 }
728
729 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
730 bool is_oop = type == T_OBJECT || type == T_ARRAY;
731 LIR_Opr result = new_register(type);
732 value.load_item();
733 assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type");
734 LIR_Opr tmp = new_register(T_INT);
735 __ xchg(addr, value.result(), result, tmp);
736 return result;
737 }
738
739 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
740 LIR_Opr result = new_register(type);
741 value.load_item();
742 assert(type == T_INT LP64_ONLY( || type == T_LONG ), "unexpected type");
743 LIR_Opr tmp = new_register(T_INT);
744 __ xadd(addr, value.result(), result, tmp);
745 return result;
746 }
747
748 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
749 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
750 if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog ||
751 x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos ||
752 x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan ||
753 x->id() == vmIntrinsics::_dlog10) {
754 do_LibmIntrinsic(x);
755 return;
756 }
757 switch (x->id()) {
758 case vmIntrinsics::_dabs:
759 case vmIntrinsics::_dsqrt: {
760 assert(x->number_of_arguments() == 1, "wrong type");
761 LIRItem value(x->argument_at(0), this);
762 value.load_item();
763 LIR_Opr dst = rlock_result(x);
764
765 switch (x->id()) {
766 case vmIntrinsics::_dsqrt: {
767 __ sqrt(value.result(), dst, LIR_OprFact::illegalOpr);
768 break;
769 }
770 case vmIntrinsics::_dabs: {
771 __ abs(value.result(), dst, LIR_OprFact::illegalOpr);
772 break;
773 }
774 }
775 break;
776 }
777 }
778 }
779
780 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
781 LIRItem value(x->argument_at(0), this);
782 value.set_destroys_register();
783
784 LIR_Opr calc_result = rlock_result(x);
785 LIR_Opr result_reg = result_register_for(x->type());
786
787 CallingConvention* cc = NULL;
788
789 if (x->id() == vmIntrinsics::_dpow) {
790 LIRItem value1(x->argument_at(1), this);
791
792 value1.set_destroys_register();
793
794 BasicTypeList signature(2);
795 signature.append(T_DOUBLE);
796 signature.append(T_DOUBLE);
797 cc = frame_map()->c_calling_convention(&signature);
798 value.load_item_force(cc->at(0));
799 value1.load_item_force(cc->at(1));
800 } else {
801 BasicTypeList signature(1);
802 signature.append(T_DOUBLE);
803 cc = frame_map()->c_calling_convention(&signature);
804 value.load_item_force(cc->at(0));
805 }
806
807 switch (x->id()) {
808 case vmIntrinsics::_dexp:
809 if (StubRoutines::dexp() != NULL) {
810 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
811 } else {
812 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
813 }
814 break;
815 case vmIntrinsics::_dlog:
816 if (StubRoutines::dlog() != NULL) {
817 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
818 } else {
819 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
820 }
821 break;
822 case vmIntrinsics::_dlog10:
823 if (StubRoutines::dlog10() != NULL) {
824 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
825 } else {
826 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
827 }
828 break;
829 case vmIntrinsics::_dpow:
830 if (StubRoutines::dpow() != NULL) {
831 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
832 } else {
833 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
834 }
835 break;
836 case vmIntrinsics::_dsin:
837 if (StubRoutines::dsin() != NULL) {
838 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
839 } else {
840 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
841 }
842 break;
843 case vmIntrinsics::_dcos:
844 if (StubRoutines::dcos() != NULL) {
845 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
846 } else {
847 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
848 }
849 break;
850 case vmIntrinsics::_dtan:
851 if (StubRoutines::dtan() != NULL) {
852 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
853 } else {
854 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
855 }
856 break;
857 default: ShouldNotReachHere();
858 }
859 __ move(result_reg, calc_result);
860 }
861
862
863 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
864 assert(x->number_of_arguments() == 5, "wrong type");
865
866 // Make all state_for calls early since they can emit code
867 CodeEmitInfo* info = state_for(x, x->state());
868
869 LIRItem src(x->argument_at(0), this);
870 LIRItem src_pos(x->argument_at(1), this);
871 LIRItem dst(x->argument_at(2), this);
872 LIRItem dst_pos(x->argument_at(3), this);
873 LIRItem length(x->argument_at(4), this);
874
875 // operands for arraycopy must use fixed registers, otherwise
876 // LinearScan will fail allocation (because arraycopy always needs a
877 // call)
878
879 // The java calling convention will give us enough registers
880 // so that on the stub side the args will be perfect already.
881 // On the other slow/special case side we call C and the arg
882 // positions are not similar enough to pick one as the best.
883 // Also because the java calling convention is a "shifted" version
884 // of the C convention we can process the java args trivially into C
885 // args without worry of overwriting during the xfer
886
887 src.load_item_force (FrameMap::as_oop_opr(j_rarg0));
888 src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
889 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2));
890 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
891 length.load_item_force (FrameMap::as_opr(j_rarg4));
892
893 LIR_Opr tmp = FrameMap::as_opr(j_rarg5);
894
895 set_no_result(x);
896
897 int flags;
898 ciArrayKlass* expected_type;
899 arraycopy_helper(x, &flags, &expected_type);
900
901 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
902 }
903
904 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
905 assert(UseCRC32Intrinsics, "why are we here?");
906 // Make all state_for calls early since they can emit code
907 LIR_Opr result = rlock_result(x);
908 int flags = 0;
909 switch (x->id()) {
910 case vmIntrinsics::_updateCRC32: {
911 LIRItem crc(x->argument_at(0), this);
912 LIRItem val(x->argument_at(1), this);
913 // val is destroyed by update_crc32
914 val.set_destroys_register();
915 crc.load_item();
916 val.load_item();
917 __ update_crc32(crc.result(), val.result(), result);
918 break;
919 }
920 case vmIntrinsics::_updateBytesCRC32:
921 case vmIntrinsics::_updateByteBufferCRC32: {
922 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
923
924 LIRItem crc(x->argument_at(0), this);
925 LIRItem buf(x->argument_at(1), this);
926 LIRItem off(x->argument_at(2), this);
927 LIRItem len(x->argument_at(3), this);
928 buf.load_item();
929 off.load_nonconstant();
930
931 LIR_Opr index = off.result();
932 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
933 if(off.result()->is_constant()) {
934 index = LIR_OprFact::illegalOpr;
935 offset += off.result()->as_jint();
936 }
937 LIR_Opr base_op = buf.result();
938
939 if (index->is_valid()) {
940 LIR_Opr tmp = new_register(T_LONG);
941 __ convert(Bytecodes::_i2l, index, tmp);
942 index = tmp;
943 }
944
945 if (is_updateBytes) {
946 base_op = access_resolve_for_read(IN_HEAP, base_op, NULL);
947 }
948
949 if (offset) {
950 LIR_Opr tmp = new_pointer_register();
951 __ add(base_op, LIR_OprFact::intConst(offset), tmp);
952 base_op = tmp;
953 offset = 0;
954 }
955
956 LIR_Address* a = new LIR_Address(base_op,
957 index,
958 offset,
959 T_BYTE);
960 BasicTypeList signature(3);
961 signature.append(T_INT);
962 signature.append(T_ADDRESS);
963 signature.append(T_INT);
964 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
965 const LIR_Opr result_reg = result_register_for(x->type());
966
967 LIR_Opr addr = new_pointer_register();
968 __ leal(LIR_OprFact::address(a), addr);
969
970 crc.load_item_force(cc->at(0));
971 __ move(addr, cc->at(1));
972 len.load_item_force(cc->at(2));
973
974 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
975 __ move(result_reg, result);
976
977 break;
978 }
979 default: {
980 ShouldNotReachHere();
981 }
982 }
983 }
984
985 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
986 assert(UseCRC32CIntrinsics, "why are we here?");
987 // Make all state_for calls early since they can emit code
988 LIR_Opr result = rlock_result(x);
989 int flags = 0;
990 switch (x->id()) {
991 case vmIntrinsics::_updateBytesCRC32C:
992 case vmIntrinsics::_updateDirectByteBufferCRC32C: {
993 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32C);
994 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
995
996 LIRItem crc(x->argument_at(0), this);
997 LIRItem buf(x->argument_at(1), this);
998 LIRItem off(x->argument_at(2), this);
999 LIRItem end(x->argument_at(3), this);
1000
1001 buf.load_item();
1002 off.load_nonconstant();
1003 end.load_nonconstant();
1004
1005 // len = end - off
1006 LIR_Opr len = end.result();
1007 LIR_Opr tmpA = new_register(T_INT);
1008 LIR_Opr tmpB = new_register(T_INT);
1009 __ move(end.result(), tmpA);
1010 __ move(off.result(), tmpB);
1011 __ sub(tmpA, tmpB, tmpA);
1012 len = tmpA;
1013
1014 LIR_Opr index = off.result();
1015 if(off.result()->is_constant()) {
1016 index = LIR_OprFact::illegalOpr;
1017 offset += off.result()->as_jint();
1018 }
1019 LIR_Opr base_op = buf.result();
1020
1021 if (index->is_valid()) {
1022 LIR_Opr tmp = new_register(T_LONG);
1023 __ convert(Bytecodes::_i2l, index, tmp);
1024 index = tmp;
1025 }
1026
1027 if (offset) {
1028 LIR_Opr tmp = new_pointer_register();
1029 __ add(base_op, LIR_OprFact::intConst(offset), tmp);
1030 base_op = tmp;
1031 offset = 0;
1032 }
1033
1034 LIR_Address* a = new LIR_Address(base_op,
1035 index,
1036 offset,
1037 T_BYTE);
1038 BasicTypeList signature(3);
1039 signature.append(T_INT);
1040 signature.append(T_ADDRESS);
1041 signature.append(T_INT);
1042 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1043 const LIR_Opr result_reg = result_register_for(x->type());
1044
1045 LIR_Opr addr = new_pointer_register();
1046 __ leal(LIR_OprFact::address(a), addr);
1047
1048 crc.load_item_force(cc->at(0));
1049 __ move(addr, cc->at(1));
1050 __ move(len, cc->at(2));
1051
1052 __ call_runtime_leaf(StubRoutines::updateBytesCRC32C(), getThreadTemp(), result_reg, cc->args());
1053 __ move(result_reg, result);
1054
1055 break;
1056 }
1057 default: {
1058 ShouldNotReachHere();
1059 }
1060 }
1061 }
1062
1063 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
1064 assert(x->number_of_arguments() == 3, "wrong type");
1065 assert(UseFMA, "Needs FMA instructions support.");
1066 LIRItem value(x->argument_at(0), this);
1067 LIRItem value1(x->argument_at(1), this);
1068 LIRItem value2(x->argument_at(2), this);
1069
1070 value.load_item();
1071 value1.load_item();
1072 value2.load_item();
1073
1074 LIR_Opr calc_input = value.result();
1075 LIR_Opr calc_input1 = value1.result();
1076 LIR_Opr calc_input2 = value2.result();
1077 LIR_Opr calc_result = rlock_result(x);
1078
1079 switch (x->id()) {
1080 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
1081 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
1082 default: ShouldNotReachHere();
1083 }
1084 }
1085
1086 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1087 fatal("vectorizedMismatch intrinsic is not implemented on this platform");
1088 }
1089
1090 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
1091 // _i2b, _i2c, _i2s
1092 void LIRGenerator::do_Convert(Convert* x) {
1093 LIRItem value(x->value(), this);
1094 value.load_item();
1095 LIR_Opr input = value.result();
1096 LIR_Opr result = rlock(x);
1097
1098 // arguments of lir_convert
1099 LIR_Opr conv_input = input;
1100 LIR_Opr conv_result = result;
1101 ConversionStub* stub = NULL;
1102
1103 __ convert(x->op(), conv_input, conv_result);
1104
1105 assert(result->is_virtual(), "result must be virtual register");
1106 set_result(x, result);
1107 }
1108
1109 void LIRGenerator::do_NewInstance(NewInstance* x) {
1110 #ifndef PRODUCT
1111 if (PrintNotLoaded && !x->klass()->is_loaded()) {
1112 tty->print_cr(" ###class not loaded at new bci %d", x->printable_bci());
1113 }
1114 #endif
1115 CodeEmitInfo* info = state_for(x, x->state());
1116 LIR_Opr reg = result_register_for(x->type());
1117 new_instance(reg, x->klass(), x->is_unresolved(),
1118 FrameMap::r2_oop_opr,
1119 FrameMap::r5_oop_opr,
1120 FrameMap::r4_oop_opr,
1121 LIR_OprFact::illegalOpr,
1122 FrameMap::r3_metadata_opr, info);
1123 LIR_Opr result = rlock_result(x);
1124 __ move(reg, result);
1125 }
1126
1127 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1128 CodeEmitInfo* info = state_for(x, x->state());
1129
1130 LIRItem length(x->length(), this);
1131 length.load_item_force(FrameMap::r19_opr);
1132
1133 LIR_Opr reg = result_register_for(x->type());
1134 LIR_Opr tmp1 = FrameMap::r2_oop_opr;
1135 LIR_Opr tmp2 = FrameMap::r4_oop_opr;
1136 LIR_Opr tmp3 = FrameMap::r5_oop_opr;
1137 LIR_Opr tmp4 = reg;
1138 LIR_Opr klass_reg = FrameMap::r3_metadata_opr;
1139 LIR_Opr len = length.result();
1140 BasicType elem_type = x->elt_type();
1141
1142 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1143
1144 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1145 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1146
1147 LIR_Opr result = rlock_result(x);
1148 __ move(reg, result);
1149 }
1150
1151 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1152 LIRItem length(x->length(), this);
1153 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1154 // and therefore provide the state before the parameters have been consumed
1155 CodeEmitInfo* patching_info = NULL;
1156 if (!x->klass()->is_loaded() || PatchALot) {
1157 patching_info = state_for(x, x->state_before());
1158 }
1159
1160 CodeEmitInfo* info = state_for(x, x->state());
1161
1162 LIR_Opr reg = result_register_for(x->type());
1163 LIR_Opr tmp1 = FrameMap::r2_oop_opr;
1164 LIR_Opr tmp2 = FrameMap::r4_oop_opr;
1165 LIR_Opr tmp3 = FrameMap::r5_oop_opr;
1166 LIR_Opr tmp4 = reg;
1167 LIR_Opr klass_reg = FrameMap::r3_metadata_opr;
1168
1169 length.load_item_force(FrameMap::r19_opr);
1170 LIR_Opr len = length.result();
1171
1172 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1173 ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass());
1174 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1175 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1176 }
1177 klass2reg_with_patching(klass_reg, obj, patching_info);
1178 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1179
1180 LIR_Opr result = rlock_result(x);
1181 __ move(reg, result);
1182 }
1183
1184
1185 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1186 Values* dims = x->dims();
1187 int i = dims->length();
1188 LIRItemList* items = new LIRItemList(i, i, NULL);
1189 while (i-- > 0) {
1190 LIRItem* size = new LIRItem(dims->at(i), this);
1191 items->at_put(i, size);
1192 }
1193
1194 // Evaluate state_for early since it may emit code.
1195 CodeEmitInfo* patching_info = NULL;
1196 if (!x->klass()->is_loaded() || PatchALot) {
1197 patching_info = state_for(x, x->state_before());
1198
1199 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1200 // clone all handlers (NOTE: Usually this is handled transparently
1201 // by the CodeEmitInfo cloning logic in CodeStub constructors but
1202 // is done explicitly here because a stub isn't being used).
1203 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1204 }
1205 CodeEmitInfo* info = state_for(x, x->state());
1206
1207 i = dims->length();
1208 while (i-- > 0) {
1209 LIRItem* size = items->at(i);
1210 size->load_item();
1211
1212 store_stack_parameter(size->result(), in_ByteSize(i*4));
1213 }
1214
1215 LIR_Opr klass_reg = FrameMap::r0_metadata_opr;
1216 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1217
1218 LIR_Opr rank = FrameMap::r19_opr;
1219 __ move(LIR_OprFact::intConst(x->rank()), rank);
1220 LIR_Opr varargs = FrameMap::r2_opr;
1221 __ move(FrameMap::sp_opr, varargs);
1222 LIR_OprList* args = new LIR_OprList(3);
1223 args->append(klass_reg);
1224 args->append(rank);
1225 args->append(varargs);
1226 LIR_Opr reg = result_register_for(x->type());
1227 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1228 LIR_OprFact::illegalOpr,
1229 reg, args, info);
1230
1231 LIR_Opr result = rlock_result(x);
1232 __ move(reg, result);
1233 }
1234
1235 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1236 // nothing to do for now
1237 }
1238
1239 void LIRGenerator::do_CheckCast(CheckCast* x) {
1240 LIRItem obj(x->obj(), this);
1241
1242 CodeEmitInfo* patching_info = NULL;
1243 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) {
1244 // must do this before locking the destination register as an oop register,
1245 // and before the obj is loaded (the latter is for deoptimization)
1246 patching_info = state_for(x, x->state_before());
1247 }
1248 obj.load_item();
1249
1250 // info for exceptions
1251 CodeEmitInfo* info_for_exception =
1252 (x->needs_exception_state() ? state_for(x) :
1253 state_for(x, x->state_before(), true /*ignore_xhandler*/));
1254
1255 CodeStub* stub;
1256 if (x->is_incompatible_class_change_check()) {
1257 assert(patching_info == NULL, "can't patch this");
1258 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1259 } else if (x->is_invokespecial_receiver_check()) {
1260 assert(patching_info == NULL, "can't patch this");
1261 stub = new DeoptimizeStub(info_for_exception,
1262 Deoptimization::Reason_class_check,
1263 Deoptimization::Action_none);
1264 } else {
1265 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1266 }
1267 LIR_Opr reg = rlock_result(x);
1268 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1269 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1270 tmp3 = new_register(objectType);
1271 }
1272 __ checkcast(reg, obj.result(), x->klass(),
1273 new_register(objectType), new_register(objectType), tmp3,
1274 x->direct_compare(), info_for_exception, patching_info, stub,
1275 x->profiled_method(), x->profiled_bci());
1276 }
1277
1278 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1279 LIRItem obj(x->obj(), this);
1280
1281 // result and test object may not be in same register
1282 LIR_Opr reg = rlock_result(x);
1283 CodeEmitInfo* patching_info = NULL;
1284 if ((!x->klass()->is_loaded() || PatchALot)) {
1285 // must do this before locking the destination register as an oop register
1286 patching_info = state_for(x, x->state_before());
1287 }
1288 obj.load_item();
1289 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1290 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1291 tmp3 = new_register(objectType);
1292 }
1293 __ instanceof(reg, obj.result(), x->klass(),
1294 new_register(objectType), new_register(objectType), tmp3,
1295 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1296 }
1297
1298 void LIRGenerator::do_If(If* x) {
1299 assert(x->number_of_sux() == 2, "inconsistency");
1300 ValueTag tag = x->x()->type()->tag();
1301 bool is_safepoint = x->is_safepoint();
1302
1303 If::Condition cond = x->cond();
1304
1305 LIRItem xitem(x->x(), this);
1306 LIRItem yitem(x->y(), this);
1307 LIRItem* xin = &xitem;
1308 LIRItem* yin = &yitem;
1309
1310 if (tag == longTag) {
1311 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1312 // mirror for other conditions
1313 if (cond == If::gtr || cond == If::leq) {
1314 cond = Instruction::mirror(cond);
1315 xin = &yitem;
1316 yin = &xitem;
1317 }
1318 xin->set_destroys_register();
1319 }
1320 xin->load_item();
1321
1322 if (tag == longTag) {
1323 if (yin->is_constant()
1324 && Assembler::operand_valid_for_add_sub_immediate(yin->get_jlong_constant())) {
1325 yin->dont_load_item();
1326 } else {
1327 yin->load_item();
1328 }
1329 } else if (tag == intTag) {
1330 if (yin->is_constant()
1331 && Assembler::operand_valid_for_add_sub_immediate(yin->get_jint_constant())) {
1332 yin->dont_load_item();
1333 } else {
1334 yin->load_item();
1335 }
1336 } else {
1337 yin->load_item();
1338 }
1339
1340 set_no_result(x);
1341
1342 LIR_Opr left = xin->result();
1343 LIR_Opr right = yin->result();
1344
1345 // add safepoint before generating condition code so it can be recomputed
1346 if (x->is_safepoint()) {
1347 // increment backedge counter if needed
1348 increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()),
1349 x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci());
1350 __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before()));
1351 }
1352
1353 __ cmp(lir_cond(cond), left, right);
1354 // Generate branch profiling. Profiling code doesn't kill flags.
1355 profile_branch(x, cond);
1356 move_to_phi(x->state());
1357 if (x->x()->type()->is_float_kind()) {
1358 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1359 } else {
1360 __ branch(lir_cond(cond), right->type(), x->tsux());
1361 }
1362 assert(x->default_sux() == x->fsux(), "wrong destination above");
1363 __ jump(x->default_sux());
1364 }
1365
1366 LIR_Opr LIRGenerator::getThreadPointer() {
1367 return FrameMap::as_pointer_opr(rthread);
1368 }
1369
1370 void LIRGenerator::trace_block_entry(BlockBegin* block) { Unimplemented(); }
1371
1372 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1373 CodeEmitInfo* info) {
1374 __ volatile_store_mem_reg(value, address, info);
1375 }
1376
1377 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1378 CodeEmitInfo* info) {
1379 // 8179954: We need to make sure that the code generated for
1380 // volatile accesses forms a sequentially-consistent set of
1381 // operations when combined with STLR and LDAR. Without a leading
1382 // membar it's possible for a simple Dekker test to fail if loads
1383 // use LD;DMB but stores use STLR. This can happen if C2 compiles
1384 // the stores in one method and C1 compiles the loads in another.
1385 if (! UseBarriersForVolatile) {
1386 __ membar();
1387 }
1388
1389 __ volatile_load_mem_reg(address, result, info);
1390 }