1 /*
   2  * Copyright (c) 2018, Red Hat, Inc. All rights reserved.
   3  *
   4  * This code is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License version 2 only, as
   6  * published by the Free Software Foundation.
   7  *
   8  * This code is distributed in the hope that it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  11  * version 2 for more details (a copy is included in the LICENSE file that
  12  * accompanied this code).
  13  *
  14  * You should have received a copy of the GNU General Public License version
  15  * 2 along with this work; if not, write to the Free Software Foundation,
  16  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  17  *
  18  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  19  * or visit www.oracle.com if you need additional information or have any
  20  * questions.
  21  *
  22  */
  23 
  24 #include "precompiled.hpp"
  25 #include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp"
  26 #include "gc/shenandoah/shenandoahHeap.hpp"
  27 #include "gc/shenandoah/shenandoahHeapRegion.hpp"
  28 #include "gc/shenandoah/shenandoahHeuristics.hpp"
  29 #include "gc/shenandoah/shenandoahRuntime.hpp"
  30 #include "gc/shenandoah/shenandoahThreadLocalData.hpp"
  31 #include "interpreter/interpreter.hpp"
  32 #include "interpreter/interp_masm.hpp"
  33 #include "runtime/sharedRuntime.hpp"
  34 #include "runtime/thread.hpp"
  35 #include "utilities/macros.hpp"
  36 #ifdef COMPILER1
  37 #include "c1/c1_LIRAssembler.hpp"
  38 #include "c1/c1_MacroAssembler.hpp"
  39 #include "gc/shenandoah/c1/shenandoahBarrierSetC1.hpp"
  40 #endif
  41 
  42 #define __ masm->
  43 
  44 address ShenandoahBarrierSetAssembler::_shenandoah_lrb = NULL;
  45 
  46 void ShenandoahBarrierSetAssembler::arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
  47                                                        Register src, Register dst, Register count) {
  48 
  49   bool checkcast = (decorators & ARRAYCOPY_CHECKCAST) != 0;
  50   bool disjoint = (decorators & ARRAYCOPY_DISJOINT) != 0;
  51   bool obj_int = type == T_OBJECT LP64_ONLY(&& UseCompressedOops);
  52   bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
  53 
  54   if (type == T_OBJECT || type == T_ARRAY) {
  55 #ifdef _LP64
  56     if (!checkcast && !obj_int) {
  57       // Save count for barrier
  58       __ movptr(r11, count);
  59     } else if (disjoint && obj_int) {
  60       // Save dst in r11 in the disjoint case
  61       __ movq(r11, dst);
  62     }
  63 #else
  64     if (disjoint) {
  65       __ mov(rdx, dst);          // save 'to'
  66     }
  67 #endif
  68 
  69     if (ShenandoahSATBBarrier && !dest_uninitialized && !ShenandoahHeap::heap()->heuristics()->can_do_traversal_gc()) {
  70       Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
  71 #ifndef _LP64
  72       __ push(thread);
  73       __ get_thread(thread);
  74 #endif
  75 
  76       Label done;
  77       // Short-circuit if count == 0.
  78       __ testptr(count, count);
  79       __ jcc(Assembler::zero, done);
  80 
  81       // Avoid runtime call when not marking.
  82       Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
  83       __ testb(gc_state, ShenandoahHeap::MARKING);
  84       __ jcc(Assembler::zero, done);
  85 
  86       __ pusha();                      // push registers
  87 #ifdef _LP64
  88       if (count == c_rarg0) {
  89         if (dst == c_rarg1) {
  90           // exactly backwards!!
  91           __ xchgptr(c_rarg1, c_rarg0);
  92         } else {
  93           __ movptr(c_rarg1, count);
  94           __ movptr(c_rarg0, dst);
  95         }
  96       } else {
  97         __ movptr(c_rarg0, dst);
  98         __ movptr(c_rarg1, count);
  99       }
 100       if (UseCompressedOops) {
 101         __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_array_pre_narrow_oop_entry), 2);
 102       } else {
 103         __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_array_pre_oop_entry), 2);
 104       }
 105 #else
 106       __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_array_pre_oop_entry),
 107                       dst, count);
 108 #endif
 109       __ popa();
 110       __ bind(done);
 111       NOT_LP64(__ pop(thread);)
 112     }
 113   }
 114 
 115 }
 116 
 117 void ShenandoahBarrierSetAssembler::arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 118                                                        Register src, Register dst, Register count) {
 119   bool checkcast = (decorators & ARRAYCOPY_CHECKCAST) != 0;
 120   bool disjoint = (decorators & ARRAYCOPY_DISJOINT) != 0;
 121   bool obj_int = type == T_OBJECT LP64_ONLY(&& UseCompressedOops);
 122   Register tmp = rax;
 123 
 124   if (type == T_OBJECT || type == T_ARRAY) {
 125 #ifdef _LP64
 126     if (!checkcast && !obj_int) {
 127       // Save count for barrier
 128       count = r11;
 129     } else if (disjoint && obj_int) {
 130       // Use the saved dst in the disjoint case
 131       dst = r11;
 132     } else if (checkcast) {
 133       tmp = rscratch1;
 134     }
 135 #else
 136     if (disjoint) {
 137       __ mov(dst, rdx); // restore 'to'
 138     }
 139 #endif
 140 
 141     Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
 142 #ifndef _LP64
 143     __ push(thread);
 144     __ get_thread(thread);
 145 #endif
 146 
 147     // Short-circuit if count == 0.
 148     Label done;
 149     __ testptr(count, count);
 150     __ jcc(Assembler::zero, done);
 151 
 152     // Skip runtime call if no forwarded objects.
 153     Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
 154     __ testb(gc_state, ShenandoahHeap::UPDATEREFS);
 155     __ jcc(Assembler::zero, done);
 156 
 157     __ pusha();             // push registers (overkill)
 158 #ifdef _LP64
 159     if (c_rarg0 == count) { // On win64 c_rarg0 == rcx
 160       assert_different_registers(c_rarg1, dst);
 161       __ mov(c_rarg1, count);
 162       __ mov(c_rarg0, dst);
 163     } else {
 164       assert_different_registers(c_rarg0, count);
 165       __ mov(c_rarg0, dst);
 166       __ mov(c_rarg1, count);
 167     }
 168     __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_array_post_entry), 2);
 169 #else
 170     __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_array_post_entry),
 171                     dst, count);
 172 #endif
 173     __ popa();
 174 
 175     __ bind(done);
 176     NOT_LP64(__ pop(thread);)
 177   }
 178 }
 179 
 180 void ShenandoahBarrierSetAssembler::shenandoah_write_barrier_pre(MacroAssembler* masm,
 181                                                                  Register obj,
 182                                                                  Register pre_val,
 183                                                                  Register thread,
 184                                                                  Register tmp,
 185                                                                  bool tosca_live,
 186                                                                  bool expand_call) {
 187 
 188   if (ShenandoahSATBBarrier) {
 189     satb_write_barrier_pre(masm, obj, pre_val, thread, tmp, tosca_live, expand_call);
 190   }
 191 }
 192 
 193 void ShenandoahBarrierSetAssembler::satb_write_barrier_pre(MacroAssembler* masm,
 194                                                            Register obj,
 195                                                            Register pre_val,
 196                                                            Register thread,
 197                                                            Register tmp,
 198                                                            bool tosca_live,
 199                                                            bool expand_call) {
 200   // If expand_call is true then we expand the call_VM_leaf macro
 201   // directly to skip generating the check by
 202   // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
 203 
 204 #ifdef _LP64
 205   assert(thread == r15_thread, "must be");
 206 #endif // _LP64
 207 
 208   Label done;
 209   Label runtime;
 210 
 211   assert(pre_val != noreg, "check this code");
 212 
 213   if (obj != noreg) {
 214     assert_different_registers(obj, pre_val, tmp);
 215     assert(pre_val != rax, "check this code");
 216   }
 217 
 218   Address in_progress(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_active_offset()));
 219   Address index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
 220   Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
 221 
 222   Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
 223   __ testb(gc_state, ShenandoahHeap::MARKING | ShenandoahHeap::TRAVERSAL);
 224   __ jcc(Assembler::zero, done);
 225 
 226   // Do we need to load the previous value?
 227   if (obj != noreg) {
 228     __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
 229   }
 230 
 231   // Is the previous value null?
 232   __ cmpptr(pre_val, (int32_t) NULL_WORD);
 233   __ jcc(Assembler::equal, done);
 234 
 235   // Can we store original value in the thread's buffer?
 236   // Is index == 0?
 237   // (The index field is typed as size_t.)
 238 
 239   __ movptr(tmp, index);                   // tmp := *index_adr
 240   __ cmpptr(tmp, 0);                       // tmp == 0?
 241   __ jcc(Assembler::equal, runtime);       // If yes, goto runtime
 242 
 243   __ subptr(tmp, wordSize);                // tmp := tmp - wordSize
 244   __ movptr(index, tmp);                   // *index_adr := tmp
 245   __ addptr(tmp, buffer);                  // tmp := tmp + *buffer_adr
 246 
 247   // Record the previous value
 248   __ movptr(Address(tmp, 0), pre_val);
 249   __ jmp(done);
 250 
 251   __ bind(runtime);
 252   // save the live input values
 253   if(tosca_live) __ push(rax);
 254 
 255   if (obj != noreg && obj != rax)
 256     __ push(obj);
 257 
 258   if (pre_val != rax)
 259     __ push(pre_val);
 260 
 261   // Calling the runtime using the regular call_VM_leaf mechanism generates
 262   // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
 263   // that checks that the *(ebp+frame::interpreter_frame_last_sp) == NULL.
 264   //
 265   // If we care generating the pre-barrier without a frame (e.g. in the
 266   // intrinsified Reference.get() routine) then ebp might be pointing to
 267   // the caller frame and so this check will most likely fail at runtime.
 268   //
 269   // Expanding the call directly bypasses the generation of the check.
 270   // So when we do not have have a full interpreter frame on the stack
 271   // expand_call should be passed true.
 272 
 273   NOT_LP64( __ push(thread); )
 274 
 275 #ifdef _LP64
 276   // We move pre_val into c_rarg0 early, in order to avoid smashing it, should
 277   // pre_val be c_rarg1 (where the call prologue would copy thread argument).
 278   // Note: this should not accidentally smash thread, because thread is always r15.
 279   assert(thread != c_rarg0, "smashed arg");
 280   if (c_rarg0 != pre_val) {
 281     __ mov(c_rarg0, pre_val);
 282   }
 283 #endif
 284 
 285   if (expand_call) {
 286     LP64_ONLY( assert(pre_val != c_rarg1, "smashed arg"); )
 287 #ifdef _LP64
 288     if (c_rarg1 != thread) {
 289       __ mov(c_rarg1, thread);
 290     }
 291     // Already moved pre_val into c_rarg0 above
 292 #else
 293     __ push(thread);
 294     __ push(pre_val);
 295 #endif
 296     __ MacroAssembler::call_VM_leaf_base(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_field_pre_entry), 2);
 297   } else {
 298     __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_field_pre_entry), LP64_ONLY(c_rarg0) NOT_LP64(pre_val), thread);
 299   }
 300 
 301   NOT_LP64( __ pop(thread); )
 302 
 303   // save the live input values
 304   if (pre_val != rax)
 305     __ pop(pre_val);
 306 
 307   if (obj != noreg && obj != rax)
 308     __ pop(obj);
 309 
 310   if(tosca_live) __ pop(rax);
 311 
 312   __ bind(done);
 313 }
 314 
 315 void ShenandoahBarrierSetAssembler::resolve_forward_pointer(MacroAssembler* masm, Register dst, Register tmp) {
 316   assert(ShenandoahCASBarrier, "should be enabled");
 317   Label is_null;
 318   __ testptr(dst, dst);
 319   __ jcc(Assembler::zero, is_null);
 320   resolve_forward_pointer_not_null(masm, dst, tmp);
 321   __ bind(is_null);
 322 }
 323 
 324 void ShenandoahBarrierSetAssembler::resolve_forward_pointer_not_null(MacroAssembler* masm, Register dst, Register tmp) {
 325   assert(ShenandoahCASBarrier || ShenandoahLoadRefBarrier, "should be enabled");
 326   // The below loads the mark word, checks if the lowest two bits are
 327   // set, and if so, clear the lowest two bits and copy the result
 328   // to dst. Otherwise it leaves dst alone.
 329   // Implementing this is surprisingly awkward. I do it here by:
 330   // - Inverting the mark word
 331   // - Test lowest two bits == 0
 332   // - If so, set the lowest two bits
 333   // - Invert the result back, and copy to dst
 334   Label done;
 335   __ movptr(tmp, Address(dst, oopDesc::mark_offset_in_bytes()));
 336   __ notptr(tmp);
 337   __ testb(tmp, markOopDesc::marked_value);
 338   __ jccb(Assembler::notZero, done);
 339   __ orptr(tmp, markOopDesc::marked_value);
 340   __ notptr(tmp);
 341   __ mov(dst, tmp);
 342   __ bind(done);
 343 }
 344 
 345 
 346 void ShenandoahBarrierSetAssembler::load_reference_barrier_not_null(MacroAssembler* masm, Register dst) {
 347   assert(ShenandoahLoadRefBarrier, "Should be enabled");
 348 #ifdef _LP64
 349   Label done;
 350 
 351   Address gc_state(r15_thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
 352   __ testb(gc_state, ShenandoahHeap::HAS_FORWARDED);
 353   __ jccb(Assembler::zero, done);
 354 
 355    if (dst != rax) {
 356      __ xchgptr(dst, rax); // Move obj into rax and save rax into obj.
 357    }
 358 
 359    __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, ShenandoahBarrierSetAssembler::shenandoah_lrb())));
 360 
 361    if (dst != rax) {
 362      __ xchgptr(rax, dst); // Swap back obj with rax.
 363    }
 364 
 365   __ bind(done);
 366 #else
 367   Unimplemented();
 368 #endif
 369 }
 370 
 371 void ShenandoahBarrierSetAssembler::storeval_barrier(MacroAssembler* masm, Register dst, Register tmp) {
 372   if (ShenandoahStoreValEnqueueBarrier) {
 373     storeval_barrier_impl(masm, dst, tmp);
 374   }
 375 }
 376 
 377 void ShenandoahBarrierSetAssembler::storeval_barrier_impl(MacroAssembler* masm, Register dst, Register tmp) {
 378   assert(ShenandoahStoreValEnqueueBarrier, "should be enabled");
 379 
 380   if (dst == noreg) return;
 381 
 382 #ifdef _LP64
 383   if (ShenandoahStoreValEnqueueBarrier) {
 384     // The set of registers to be saved+restored is the same as in the write-barrier above.
 385     // Those are the commonly used registers in the interpreter.
 386     __ pusha();
 387     // __ push_callee_saved_registers();
 388     __ subptr(rsp, 2 * Interpreter::stackElementSize);
 389     __ movdbl(Address(rsp, 0), xmm0);
 390 
 391     satb_write_barrier_pre(masm, noreg, dst, r15_thread, tmp, true, false);
 392     __ movdbl(xmm0, Address(rsp, 0));
 393     __ addptr(rsp, 2 * Interpreter::stackElementSize);
 394     //__ pop_callee_saved_registers();
 395     __ popa();
 396   }
 397 #else
 398   Unimplemented();
 399 #endif
 400 }
 401 
 402 void ShenandoahBarrierSetAssembler::load_reference_barrier(MacroAssembler* masm, Register dst) {
 403   if (ShenandoahLoadRefBarrier) {
 404     Label done;
 405     __ testptr(dst, dst);
 406     __ jcc(Assembler::zero, done);
 407     load_reference_barrier_not_null(masm, dst);
 408     __ bind(done);
 409   }
 410 }
 411 
 412 void ShenandoahBarrierSetAssembler::load_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 413              Register dst, Address src, Register tmp1, Register tmp_thread) {
 414   bool on_oop = type == T_OBJECT || type == T_ARRAY;
 415   bool on_weak = (decorators & ON_WEAK_OOP_REF) != 0;
 416   bool on_phantom = (decorators & ON_PHANTOM_OOP_REF) != 0;
 417   bool on_reference = on_weak || on_phantom;
 418    BarrierSetAssembler::load_at(masm, decorators, type, dst, src, tmp1, tmp_thread);
 419   if (on_oop) {
 420     load_reference_barrier(masm, dst);
 421 
 422     if (ShenandoahKeepAliveBarrier && on_reference) {
 423       const Register thread = NOT_LP64(tmp_thread) LP64_ONLY(r15_thread);
 424       NOT_LP64(__ get_thread(thread));
 425       // Generate the SATB pre-barrier code to log the value of
 426       // the referent field in an SATB buffer.
 427       shenandoah_write_barrier_pre(masm /* masm */,
 428                                    noreg /* obj */,
 429                                    dst /* pre_val */,
 430                                    thread /* thread */,
 431                                    tmp1 /* tmp */,
 432                                    true /* tosca_live */,
 433                                    true /* expand_call */);
 434     }
 435   }
 436 }
 437 
 438 void ShenandoahBarrierSetAssembler::store_at(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
 439               Address dst, Register val, Register tmp1, Register tmp2) {
 440 
 441   bool on_oop = type == T_OBJECT || type == T_ARRAY;
 442   bool in_heap = (decorators & IN_HEAP) != 0;
 443   bool as_normal = (decorators & AS_NORMAL) != 0;
 444   if (on_oop && in_heap) {
 445     bool needs_pre_barrier = as_normal;
 446 
 447     Register tmp3 = LP64_ONLY(r8) NOT_LP64(rsi);
 448     Register rthread = LP64_ONLY(r15_thread) NOT_LP64(rcx);
 449     // flatten object address if needed
 450     // We do it regardless of precise because we need the registers
 451     if (dst.index() == noreg && dst.disp() == 0) {
 452       if (dst.base() != tmp1) {
 453         __ movptr(tmp1, dst.base());
 454       }
 455     } else {
 456       __ lea(tmp1, dst);
 457     }
 458 
 459 #ifndef _LP64
 460     InterpreterMacroAssembler *imasm = static_cast<InterpreterMacroAssembler*>(masm);
 461 #endif
 462 
 463     NOT_LP64(__ get_thread(rcx));
 464     NOT_LP64(imasm->save_bcp());
 465 
 466     if (needs_pre_barrier) {
 467       shenandoah_write_barrier_pre(masm /*masm*/,
 468                                    tmp1 /* obj */,
 469                                    tmp2 /* pre_val */,
 470                                    rthread /* thread */,
 471                                    tmp3  /* tmp */,
 472                                    val != noreg /* tosca_live */,
 473                                    false /* expand_call */);
 474     }
 475     if (val == noreg) {
 476       BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp1, 0), val, noreg, noreg);
 477     } else {
 478       storeval_barrier(masm, val, tmp3);
 479       BarrierSetAssembler::store_at(masm, decorators, type, Address(tmp1, 0), val, noreg, noreg);
 480     }
 481     NOT_LP64(imasm->restore_bcp());
 482   } else {
 483     BarrierSetAssembler::store_at(masm, decorators, type, dst, val, tmp1, tmp2);
 484   }
 485 }
 486 
 487 // Special Shenandoah CAS implementation that handles false negatives
 488 // due to concurrent evacuation.
 489 #ifndef _LP64
 490 void ShenandoahBarrierSetAssembler::cmpxchg_oop(MacroAssembler* masm,
 491                                                 Register res, Address addr, Register oldval, Register newval,
 492                                                 bool exchange, Register tmp1, Register tmp2) {
 493   // Shenandoah has no 32-bit version for this.
 494   Unimplemented();
 495 }
 496 #else
 497 void ShenandoahBarrierSetAssembler::cmpxchg_oop(MacroAssembler* masm,
 498                                                 Register res, Address addr, Register oldval, Register newval,
 499                                                 bool exchange, Register tmp1, Register tmp2, Register tmp3) {
 500   assert(ShenandoahCASBarrier, "Should only be used when CAS barrier is enabled");
 501   assert(oldval == rax, "must be in rax for implicit use in cmpxchg");
 502 
 503   Label retry, done;
 504 
 505   // Remember oldval for retry logic below
 506   if (UseCompressedOops) {
 507     __ movl(tmp1, oldval);
 508   } else {
 509     __ movptr(tmp1, oldval);
 510   }
 511 
 512   // Step 1. Try to CAS with given arguments. If successful, then we are done,
 513   // and can safely return.
 514   if (os::is_MP()) __ lock();
 515   if (UseCompressedOops) {
 516     __ cmpxchgl(newval, addr);
 517   } else {
 518     __ cmpxchgptr(newval, addr);
 519   }
 520   __ jcc(Assembler::equal, done, true);
 521 
 522   // Step 2. CAS had failed. This may be a false negative.
 523   //
 524   // The trouble comes when we compare the to-space pointer with the from-space
 525   // pointer to the same object. To resolve this, it will suffice to resolve both
 526   // oldval and the value from memory -- this will give both to-space pointers.
 527   // If they mismatch, then it was a legitimate failure.
 528   //
 529   if (UseCompressedOops) {
 530     __ decode_heap_oop(tmp1);
 531   }
 532   resolve_forward_pointer(masm, tmp1, tmp3);
 533 
 534   if (UseCompressedOops) {
 535     __ movl(tmp2, oldval);
 536     __ decode_heap_oop(tmp2);
 537   } else {
 538     __ movptr(tmp2, oldval);
 539   }
 540   resolve_forward_pointer(masm, tmp2, tmp3);
 541 
 542   __ cmpptr(tmp1, tmp2);
 543   __ jcc(Assembler::notEqual, done, true);
 544 
 545   // Step 3. Try to CAS again with resolved to-space pointers.
 546   //
 547   // Corner case: it may happen that somebody stored the from-space pointer
 548   // to memory while we were preparing for retry. Therefore, we can fail again
 549   // on retry, and so need to do this in loop, always resolving the failure
 550   // witness.
 551   __ bind(retry);
 552   if (os::is_MP()) __ lock();
 553   if (UseCompressedOops) {
 554     __ cmpxchgl(newval, addr);
 555   } else {
 556     __ cmpxchgptr(newval, addr);
 557   }
 558   __ jcc(Assembler::equal, done, true);
 559 
 560   if (UseCompressedOops) {
 561     __ movl(tmp2, oldval);
 562     __ decode_heap_oop(tmp2);
 563   } else {
 564     __ movptr(tmp2, oldval);
 565   }
 566   resolve_forward_pointer(masm, tmp2, tmp3);
 567 
 568   __ cmpptr(tmp1, tmp2);
 569   __ jcc(Assembler::equal, retry, true);
 570 
 571   // Step 4. If we need a boolean result out of CAS, check the flag again,
 572   // and promote the result. Note that we handle the flag from both the CAS
 573   // itself and from the retry loop.
 574   __ bind(done);
 575   if (!exchange) {
 576     assert(res != NULL, "need result register");
 577     __ setb(Assembler::equal, res);
 578     __ movzbl(res, res);
 579   }
 580 }
 581 #endif // LP64
 582 
 583 void ShenandoahBarrierSetAssembler::save_vector_registers(MacroAssembler* masm) {
 584   int num_xmm_regs = LP64_ONLY(16) NOT_LP64(8);
 585   if (UseAVX > 2) {
 586     num_xmm_regs = LP64_ONLY(32) NOT_LP64(8);
 587   }
 588 
 589   if (UseSSE == 1)  {
 590     __ subptr(rsp, sizeof(jdouble)*8);
 591     for (int n = 0; n < 8; n++) {
 592       __ movflt(Address(rsp, n*sizeof(jdouble)), as_XMMRegister(n));
 593     }
 594   } else if (UseSSE >= 2)  {
 595     if (UseAVX > 2) {
 596       __ push(rbx);
 597       __ movl(rbx, 0xffff);
 598       __ kmovwl(k1, rbx);
 599       __ pop(rbx);
 600     }
 601 #ifdef COMPILER2
 602     if (MaxVectorSize > 16) {
 603       if(UseAVX > 2) {
 604         // Save upper half of ZMM registers
 605         __ subptr(rsp, 32*num_xmm_regs);
 606         for (int n = 0; n < num_xmm_regs; n++) {
 607           __ vextractf64x4_high(Address(rsp, n*32), as_XMMRegister(n));
 608         }
 609       }
 610       assert(UseAVX > 0, "256 bit vectors are supported only with AVX");
 611       // Save upper half of YMM registers
 612       __ subptr(rsp, 16*num_xmm_regs);
 613       for (int n = 0; n < num_xmm_regs; n++) {
 614         __ vextractf128_high(Address(rsp, n*16), as_XMMRegister(n));
 615       }
 616     }
 617 #endif
 618     // Save whole 128bit (16 bytes) XMM registers
 619     __ subptr(rsp, 16*num_xmm_regs);
 620 #ifdef _LP64
 621     if (VM_Version::supports_evex()) {
 622       for (int n = 0; n < num_xmm_regs; n++) {
 623         __ vextractf32x4(Address(rsp, n*16), as_XMMRegister(n), 0);
 624       }
 625     } else {
 626       for (int n = 0; n < num_xmm_regs; n++) {
 627         __ movdqu(Address(rsp, n*16), as_XMMRegister(n));
 628       }
 629     }
 630 #else
 631     for (int n = 0; n < num_xmm_regs; n++) {
 632       __ movdqu(Address(rsp, n*16), as_XMMRegister(n));
 633     }
 634 #endif
 635   }
 636 }
 637 
 638 void ShenandoahBarrierSetAssembler::restore_vector_registers(MacroAssembler* masm) {
 639   int num_xmm_regs = LP64_ONLY(16) NOT_LP64(8);
 640   if (UseAVX > 2) {
 641     num_xmm_regs = LP64_ONLY(32) NOT_LP64(8);
 642   }
 643   if (UseSSE == 1)  {
 644     for (int n = 0; n < 8; n++) {
 645       __ movflt(as_XMMRegister(n), Address(rsp, n*sizeof(jdouble)));
 646     }
 647     __ addptr(rsp, sizeof(jdouble)*8);
 648   } else if (UseSSE >= 2)  {
 649     // Restore whole 128bit (16 bytes) XMM registers
 650 #ifdef _LP64
 651     if (VM_Version::supports_evex()) {
 652       for (int n = 0; n < num_xmm_regs; n++) {
 653         __ vinsertf32x4(as_XMMRegister(n), as_XMMRegister(n), Address(rsp, n*16), 0);
 654       }
 655     } else {
 656       for (int n = 0; n < num_xmm_regs; n++) {
 657         __ movdqu(as_XMMRegister(n), Address(rsp, n*16));
 658       }
 659     }
 660 #else
 661     for (int n = 0; n < num_xmm_regs; n++) {
 662       __ movdqu(as_XMMRegister(n), Address(rsp, n*16));
 663     }
 664 #endif
 665     __ addptr(rsp, 16*num_xmm_regs);
 666 
 667 #ifdef COMPILER2
 668     if (MaxVectorSize > 16) {
 669       // Restore upper half of YMM registers.
 670       for (int n = 0; n < num_xmm_regs; n++) {
 671         __ vinsertf128_high(as_XMMRegister(n), Address(rsp, n*16));
 672       }
 673       __ addptr(rsp, 16*num_xmm_regs);
 674       if (UseAVX > 2) {
 675         for (int n = 0; n < num_xmm_regs; n++) {
 676           __ vinsertf64x4_high(as_XMMRegister(n), Address(rsp, n*32));
 677         }
 678         __ addptr(rsp, 32*num_xmm_regs);
 679       }
 680     }
 681 #endif
 682   }
 683 }
 684 
 685 #ifdef COMPILER1
 686 
 687 #undef __
 688 #define __ ce->masm()->
 689 
 690 void ShenandoahBarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub) {
 691   ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
 692   // At this point we know that marking is in progress.
 693   // If do_load() is true then we have to emit the
 694   // load of the previous value; otherwise it has already
 695   // been loaded into _pre_val.
 696 
 697   __ bind(*stub->entry());
 698   assert(stub->pre_val()->is_register(), "Precondition.");
 699 
 700   Register pre_val_reg = stub->pre_val()->as_register();
 701 
 702   if (stub->do_load()) {
 703     ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/, false /*unaligned*/);
 704   }
 705 
 706   __ cmpptr(pre_val_reg, (int32_t)NULL_WORD);
 707   __ jcc(Assembler::equal, *stub->continuation());
 708   ce->store_parameter(stub->pre_val()->as_register(), 0);
 709   __ call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin()));
 710   __ jmp(*stub->continuation());
 711 
 712 }
 713 
 714 void ShenandoahBarrierSetAssembler::gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub) {
 715   __ bind(*stub->entry());
 716 
 717   Label done;
 718   Register obj = stub->obj()->as_register();
 719   Register res = stub->result()->as_register();
 720 
 721   if (res != obj) {
 722     __ mov(res, obj);
 723   }
 724 
 725   // Check for null.
 726   if (stub->needs_null_check()) {
 727     __ testptr(res, res);
 728     __ jcc(Assembler::zero, done);
 729   }
 730 
 731   load_reference_barrier_not_null(ce->masm(), res);
 732 
 733   __ bind(done);
 734   __ jmp(*stub->continuation());
 735 }
 736 
 737 #undef __
 738 
 739 #define __ sasm->
 740 
 741 void ShenandoahBarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
 742   __ prologue("shenandoah_pre_barrier", false);
 743   // arg0 : previous value of memory
 744 
 745   __ push(rax);
 746   __ push(rdx);
 747 
 748   const Register pre_val = rax;
 749   const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
 750   const Register tmp = rdx;
 751 
 752   NOT_LP64(__ get_thread(thread);)
 753 
 754   Address queue_index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
 755   Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
 756 
 757   Label done;
 758   Label runtime;
 759 
 760   // Is SATB still active?
 761   Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
 762   __ testb(gc_state, ShenandoahHeap::MARKING | ShenandoahHeap::TRAVERSAL);
 763   __ jcc(Assembler::zero, done);
 764 
 765   // Can we store original value in the thread's buffer?
 766 
 767   __ movptr(tmp, queue_index);
 768   __ testptr(tmp, tmp);
 769   __ jcc(Assembler::zero, runtime);
 770   __ subptr(tmp, wordSize);
 771   __ movptr(queue_index, tmp);
 772   __ addptr(tmp, buffer);
 773 
 774   // prev_val (rax)
 775   __ load_parameter(0, pre_val);
 776   __ movptr(Address(tmp, 0), pre_val);
 777   __ jmp(done);
 778 
 779   __ bind(runtime);
 780 
 781   __ save_live_registers_no_oop_map(true);
 782 
 783   // load the pre-value
 784   __ load_parameter(0, rcx);
 785   __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_field_pre_entry), rcx, thread);
 786 
 787   __ restore_live_registers(true);
 788 
 789   __ bind(done);
 790 
 791   __ pop(rdx);
 792   __ pop(rax);
 793 
 794   __ epilogue();
 795 }
 796 
 797 #undef __
 798 
 799 #endif // COMPILER1
 800 
 801 address ShenandoahBarrierSetAssembler::shenandoah_lrb() {
 802   assert(_shenandoah_lrb != NULL, "need load reference barrier stub");
 803   return _shenandoah_lrb;
 804 }
 805 
 806 #define __ cgen->assembler()->
 807 
 808 address ShenandoahBarrierSetAssembler::generate_shenandoah_lrb(StubCodeGenerator* cgen) {
 809   __ align(CodeEntryAlignment);
 810   StubCodeMark mark(cgen, "StubRoutines", "shenandoah_lrb");
 811   address start = __ pc();
 812 
 813 #ifdef _LP64
 814   Label resolve_oop, slow_path;
 815 
 816   // We use RDI, which also serves as argument register for slow call.
 817   // RAX always holds the src object ptr, except after the slow call and
 818   // the cmpxchg, then it holds the result.
 819   // R8 and RCX are used as temporary registers.
 820   __ push(rdi);
 821   __ push(r8);
 822 
 823   // Check for object beeing in the collection set.
 824   // TODO: Can we use only 1 register here?
 825   // The source object arrives here in rax.
 826   // live: rax
 827   // live: rdi
 828   __ mov(rdi, rax);
 829   __ shrptr(rdi, ShenandoahHeapRegion::region_size_bytes_shift_jint());
 830   // live: r8
 831   __ movptr(r8, (intptr_t) ShenandoahHeap::in_cset_fast_test_addr());
 832   __ movbool(r8, Address(r8, rdi, Address::times_1));
 833   // unlive: rdi
 834   __ testbool(r8);
 835   // unlive: r8
 836   __ jccb(Assembler::notZero, resolve_oop);
 837 
 838   __ pop(r8);
 839   __ pop(rdi);
 840   __ ret(0);
 841 
 842   __ bind(resolve_oop);
 843 
 844   __ movptr(r8, Address(rax, oopDesc::mark_offset_in_bytes()));
 845   // Test if both lowest bits are set. We trick it by negating the bits
 846   // then test for both bits clear.
 847   __ notptr(r8);
 848   __ testb(r8, markOopDesc::marked_value);
 849   __ jccb(Assembler::notZero, slow_path);
 850   // Clear both lower bits. It's still inverted, so set them, and then invert back.
 851   __ orptr(r8, markOopDesc::marked_value);
 852   __ notptr(r8);
 853   // At this point, r8 contains the decoded forwarding pointer.
 854   __ mov(rax, r8);
 855 
 856   __ pop(r8);
 857   __ pop(rdi);
 858   __ ret(0);
 859 
 860   __ bind(slow_path);
 861 
 862   __ push(rcx);
 863   __ push(rdx);
 864   __ push(rdi);
 865   __ push(rsi);
 866   __ push(r8);
 867   __ push(r9);
 868   __ push(r10);
 869   __ push(r11);
 870   __ push(r12);
 871   __ push(r13);
 872   __ push(r14);
 873   __ push(r15);
 874   save_vector_registers(cgen->assembler());
 875   __ movptr(rdi, rax);
 876   __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::load_reference_barrier_JRT), rdi);
 877   restore_vector_registers(cgen->assembler());
 878   __ pop(r15);
 879   __ pop(r14);
 880   __ pop(r13);
 881   __ pop(r12);
 882   __ pop(r11);
 883   __ pop(r10);
 884   __ pop(r9);
 885   __ pop(r8);
 886   __ pop(rsi);
 887   __ pop(rdi);
 888   __ pop(rdx);
 889   __ pop(rcx);
 890 
 891   __ pop(r8);
 892   __ pop(rdi);
 893   __ ret(0);
 894 #else
 895   ShouldNotReachHere();
 896 #endif
 897   return start;
 898 }
 899 
 900 #undef __
 901 
 902 void ShenandoahBarrierSetAssembler::barrier_stubs_init() {
 903   if (ShenandoahLoadRefBarrier) {
 904     int stub_code_size = 4096;
 905     ResourceMark rm;
 906     BufferBlob* bb = BufferBlob::create("shenandoah_barrier_stubs", stub_code_size);
 907     CodeBuffer buf(bb);
 908     StubCodeGenerator cgen(&buf);
 909     _shenandoah_lrb = generate_shenandoah_lrb(&cgen);
 910   }
 911 }