19 * or visit www.oracle.com if you need additional information or have any
20 * questions.
21 *
22 */
23
24 #include "precompiled.hpp"
25 #include "c1/c1_LIRAssembler.hpp"
26 #include "c1/c1_MacroAssembler.hpp"
27 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
28 #include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp"
29 #include "gc/shenandoah/c1/shenandoahBarrierSetC1.hpp"
30
31 #define __ masm->masm()->
32
33 void LIR_OpShenandoahCompareAndSwap::emit_code(LIR_Assembler* masm) {
34 Register addr = _addr->as_register_lo();
35 Register newval = _new_value->as_register();
36 Register cmpval = _cmp_value->as_register();
37 Register tmp1 = _tmp1->as_register();
38 Register tmp2 = _tmp2->as_register();
39 Register result = result_opr()->as_register();
40 assert(cmpval == rax, "wrong register");
41 assert(newval != NULL, "new val must be register");
42 assert(cmpval != newval, "cmp and new values must be in different registers");
43 assert(cmpval != addr, "cmp and addr must be in different registers");
44 assert(newval != addr, "new value and addr must be in different registers");
45
46 // Apply storeval barrier to newval.
47 ShenandoahBarrierSet::assembler()->storeval_barrier(masm->masm(), newval, tmp1);
48
49 if (UseCompressedOops) {
50 __ encode_heap_oop(cmpval);
51 __ mov(rscratch1, newval);
52 __ encode_heap_oop(rscratch1);
53 newval = rscratch1;
54 }
55
56 ShenandoahBarrierSet::assembler()->cmpxchg_oop(masm->masm(), result, Address(addr, 0), cmpval, newval, false, tmp1, tmp2);
57 }
58
59 #undef __
60
61 #ifdef ASSERT
62 #define __ gen->lir(__FILE__, __LINE__)->
63 #else
64 #define __ gen->lir()->
65 #endif
66
67 LIR_Opr ShenandoahBarrierSetC1::atomic_cmpxchg_at_resolved(LIRAccess& access, LIRItem& cmp_value, LIRItem& new_value) {
68
69 if (access.is_oop()) {
70 LIRGenerator* gen = access.gen();
71 if (ShenandoahSATBBarrier) {
72 pre_barrier(gen, access.access_emit_info(), access.decorators(), access.resolved_addr(),
73 LIR_OprFact::illegalOpr /* pre_val */);
74 }
75 if (ShenandoahCASBarrier) {
76 cmp_value.load_item_force(FrameMap::rax_oop_opr);
77 new_value.load_item();
78
79 LIR_Opr t1 = gen->new_register(T_OBJECT);
80 LIR_Opr t2 = gen->new_register(T_OBJECT);
81 LIR_Opr addr = access.resolved_addr()->as_address_ptr()->base();
82 LIR_Opr result = gen->new_register(T_INT);
83
84 __ append(new LIR_OpShenandoahCompareAndSwap(addr, cmp_value.result(), new_value.result(), t1, t2, result));
85 return result;
86 }
87 }
88 return BarrierSetC1::atomic_cmpxchg_at_resolved(access, cmp_value, new_value);
89 }
90
91 LIR_Opr ShenandoahBarrierSetC1::atomic_xchg_at_resolved(LIRAccess& access, LIRItem& value) {
92 LIRGenerator* gen = access.gen();
93 BasicType type = access.type();
94
95 LIR_Opr result = gen->new_register(type);
96 value.load_item();
97 LIR_Opr value_opr = value.result();
98
99 if (access.is_oop()) {
100 value_opr = storeval_barrier(access.gen(), value_opr, access.access_emit_info(), access.decorators());
101 }
102
103 // Because we want a 2-arg form of xchg and xadd
104 __ move(value_opr, result);
|
19 * or visit www.oracle.com if you need additional information or have any
20 * questions.
21 *
22 */
23
24 #include "precompiled.hpp"
25 #include "c1/c1_LIRAssembler.hpp"
26 #include "c1/c1_MacroAssembler.hpp"
27 #include "gc/shenandoah/shenandoahBarrierSet.hpp"
28 #include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp"
29 #include "gc/shenandoah/c1/shenandoahBarrierSetC1.hpp"
30
31 #define __ masm->masm()->
32
33 void LIR_OpShenandoahCompareAndSwap::emit_code(LIR_Assembler* masm) {
34 Register addr = _addr->as_register_lo();
35 Register newval = _new_value->as_register();
36 Register cmpval = _cmp_value->as_register();
37 Register tmp1 = _tmp1->as_register();
38 Register tmp2 = _tmp2->as_register();
39 Register tmp3 = _tmp3->as_register();
40 Register result = result_opr()->as_register();
41 assert(cmpval == rax, "wrong register");
42 assert(newval != NULL, "new val must be register");
43 assert(cmpval != newval, "cmp and new values must be in different registers");
44 assert(cmpval != addr, "cmp and addr must be in different registers");
45 assert(newval != addr, "new value and addr must be in different registers");
46
47 // Apply storeval barrier to newval.
48 ShenandoahBarrierSet::assembler()->storeval_barrier(masm->masm(), newval, tmp1);
49
50 if (UseCompressedOops) {
51 __ encode_heap_oop(cmpval);
52 __ mov(rscratch1, newval);
53 __ encode_heap_oop(rscratch1);
54 newval = rscratch1;
55 }
56
57 ShenandoahBarrierSet::assembler()->cmpxchg_oop(masm->masm(), result, Address(addr, 0), cmpval, newval, false, tmp1, tmp2, tmp3);
58 }
59
60 #undef __
61
62 #ifdef ASSERT
63 #define __ gen->lir(__FILE__, __LINE__)->
64 #else
65 #define __ gen->lir()->
66 #endif
67
68 LIR_Opr ShenandoahBarrierSetC1::atomic_cmpxchg_at_resolved(LIRAccess& access, LIRItem& cmp_value, LIRItem& new_value) {
69
70 if (access.is_oop()) {
71 LIRGenerator* gen = access.gen();
72 if (ShenandoahSATBBarrier) {
73 pre_barrier(gen, access.access_emit_info(), access.decorators(), access.resolved_addr(),
74 LIR_OprFact::illegalOpr /* pre_val */);
75 }
76 if (ShenandoahCASBarrier) {
77 cmp_value.load_item_force(FrameMap::rax_oop_opr);
78 new_value.load_item();
79
80 LIR_Opr t1 = gen->new_register(T_OBJECT);
81 LIR_Opr t2 = gen->new_register(T_OBJECT);
82 LIR_Opr t3 = gen->new_register(T_OBJECT);
83 LIR_Opr addr = access.resolved_addr()->as_address_ptr()->base();
84 LIR_Opr result = gen->new_register(T_INT);
85
86 __ append(new LIR_OpShenandoahCompareAndSwap(addr, cmp_value.result(), new_value.result(), t1, t2, t3, result));
87 return result;
88 }
89 }
90 return BarrierSetC1::atomic_cmpxchg_at_resolved(access, cmp_value, new_value);
91 }
92
93 LIR_Opr ShenandoahBarrierSetC1::atomic_xchg_at_resolved(LIRAccess& access, LIRItem& value) {
94 LIRGenerator* gen = access.gen();
95 BasicType type = access.type();
96
97 LIR_Opr result = gen->new_register(type);
98 value.load_item();
99 LIR_Opr value_opr = value.result();
100
101 if (access.is_oop()) {
102 value_opr = storeval_barrier(access.gen(), value_opr, access.access_emit_info(), access.decorators());
103 }
104
105 // Because we want a 2-arg form of xchg and xadd
106 __ move(value_opr, result);
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