1 /* 2 * Copyright (c) 1998, 2017, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "memory/allocation.inline.hpp" 27 #include "opto/ad.hpp" 28 #include "opto/block.hpp" 29 #include "opto/c2compiler.hpp" 30 #include "opto/callnode.hpp" 31 #include "opto/cfgnode.hpp" 32 #include "opto/machnode.hpp" 33 #include "opto/runtime.hpp" 34 #include "opto/chaitin.hpp" 35 #include "runtime/sharedRuntime.hpp" 36 37 // Optimization - Graph Style 38 39 // Check whether val is not-null-decoded compressed oop, 40 // i.e. will grab into the base of the heap if it represents NULL. 41 static bool accesses_heap_base_zone(Node *val) { 42 if (Universe::narrow_oop_base() != NULL) { // Implies UseCompressedOops. 43 if (val && val->is_Mach()) { 44 if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) { 45 // This assumes all Decodes with TypePtr::NotNull are matched to nodes that 46 // decode NULL to point to the heap base (Decode_NN). 47 if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) { 48 return true; 49 } 50 } 51 // Must recognize load operation with Decode matched in memory operand. 52 // We should not reach here exept for PPC/AIX, as os::zero_page_read_protected() 53 // returns true everywhere else. On PPC, no such memory operands 54 // exist, therefore we did not yet implement a check for such operands. 55 NOT_AIX(Unimplemented()); 56 } 57 } 58 return false; 59 } 60 61 static bool needs_explicit_null_check_for_read(Node *val) { 62 // On some OSes (AIX) the page at address 0 is only write protected. 63 // If so, only Store operations will trap. 64 if (os::zero_page_read_protected()) { 65 return false; // Implicit null check will work. 66 } 67 // Also a read accessing the base of a heap-based compressed heap will trap. 68 if (accesses_heap_base_zone(val) && // Hits the base zone page. 69 Universe::narrow_oop_use_implicit_null_checks()) { // Base zone page is protected. 70 return false; 71 } 72 73 return true; 74 } 75 76 //------------------------------implicit_null_check---------------------------- 77 // Detect implicit-null-check opportunities. Basically, find NULL checks 78 // with suitable memory ops nearby. Use the memory op to do the NULL check. 79 // I can generate a memory op if there is not one nearby. 80 // The proj is the control projection for the not-null case. 81 // The val is the pointer being checked for nullness or 82 // decodeHeapOop_not_null node if it did not fold into address. 83 void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) { 84 // Assume if null check need for 0 offset then always needed 85 // Intel solaris doesn't support any null checks yet and no 86 // mechanism exists (yet) to set the switches at an os_cpu level 87 if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return; 88 89 // Make sure the ptr-is-null path appears to be uncommon! 90 float f = block->end()->as_MachIf()->_prob; 91 if( proj->Opcode() == Op_IfTrue ) f = 1.0f - f; 92 if( f > PROB_UNLIKELY_MAG(4) ) return; 93 94 uint bidx = 0; // Capture index of value into memop 95 bool was_store; // Memory op is a store op 96 97 // Get the successor block for if the test ptr is non-null 98 Block* not_null_block; // this one goes with the proj 99 Block* null_block; 100 if (block->get_node(block->number_of_nodes()-1) == proj) { 101 null_block = block->_succs[0]; 102 not_null_block = block->_succs[1]; 103 } else { 104 assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other"); 105 not_null_block = block->_succs[0]; 106 null_block = block->_succs[1]; 107 } 108 while (null_block->is_Empty() == Block::empty_with_goto) { 109 null_block = null_block->_succs[0]; 110 } 111 112 // Search the exception block for an uncommon trap. 113 // (See Parse::do_if and Parse::do_ifnull for the reason 114 // we need an uncommon trap. Briefly, we need a way to 115 // detect failure of this optimization, as in 6366351.) 116 { 117 bool found_trap = false; 118 for (uint i1 = 0; i1 < null_block->number_of_nodes(); i1++) { 119 Node* nn = null_block->get_node(i1); 120 if (nn->is_MachCall() && 121 nn->as_MachCall()->entry_point() == SharedRuntime::uncommon_trap_blob()->entry_point()) { 122 const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type(); 123 if (trtype->isa_int() && trtype->is_int()->is_con()) { 124 jint tr_con = trtype->is_int()->get_con(); 125 Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con); 126 Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con); 127 assert((int)reason < (int)BitsPerInt, "recode bit map"); 128 if (is_set_nth_bit(allowed_reasons, (int) reason) 129 && action != Deoptimization::Action_none) { 130 // This uncommon trap is sure to recompile, eventually. 131 // When that happens, C->too_many_traps will prevent 132 // this transformation from happening again. 133 found_trap = true; 134 } 135 } 136 break; 137 } 138 } 139 if (!found_trap) { 140 // We did not find an uncommon trap. 141 return; 142 } 143 } 144 145 // Check for decodeHeapOop_not_null node which did not fold into address 146 bool is_decoden = ((intptr_t)val) & 1; 147 val = (Node*)(((intptr_t)val) & ~1); 148 149 assert(!is_decoden || (val->in(0) == NULL) && val->is_Mach() && 150 (val->as_Mach()->ideal_Opcode() == Op_DecodeN), "sanity"); 151 152 // Search the successor block for a load or store who's base value is also 153 // the tested value. There may be several. 154 Node_List *out = new Node_List(Thread::current()->resource_area()); 155 MachNode *best = NULL; // Best found so far 156 for (DUIterator i = val->outs(); val->has_out(i); i++) { 157 Node *m = val->out(i); 158 if( !m->is_Mach() ) continue; 159 MachNode *mach = m->as_Mach(); 160 was_store = false; 161 int iop = mach->ideal_Opcode(); 162 switch( iop ) { 163 case Op_LoadB: 164 case Op_LoadUB: 165 case Op_LoadUS: 166 case Op_LoadD: 167 case Op_LoadF: 168 case Op_LoadI: 169 case Op_LoadL: 170 case Op_LoadP: 171 case Op_LoadN: 172 case Op_LoadS: 173 case Op_LoadKlass: 174 case Op_LoadNKlass: 175 case Op_LoadRange: 176 case Op_LoadD_unaligned: 177 case Op_LoadL_unaligned: 178 case Op_ShenandoahReadBarrier: 179 case Op_ShenandoahWriteBarrier: 180 assert(mach->in(2) == val, "should be address"); 181 break; 182 case Op_StoreB: 183 case Op_StoreC: 184 case Op_StoreCM: 185 case Op_StoreD: 186 case Op_StoreF: 187 case Op_StoreI: 188 case Op_StoreL: 189 case Op_StoreP: 190 case Op_StoreN: 191 case Op_StoreNKlass: 192 was_store = true; // Memory op is a store op 193 // Stores will have their address in slot 2 (memory in slot 1). 194 // If the value being nul-checked is in another slot, it means we 195 // are storing the checked value, which does NOT check the value! 196 if( mach->in(2) != val ) continue; 197 break; // Found a memory op? 198 case Op_StrComp: 199 case Op_StrEquals: 200 case Op_StrIndexOf: 201 case Op_StrIndexOfChar: 202 case Op_AryEq: 203 case Op_StrInflatedCopy: 204 case Op_StrCompressedCopy: 205 case Op_EncodeISOArray: 206 case Op_HasNegatives: 207 // Not a legit memory op for implicit null check regardless of 208 // embedded loads 209 continue; 210 default: // Also check for embedded loads 211 if( !mach->needs_anti_dependence_check() ) 212 continue; // Not an memory op; skip it 213 if( must_clone[iop] ) { 214 // Do not move nodes which produce flags because 215 // RA will try to clone it to place near branch and 216 // it will cause recompilation, see clone_node(). 217 continue; 218 } 219 { 220 // Check that value is used in memory address in 221 // instructions with embedded load (CmpP val1,(val2+off)). 222 Node* base; 223 Node* index; 224 const MachOper* oper = mach->memory_inputs(base, index); 225 if (oper == NULL || oper == (MachOper*)-1) { 226 continue; // Not an memory op; skip it 227 } 228 if (val == base || 229 (val == index && val->bottom_type()->isa_narrowoop())) { 230 break; // Found it 231 } else { 232 continue; // Skip it 233 } 234 } 235 break; 236 } 237 238 // On some OSes (AIX) the page at address 0 is only write protected. 239 // If so, only Store operations will trap. 240 // But a read accessing the base of a heap-based compressed heap will trap. 241 if (!was_store && needs_explicit_null_check_for_read(val)) { 242 continue; 243 } 244 245 // Check that node's control edge is not-null block's head or dominates it, 246 // otherwise we can't hoist it because there are other control dependencies. 247 Node* ctrl = mach->in(0); 248 if (ctrl != NULL && !(ctrl == not_null_block->head() || 249 get_block_for_node(ctrl)->dominates(not_null_block))) { 250 continue; 251 } 252 253 // check if the offset is not too high for implicit exception 254 { 255 intptr_t offset = 0; 256 const TypePtr *adr_type = NULL; // Do not need this return value here 257 const Node* base = mach->get_base_and_disp(offset, adr_type); 258 if (base == NULL || base == NodeSentinel) { 259 // Narrow oop address doesn't have base, only index. 260 // Give up if offset is beyond page size or if heap base is not protected. 261 if (val->bottom_type()->isa_narrowoop() && 262 (MacroAssembler::needs_explicit_null_check(offset) || 263 !Universe::narrow_oop_use_implicit_null_checks())) 264 continue; 265 // cannot reason about it; is probably not implicit null exception 266 } else { 267 const TypePtr* tptr; 268 if (UseCompressedOops && (Universe::narrow_oop_shift() == 0 || 269 Universe::narrow_klass_shift() == 0)) { 270 // 32-bits narrow oop can be the base of address expressions 271 tptr = base->get_ptr_type(); 272 } else { 273 // only regular oops are expected here 274 tptr = base->bottom_type()->is_ptr(); 275 } 276 // Give up if offset is not a compile-time constant. 277 if (offset == Type::OffsetBot || tptr->_offset == Type::OffsetBot) 278 continue; 279 offset += tptr->_offset; // correct if base is offseted 280 // Give up if reference is beyond page size. 281 if (MacroAssembler::needs_explicit_null_check(offset)) 282 continue; 283 // Give up if base is a decode node and the heap base is not protected. 284 if (base->is_Mach() && base->as_Mach()->ideal_Opcode() == Op_DecodeN && 285 !Universe::narrow_oop_use_implicit_null_checks()) 286 continue; 287 } 288 } 289 290 // Check ctrl input to see if the null-check dominates the memory op 291 Block *cb = get_block_for_node(mach); 292 cb = cb->_idom; // Always hoist at least 1 block 293 if( !was_store ) { // Stores can be hoisted only one block 294 while( cb->_dom_depth > (block->_dom_depth + 1)) 295 cb = cb->_idom; // Hoist loads as far as we want 296 // The non-null-block should dominate the memory op, too. Live 297 // range spilling will insert a spill in the non-null-block if it is 298 // needs to spill the memory op for an implicit null check. 299 if (cb->_dom_depth == (block->_dom_depth + 1)) { 300 if (cb != not_null_block) continue; 301 cb = cb->_idom; 302 } 303 } 304 if( cb != block ) continue; 305 306 // Found a memory user; see if it can be hoisted to check-block 307 uint vidx = 0; // Capture index of value into memop 308 uint j; 309 for( j = mach->req()-1; j > 0; j-- ) { 310 if( mach->in(j) == val ) { 311 vidx = j; 312 // Ignore DecodeN val which could be hoisted to where needed. 313 if( is_decoden ) continue; 314 } 315 // Block of memory-op input 316 Block *inb = get_block_for_node(mach->in(j)); 317 Block *b = block; // Start from nul check 318 while( b != inb && b->_dom_depth > inb->_dom_depth ) 319 b = b->_idom; // search upwards for input 320 // See if input dominates null check 321 if( b != inb ) 322 break; 323 } 324 if( j > 0 ) 325 continue; 326 Block *mb = get_block_for_node(mach); 327 // Hoisting stores requires more checks for the anti-dependence case. 328 // Give up hoisting if we have to move the store past any load. 329 if( was_store ) { 330 Block *b = mb; // Start searching here for a local load 331 // mach use (faulting) trying to hoist 332 // n might be blocker to hoisting 333 while( b != block ) { 334 uint k; 335 for( k = 1; k < b->number_of_nodes(); k++ ) { 336 Node *n = b->get_node(k); 337 if( n->needs_anti_dependence_check() && 338 n->in(LoadNode::Memory) == mach->in(StoreNode::Memory) ) 339 break; // Found anti-dependent load 340 } 341 if( k < b->number_of_nodes() ) 342 break; // Found anti-dependent load 343 // Make sure control does not do a merge (would have to check allpaths) 344 if( b->num_preds() != 2 ) break; 345 b = get_block_for_node(b->pred(1)); // Move up to predecessor block 346 } 347 if( b != block ) continue; 348 } 349 350 // Make sure this memory op is not already being used for a NullCheck 351 Node *e = mb->end(); 352 if( e->is_MachNullCheck() && e->in(1) == mach ) 353 continue; // Already being used as a NULL check 354 355 // Found a candidate! Pick one with least dom depth - the highest 356 // in the dom tree should be closest to the null check. 357 if (best == NULL || get_block_for_node(mach)->_dom_depth < get_block_for_node(best)->_dom_depth) { 358 best = mach; 359 bidx = vidx; 360 } 361 } 362 // No candidate! 363 if (best == NULL) { 364 return; 365 } 366 367 // ---- Found an implicit null check 368 #ifndef PRODUCT 369 extern int implicit_null_checks; 370 implicit_null_checks++; 371 #endif 372 373 if( is_decoden ) { 374 // Check if we need to hoist decodeHeapOop_not_null first. 375 Block *valb = get_block_for_node(val); 376 if( block != valb && block->_dom_depth < valb->_dom_depth ) { 377 // Hoist it up to the end of the test block. 378 valb->find_remove(val); 379 block->add_inst(val); 380 map_node_to_block(val, block); 381 // DecodeN on x86 may kill flags. Check for flag-killing projections 382 // that also need to be hoisted. 383 for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) { 384 Node* n = val->fast_out(j); 385 if( n->is_MachProj() ) { 386 get_block_for_node(n)->find_remove(n); 387 block->add_inst(n); 388 map_node_to_block(n, block); 389 } 390 } 391 } 392 } 393 // Hoist the memory candidate up to the end of the test block. 394 Block *old_block = get_block_for_node(best); 395 old_block->find_remove(best); 396 block->add_inst(best); 397 map_node_to_block(best, block); 398 399 // Move the control dependence if it is pinned to not-null block. 400 // Don't change it in other cases: NULL or dominating control. 401 if (best->in(0) == not_null_block->head()) { 402 // Set it to control edge of null check. 403 best->set_req(0, proj->in(0)->in(0)); 404 } 405 406 // Check for flag-killing projections that also need to be hoisted 407 // Should be DU safe because no edge updates. 408 for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) { 409 Node* n = best->fast_out(j); 410 if( n->is_MachProj() || n->Opcode() == Op_ShenandoahWBMemProj) { 411 get_block_for_node(n)->find_remove(n); 412 block->add_inst(n); 413 map_node_to_block(n, block); 414 } 415 } 416 417 // proj==Op_True --> ne test; proj==Op_False --> eq test. 418 // One of two graph shapes got matched: 419 // (IfTrue (If (Bool NE (CmpP ptr NULL)))) 420 // (IfFalse (If (Bool EQ (CmpP ptr NULL)))) 421 // NULL checks are always branch-if-eq. If we see a IfTrue projection 422 // then we are replacing a 'ne' test with a 'eq' NULL check test. 423 // We need to flip the projections to keep the same semantics. 424 if( proj->Opcode() == Op_IfTrue ) { 425 // Swap order of projections in basic block to swap branch targets 426 Node *tmp1 = block->get_node(block->end_idx()+1); 427 Node *tmp2 = block->get_node(block->end_idx()+2); 428 block->map_node(tmp2, block->end_idx()+1); 429 block->map_node(tmp1, block->end_idx()+2); 430 Node *tmp = new Node(C->top()); // Use not NULL input 431 tmp1->replace_by(tmp); 432 tmp2->replace_by(tmp1); 433 tmp->replace_by(tmp2); 434 tmp->destruct(); 435 } 436 437 // Remove the existing null check; use a new implicit null check instead. 438 // Since schedule-local needs precise def-use info, we need to correct 439 // it as well. 440 Node *old_tst = proj->in(0); 441 MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx); 442 block->map_node(nul_chk, block->end_idx()); 443 map_node_to_block(nul_chk, block); 444 // Redirect users of old_test to nul_chk 445 for (DUIterator_Last i2min, i2 = old_tst->last_outs(i2min); i2 >= i2min; --i2) 446 old_tst->last_out(i2)->set_req(0, nul_chk); 447 // Clean-up any dead code 448 for (uint i3 = 0; i3 < old_tst->req(); i3++) { 449 Node* in = old_tst->in(i3); 450 old_tst->set_req(i3, NULL); 451 if (in->outcnt() == 0) { 452 // Remove dead input node 453 in->disconnect_inputs(NULL, C); 454 block->find_remove(in); 455 } 456 } 457 458 latency_from_uses(nul_chk); 459 latency_from_uses(best); 460 461 // insert anti-dependences to defs in this block 462 if (! best->needs_anti_dependence_check()) { 463 for (uint k = 1; k < block->number_of_nodes(); k++) { 464 Node *n = block->get_node(k); 465 if (n->needs_anti_dependence_check() && 466 n->in(LoadNode::Memory) == best->in(StoreNode::Memory)) { 467 // Found anti-dependent load 468 insert_anti_dependences(block, n); 469 } 470 } 471 } 472 } 473 474 475 //------------------------------select----------------------------------------- 476 // Select a nice fellow from the worklist to schedule next. If there is only 477 // one choice, then use it. Projections take top priority for correctness 478 // reasons - if I see a projection, then it is next. There are a number of 479 // other special cases, for instructions that consume condition codes, et al. 480 // These are chosen immediately. Some instructions are required to immediately 481 // precede the last instruction in the block, and these are taken last. Of the 482 // remaining cases (most), choose the instruction with the greatest latency 483 // (that is, the most number of pseudo-cycles required to the end of the 484 // routine). If there is a tie, choose the instruction with the most inputs. 485 Node* PhaseCFG::select( 486 Block* block, 487 Node_List &worklist, 488 GrowableArray<int> &ready_cnt, 489 VectorSet &next_call, 490 uint sched_slot, 491 intptr_t* recalc_pressure_nodes) { 492 493 // If only a single entry on the stack, use it 494 uint cnt = worklist.size(); 495 if (cnt == 1) { 496 Node *n = worklist[0]; 497 worklist.map(0,worklist.pop()); 498 return n; 499 } 500 501 uint choice = 0; // Bigger is most important 502 uint latency = 0; // Bigger is scheduled first 503 uint score = 0; // Bigger is better 504 int idx = -1; // Index in worklist 505 int cand_cnt = 0; // Candidate count 506 bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false; 507 508 for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist 509 // Order in worklist is used to break ties. 510 // See caller for how this is used to delay scheduling 511 // of induction variable increments to after the other 512 // uses of the phi are scheduled. 513 Node *n = worklist[i]; // Get Node on worklist 514 515 int iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : 0; 516 if( n->is_Proj() || // Projections always win 517 n->Opcode()== Op_Con || // So does constant 'Top' 518 iop == Op_CreateEx || // Create-exception must start block 519 iop == Op_CheckCastPP 520 ) { 521 worklist.map(i,worklist.pop()); 522 return n; 523 } 524 525 // Final call in a block must be adjacent to 'catch' 526 Node *e = block->end(); 527 if( e->is_Catch() && e->in(0)->in(0) == n ) 528 continue; 529 530 // Memory op for an implicit null check has to be at the end of the block 531 if( e->is_MachNullCheck() && e->in(1) == n ) 532 continue; 533 534 // Schedule IV increment last. 535 if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Op_CountedLoopEnd) { 536 // Cmp might be matched into CountedLoopEnd node. 537 Node *cmp = (e->in(1)->ideal_reg() == Op_RegFlags) ? e->in(1) : e; 538 if (cmp->req() > 1 && cmp->in(1) == n && n->is_iteratively_computed()) { 539 continue; 540 } 541 } 542 543 uint n_choice = 2; 544 545 // See if this instruction is consumed by a branch. If so, then (as the 546 // branch is the last instruction in the basic block) force it to the 547 // end of the basic block 548 if ( must_clone[iop] ) { 549 // See if any use is a branch 550 bool found_machif = false; 551 552 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) { 553 Node* use = n->fast_out(j); 554 555 // The use is a conditional branch, make them adjacent 556 if (use->is_MachIf() && get_block_for_node(use) == block) { 557 found_machif = true; 558 break; 559 } 560 561 // More than this instruction pending for successor to be ready, 562 // don't choose this if other opportunities are ready 563 if (ready_cnt.at(use->_idx) > 1) 564 n_choice = 1; 565 } 566 567 // loop terminated, prefer not to use this instruction 568 if (found_machif) 569 continue; 570 } 571 572 // See if this has a predecessor that is "must_clone", i.e. sets the 573 // condition code. If so, choose this first 574 for (uint j = 0; j < n->req() ; j++) { 575 Node *inn = n->in(j); 576 if (inn) { 577 if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) { 578 n_choice = 3; 579 break; 580 } 581 } 582 } 583 584 // MachTemps should be scheduled last so they are near their uses 585 if (n->is_MachTemp()) { 586 n_choice = 1; 587 } 588 589 uint n_latency = get_latency_for_node(n); 590 uint n_score = n->req(); // Many inputs get high score to break ties 591 592 if (OptoRegScheduling && block_size_threshold_ok) { 593 if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) { 594 _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit()); 595 _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit()); 596 // simulate the notion that we just picked this node to schedule 597 n->add_flag(Node::Flag_is_scheduled); 598 // now caculate its effect upon the graph if we did 599 adjust_register_pressure(n, block, recalc_pressure_nodes, false); 600 // return its state for finalize in case somebody else wins 601 n->remove_flag(Node::Flag_is_scheduled); 602 // now save the two final pressure components of register pressure, limiting pressure calcs to short size 603 short int_pressure = (short)_regalloc->_scratch_int_pressure.current_pressure(); 604 short float_pressure = (short)_regalloc->_scratch_float_pressure.current_pressure(); 605 recalc_pressure_nodes[n->_idx] = int_pressure; 606 recalc_pressure_nodes[n->_idx] |= (float_pressure << 16); 607 } 608 609 if (_scheduling_for_pressure) { 610 latency = n_latency; 611 if (n_choice != 3) { 612 // Now evaluate each register pressure component based on threshold in the score. 613 // In general the defining register type will dominate the score, ergo we will not see register pressure grow on both banks 614 // on a single instruction, but we might see it shrink on both banks. 615 // For each use of register that has a register class that is over the high pressure limit, we build n_score up for 616 // live ranges that terminate on this instruction. 617 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) { 618 short int_pressure = (short)recalc_pressure_nodes[n->_idx]; 619 n_score = (int_pressure < 0) ? ((score + n_score) - int_pressure) : (int_pressure > 0) ? 1 : n_score; 620 } 621 if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) { 622 short float_pressure = (short)(recalc_pressure_nodes[n->_idx] >> 16); 623 n_score = (float_pressure < 0) ? ((score + n_score) - float_pressure) : (float_pressure > 0) ? 1 : n_score; 624 } 625 } else { 626 // make sure we choose these candidates 627 score = 0; 628 } 629 } 630 } 631 632 // Keep best latency found 633 cand_cnt++; 634 if (choice < n_choice || 635 (choice == n_choice && 636 ((StressLCM && Compile::randomized_select(cand_cnt)) || 637 (!StressLCM && 638 (latency < n_latency || 639 (latency == n_latency && 640 (score < n_score))))))) { 641 choice = n_choice; 642 latency = n_latency; 643 score = n_score; 644 idx = i; // Also keep index in worklist 645 } 646 } // End of for all ready nodes in worklist 647 648 assert(idx >= 0, "index should be set"); 649 Node *n = worklist[(uint)idx]; // Get the winner 650 651 worklist.map((uint)idx, worklist.pop()); // Compress worklist 652 return n; 653 } 654 655 //-------------------------adjust_register_pressure---------------------------- 656 void PhaseCFG::adjust_register_pressure(Node* n, Block* block, intptr_t* recalc_pressure_nodes, bool finalize_mode) { 657 PhaseLive* liveinfo = _regalloc->get_live(); 658 IndexSet* liveout = liveinfo->live(block); 659 // first adjust the register pressure for the sources 660 for (uint i = 1; i < n->req(); i++) { 661 bool lrg_ends = false; 662 Node *src_n = n->in(i); 663 if (src_n == NULL) continue; 664 if (!src_n->is_Mach()) continue; 665 uint src = _regalloc->_lrg_map.find(src_n); 666 if (src == 0) continue; 667 LRG& lrg_src = _regalloc->lrgs(src); 668 // detect if the live range ends or not 669 if (liveout->member(src) == false) { 670 lrg_ends = true; 671 for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) { 672 Node* m = src_n->fast_out(j); // Get user 673 if (m == n) continue; 674 if (!m->is_Mach()) continue; 675 MachNode *mach = m->as_Mach(); 676 bool src_matches = false; 677 int iop = mach->ideal_Opcode(); 678 679 switch (iop) { 680 case Op_StoreB: 681 case Op_StoreC: 682 case Op_StoreCM: 683 case Op_StoreD: 684 case Op_StoreF: 685 case Op_StoreI: 686 case Op_StoreL: 687 case Op_StoreP: 688 case Op_StoreN: 689 case Op_StoreVector: 690 case Op_StoreNKlass: 691 for (uint k = 1; k < m->req(); k++) { 692 Node *in = m->in(k); 693 if (in == src_n) { 694 src_matches = true; 695 break; 696 } 697 } 698 break; 699 700 default: 701 src_matches = true; 702 break; 703 } 704 705 // If we have a store as our use, ignore the non source operands 706 if (src_matches == false) continue; 707 708 // Mark every unscheduled use which is not n with a recalculation 709 if ((get_block_for_node(m) == block) && (!m->is_scheduled())) { 710 if (finalize_mode && !m->is_Phi()) { 711 recalc_pressure_nodes[m->_idx] = 0x7fff7fff; 712 } 713 lrg_ends = false; 714 } 715 } 716 } 717 // if none, this live range ends and we can adjust register pressure 718 if (lrg_ends) { 719 if (finalize_mode) { 720 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure); 721 } else { 722 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure); 723 } 724 } 725 } 726 727 // now add the register pressure from the dest and evaluate which heuristic we should use: 728 // 1.) The default, latency scheduling 729 // 2.) Register pressure scheduling based on the high pressure limit threshold for int or float register stacks 730 uint dst = _regalloc->_lrg_map.find(n); 731 if (dst != 0) { 732 LRG& lrg_dst = _regalloc->lrgs(dst); 733 if (finalize_mode) { 734 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure); 735 // check to see if we fall over the register pressure cliff here 736 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) { 737 _scheduling_for_pressure = true; 738 } else if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) { 739 _scheduling_for_pressure = true; 740 } else { 741 // restore latency scheduling mode 742 _scheduling_for_pressure = false; 743 } 744 } else { 745 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure); 746 } 747 } 748 } 749 750 //------------------------------set_next_call---------------------------------- 751 void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) { 752 if( next_call.test_set(n->_idx) ) return; 753 for( uint i=0; i<n->len(); i++ ) { 754 Node *m = n->in(i); 755 if( !m ) continue; // must see all nodes in block that precede call 756 if (get_block_for_node(m) == block) { 757 set_next_call(block, m, next_call); 758 } 759 } 760 } 761 762 //------------------------------needed_for_next_call--------------------------- 763 // Set the flag 'next_call' for each Node that is needed for the next call to 764 // be scheduled. This flag lets me bias scheduling so Nodes needed for the 765 // next subroutine call get priority - basically it moves things NOT needed 766 // for the next call till after the call. This prevents me from trying to 767 // carry lots of stuff live across a call. 768 void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) { 769 // Find the next control-defining Node in this block 770 Node* call = NULL; 771 for (DUIterator_Fast imax, i = this_call->fast_outs(imax); i < imax; i++) { 772 Node* m = this_call->fast_out(i); 773 if (get_block_for_node(m) == block && // Local-block user 774 m != this_call && // Not self-start node 775 m->is_MachCall()) { 776 call = m; 777 break; 778 } 779 } 780 if (call == NULL) return; // No next call (e.g., block end is near) 781 // Set next-call for all inputs to this call 782 set_next_call(block, call, next_call); 783 } 784 785 //------------------------------add_call_kills------------------------------------- 786 // helper function that adds caller save registers to MachProjNode 787 static void add_call_kills(MachProjNode *proj, RegMask& regs, const char* save_policy, bool exclude_soe, bool exclude_fp) { 788 // Fill in the kill mask for the call 789 for( OptoReg::Name r = OptoReg::Name(0); r < _last_Mach_Reg; r=OptoReg::add(r,1) ) { 790 if (exclude_fp && (register_save_type[r] == Op_RegF || register_save_type[r] == Op_RegD)) { 791 continue; 792 } 793 if( !regs.Member(r) ) { // Not already defined by the call 794 // Save-on-call register? 795 if ((save_policy[r] == 'C') || 796 (save_policy[r] == 'A') || 797 ((save_policy[r] == 'E') && exclude_soe)) { 798 proj->_rout.Insert(r); 799 } 800 } 801 } 802 } 803 804 805 //------------------------------sched_call------------------------------------- 806 uint PhaseCFG::sched_call(Block* block, uint node_cnt, Node_List& worklist, GrowableArray<int>& ready_cnt, MachCallNode* mcall, VectorSet& next_call) { 807 RegMask regs; 808 809 // Schedule all the users of the call right now. All the users are 810 // projection Nodes, so they must be scheduled next to the call. 811 // Collect all the defined registers. 812 for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) { 813 Node* n = mcall->fast_out(i); 814 assert( n->is_MachProj(), "" ); 815 int n_cnt = ready_cnt.at(n->_idx)-1; 816 ready_cnt.at_put(n->_idx, n_cnt); 817 assert( n_cnt == 0, "" ); 818 // Schedule next to call 819 block->map_node(n, node_cnt++); 820 // Collect defined registers 821 regs.OR(n->out_RegMask()); 822 // Check for scheduling the next control-definer 823 if( n->bottom_type() == Type::CONTROL ) 824 // Warm up next pile of heuristic bits 825 needed_for_next_call(block, n, next_call); 826 827 // Children of projections are now all ready 828 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) { 829 Node* m = n->fast_out(j); // Get user 830 if(get_block_for_node(m) != block) { 831 continue; 832 } 833 if( m->is_Phi() ) continue; 834 int m_cnt = ready_cnt.at(m->_idx) - 1; 835 ready_cnt.at_put(m->_idx, m_cnt); 836 if( m_cnt == 0 ) 837 worklist.push(m); 838 } 839 840 } 841 842 // Act as if the call defines the Frame Pointer. 843 // Certainly the FP is alive and well after the call. 844 regs.Insert(_matcher.c_frame_pointer()); 845 846 // Set all registers killed and not already defined by the call. 847 uint r_cnt = mcall->tf()->range()->cnt(); 848 int op = mcall->ideal_Opcode(); 849 MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj ); 850 map_node_to_block(proj, block); 851 block->insert_node(proj, node_cnt++); 852 853 // Select the right register save policy. 854 const char *save_policy = NULL; 855 switch (op) { 856 case Op_CallRuntime: 857 case Op_CallLeaf: 858 case Op_CallLeafNoFP: 859 // Calling C code so use C calling convention 860 save_policy = _matcher._c_reg_save_policy; 861 break; 862 863 case Op_CallStaticJava: 864 case Op_CallDynamicJava: 865 // Calling Java code so use Java calling convention 866 save_policy = _matcher._register_save_policy; 867 break; 868 869 default: 870 ShouldNotReachHere(); 871 } 872 873 // When using CallRuntime mark SOE registers as killed by the call 874 // so values that could show up in the RegisterMap aren't live in a 875 // callee saved register since the register wouldn't know where to 876 // find them. CallLeaf and CallLeafNoFP are ok because they can't 877 // have debug info on them. Strictly speaking this only needs to be 878 // done for oops since idealreg2debugmask takes care of debug info 879 // references but there no way to handle oops differently than other 880 // pointers as far as the kill mask goes. 881 bool exclude_soe = op == Op_CallRuntime; 882 883 // If the call is a MethodHandle invoke, we need to exclude the 884 // register which is used to save the SP value over MH invokes from 885 // the mask. Otherwise this register could be used for 886 // deoptimization information. 887 if (op == Op_CallStaticJava) { 888 MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall; 889 if (mcallstaticjava->_method_handle_invoke) 890 proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask()); 891 } 892 893 if (UseShenandoahGC && mcall->entry_point() == StubRoutines::shenandoah_wb_C()) { 894 assert(op == Op_CallLeafNoFP, "shenandoah_wb_C should be called with Op_CallLeafNoFP"); 895 add_call_kills(proj, regs, save_policy, exclude_soe, true); 896 } else { 897 add_call_kills(proj, regs, save_policy, exclude_soe, false); 898 } 899 900 return node_cnt; 901 } 902 903 void PhaseCFG::push_ready_nodes(Node* n, Node* m, Block* block, GrowableArray<int>& ready_cnt, Node_List& worklist, uint max_idx, int c) { 904 if (get_block_for_node(m) != block) { 905 return; 906 } 907 if (m->is_Phi()) { 908 return; 909 } 910 if (m->_idx >= max_idx) { // new node, skip it 911 assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types"); 912 return; 913 } 914 int m_cnt = ready_cnt.at(m->_idx) - c; 915 ready_cnt.at_put(m->_idx, m_cnt); 916 if (m_cnt == 0) { 917 worklist.push(m); 918 } 919 } 920 921 //------------------------------schedule_local--------------------------------- 922 // Topological sort within a block. Someday become a real scheduler. 923 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) { 924 // Already "sorted" are the block start Node (as the first entry), and 925 // the block-ending Node and any trailing control projections. We leave 926 // these alone. PhiNodes and ParmNodes are made to follow the block start 927 // Node. Everything else gets topo-sorted. 928 929 #ifndef PRODUCT 930 if (trace_opto_pipelining()) { 931 tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order); 932 for (uint i = 0;i < block->number_of_nodes(); i++) { 933 tty->print("# "); 934 block->get_node(i)->fast_dump(); 935 } 936 tty->print_cr("#"); 937 } 938 #endif 939 940 // RootNode is already sorted 941 if (block->number_of_nodes() == 1) { 942 return true; 943 } 944 945 bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false; 946 947 // We track the uses of local definitions as input dependences so that 948 // we know when a given instruction is avialable to be scheduled. 949 uint i; 950 if (OptoRegScheduling && block_size_threshold_ok) { 951 for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc 952 Node *n = block->get_node(i); 953 n->remove_flag(Node::Flag_is_scheduled); 954 if (!n->is_Phi()) { 955 recalc_pressure_nodes[n->_idx] = 0x7fff7fff; 956 } 957 } 958 } else { 959 #ifdef ASSERT 960 for (i = 1; i < block->number_of_nodes(); i++) { 961 Node *n = block->get_node(i); 962 assert(!n->is_scheduled(), "shouldn't be scheduled yet"); 963 } 964 #endif 965 } 966 967 // Move PhiNodes and ParmNodes from 1 to cnt up to the start 968 uint node_cnt = block->end_idx(); 969 uint phi_cnt = 1; 970 for( i = 1; i<node_cnt; i++ ) { // Scan for Phi 971 Node *n = block->get_node(i); 972 if( n->is_Phi() || // Found a PhiNode or ParmNode 973 (n->is_Proj() && n->in(0) == block->head()) ) { 974 // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt 975 block->map_node(block->get_node(phi_cnt), i); 976 block->map_node(n, phi_cnt++); // swap Phi/Parm up front 977 // mark n as scheduled 978 n->add_flag(Node::Flag_is_scheduled); 979 } else { // All others 980 // Count block-local inputs to 'n' 981 uint cnt = n->len(); // Input count 982 uint local = 0; 983 for( uint j=0; j<cnt; j++ ) { 984 Node *m = n->in(j); 985 if( m && get_block_for_node(m) == block && !m->is_top() ) 986 local++; // One more block-local input 987 } 988 ready_cnt.at_put(n->_idx, local); // Count em up 989 990 #ifdef ASSERT 991 if( UseConcMarkSweepGC || UseG1GC ) { 992 if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_StoreCM ) { 993 // Check the precedence edges 994 for (uint prec = n->req(); prec < n->len(); prec++) { 995 Node* oop_store = n->in(prec); 996 if (oop_store != NULL) { 997 assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark"); 998 } 999 } 1000 } 1001 } 1002 #endif 1003 1004 // A few node types require changing a required edge to a precedence edge 1005 // before allocation. 1006 if( n->is_Mach() && n->req() > TypeFunc::Parms && 1007 (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire || 1008 n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) { 1009 // MemBarAcquire could be created without Precedent edge. 1010 // del_req() replaces the specified edge with the last input edge 1011 // and then removes the last edge. If the specified edge > number of 1012 // edges the last edge will be moved outside of the input edges array 1013 // and the edge will be lost. This is why this code should be 1014 // executed only when Precedent (== TypeFunc::Parms) edge is present. 1015 Node *x = n->in(TypeFunc::Parms); 1016 if (x != NULL && get_block_for_node(x) == block && n->find_prec_edge(x) != -1) { 1017 // Old edge to node within same block will get removed, but no precedence 1018 // edge will get added because it already exists. Update ready count. 1019 int cnt = ready_cnt.at(n->_idx); 1020 assert(cnt > 1, "MemBar node %d must not get ready here", n->_idx); 1021 ready_cnt.at_put(n->_idx, cnt-1); 1022 } 1023 n->del_req(TypeFunc::Parms); 1024 n->add_prec(x); 1025 } 1026 } 1027 } 1028 for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count 1029 ready_cnt.at_put(block->get_node(i2)->_idx, 0); 1030 1031 // All the prescheduled guys do not hold back internal nodes 1032 uint i3; 1033 for (i3 = 0; i3 < phi_cnt; i3++) { // For all pre-scheduled 1034 Node *n = block->get_node(i3); // Get pre-scheduled 1035 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) { 1036 Node* m = n->fast_out(j); 1037 if (get_block_for_node(m) == block) { // Local-block user 1038 int m_cnt = ready_cnt.at(m->_idx)-1; 1039 // mark m as scheduled 1040 if (m_cnt < 0) { 1041 m->add_flag(Node::Flag_is_scheduled); 1042 } 1043 ready_cnt.at_put(m->_idx, m_cnt); // Fix ready count 1044 } 1045 } 1046 } 1047 1048 Node_List delay; 1049 // Make a worklist 1050 Node_List worklist; 1051 for(uint i4=i3; i4<node_cnt; i4++ ) { // Put ready guys on worklist 1052 Node *m = block->get_node(i4); 1053 if( !ready_cnt.at(m->_idx) ) { // Zero ready count? 1054 if (m->is_iteratively_computed()) { 1055 // Push induction variable increments last to allow other uses 1056 // of the phi to be scheduled first. The select() method breaks 1057 // ties in scheduling by worklist order. 1058 delay.push(m); 1059 } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) { 1060 // Force the CreateEx to the top of the list so it's processed 1061 // first and ends up at the start of the block. 1062 worklist.insert(0, m); 1063 } else { 1064 worklist.push(m); // Then on to worklist! 1065 } 1066 } 1067 } 1068 while (delay.size()) { 1069 Node* d = delay.pop(); 1070 worklist.push(d); 1071 } 1072 1073 if (OptoRegScheduling && block_size_threshold_ok) { 1074 // To stage register pressure calculations we need to examine the live set variables 1075 // breaking them up by register class to compartmentalize the calculations. 1076 uint float_pressure = Matcher::float_pressure(FLOATPRESSURE); 1077 _regalloc->_sched_int_pressure.init(INTPRESSURE); 1078 _regalloc->_sched_float_pressure.init(float_pressure); 1079 _regalloc->_scratch_int_pressure.init(INTPRESSURE); 1080 _regalloc->_scratch_float_pressure.init(float_pressure); 1081 1082 _regalloc->compute_entry_block_pressure(block); 1083 } 1084 1085 // Warm up the 'next_call' heuristic bits 1086 needed_for_next_call(block, block->head(), next_call); 1087 1088 #ifndef PRODUCT 1089 if (trace_opto_pipelining()) { 1090 for (uint j=0; j< block->number_of_nodes(); j++) { 1091 Node *n = block->get_node(j); 1092 int idx = n->_idx; 1093 tty->print("# ready cnt:%3d ", ready_cnt.at(idx)); 1094 tty->print("latency:%3d ", get_latency_for_node(n)); 1095 tty->print("%4d: %s\n", idx, n->Name()); 1096 } 1097 } 1098 #endif 1099 1100 uint max_idx = (uint)ready_cnt.length(); 1101 // Pull from worklist and schedule 1102 while( worklist.size() ) { // Worklist is not ready 1103 1104 #ifndef PRODUCT 1105 if (trace_opto_pipelining()) { 1106 tty->print("# ready list:"); 1107 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist 1108 Node *n = worklist[i]; // Get Node on worklist 1109 tty->print(" %d", n->_idx); 1110 } 1111 tty->cr(); 1112 } 1113 #endif 1114 1115 // Select and pop a ready guy from worklist 1116 Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt, recalc_pressure_nodes); 1117 block->map_node(n, phi_cnt++); // Schedule him next 1118 1119 n->add_flag(Node::Flag_is_scheduled); 1120 1121 if (OptoRegScheduling && block_size_threshold_ok) { 1122 // Now adjust the resister pressure with the node we selected 1123 if (!n->is_Phi()) { 1124 adjust_register_pressure(n, block, recalc_pressure_nodes, true); 1125 } 1126 } 1127 1128 #ifndef PRODUCT 1129 if (trace_opto_pipelining()) { 1130 tty->print("# select %d: %s", n->_idx, n->Name()); 1131 tty->print(", latency:%d", get_latency_for_node(n)); 1132 n->dump(); 1133 if (Verbose) { 1134 tty->print("# ready list:"); 1135 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist 1136 Node *n = worklist[i]; // Get Node on worklist 1137 tty->print(" %d", n->_idx); 1138 } 1139 tty->cr(); 1140 } 1141 } 1142 1143 #endif 1144 if( n->is_MachCall() ) { 1145 MachCallNode *mcall = n->as_MachCall(); 1146 phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call); 1147 continue; 1148 } 1149 1150 if (n->is_Mach() && n->as_Mach()->has_call()) { 1151 RegMask regs; 1152 regs.Insert(_matcher.c_frame_pointer()); 1153 regs.OR(n->out_RegMask()); 1154 1155 MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj ); 1156 map_node_to_block(proj, block); 1157 block->insert_node(proj, phi_cnt++); 1158 1159 add_call_kills(proj, regs, _matcher._c_reg_save_policy, false, false); 1160 } 1161 1162 // Children are now all ready 1163 for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) { 1164 Node* m = n->fast_out(i5); // Get user 1165 push_ready_nodes(n, m, block, ready_cnt, worklist, max_idx, 1); 1166 } 1167 1168 replace_uses_with_shenandoah_barrier(n, block, worklist, ready_cnt, max_idx, phi_cnt); 1169 } 1170 1171 if( phi_cnt != block->end_idx() ) { 1172 // did not schedule all. Retry, Bailout, or Die 1173 if (C->subsume_loads() == true && !C->failing()) { 1174 // Retry with subsume_loads == false 1175 // If this is the first failure, the sentinel string will "stick" 1176 // to the Compile object, and the C2Compiler will see it and retry. 1177 C->record_failure(C2Compiler::retry_no_subsuming_loads()); 1178 } else { 1179 assert(false, "graph should be schedulable"); 1180 } 1181 // assert( phi_cnt == end_idx(), "did not schedule all" ); 1182 return false; 1183 } 1184 1185 if (OptoRegScheduling && block_size_threshold_ok) { 1186 _regalloc->compute_exit_block_pressure(block); 1187 block->_reg_pressure = _regalloc->_sched_int_pressure.final_pressure(); 1188 block->_freg_pressure = _regalloc->_sched_float_pressure.final_pressure(); 1189 } 1190 1191 #ifndef PRODUCT 1192 if (trace_opto_pipelining()) { 1193 tty->print_cr("#"); 1194 tty->print_cr("# after schedule_local"); 1195 for (uint i = 0;i < block->number_of_nodes();i++) { 1196 tty->print("# "); 1197 block->get_node(i)->fast_dump(); 1198 } 1199 tty->print_cr("# "); 1200 1201 if (OptoRegScheduling && block_size_threshold_ok) { 1202 tty->print_cr("# pressure info : %d", block->_pre_order); 1203 _regalloc->print_pressure_info(_regalloc->_sched_int_pressure, "int register info"); 1204 _regalloc->print_pressure_info(_regalloc->_sched_float_pressure, "float register info"); 1205 } 1206 tty->cr(); 1207 } 1208 #endif 1209 1210 return true; 1211 } 1212 1213 //--------------------------catch_cleanup_fix_all_inputs----------------------- 1214 static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) { 1215 for (uint l = 0; l < use->len(); l++) { 1216 if (use->in(l) == old_def) { 1217 if (l < use->req()) { 1218 use->set_req(l, new_def); 1219 } else { 1220 use->rm_prec(l); 1221 use->add_prec(new_def); 1222 l--; 1223 } 1224 } 1225 } 1226 } 1227 1228 //------------------------------catch_cleanup_find_cloned_def------------------ 1229 Node* PhaseCFG::catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) { 1230 assert( use_blk != def_blk, "Inter-block cleanup only"); 1231 1232 // The use is some block below the Catch. Find and return the clone of the def 1233 // that dominates the use. If there is no clone in a dominating block, then 1234 // create a phi for the def in a dominating block. 1235 1236 // Find which successor block dominates this use. The successor 1237 // blocks must all be single-entry (from the Catch only; I will have 1238 // split blocks to make this so), hence they all dominate. 1239 while( use_blk->_dom_depth > def_blk->_dom_depth+1 ) 1240 use_blk = use_blk->_idom; 1241 1242 // Find the successor 1243 Node *fixup = NULL; 1244 1245 uint j; 1246 for( j = 0; j < def_blk->_num_succs; j++ ) 1247 if( use_blk == def_blk->_succs[j] ) 1248 break; 1249 1250 if( j == def_blk->_num_succs ) { 1251 // Block at same level in dom-tree is not a successor. It needs a 1252 // PhiNode, the PhiNode uses from the def and IT's uses need fixup. 1253 Node_Array inputs = new Node_List(Thread::current()->resource_area()); 1254 for(uint k = 1; k < use_blk->num_preds(); k++) { 1255 Block* block = get_block_for_node(use_blk->pred(k)); 1256 inputs.map(k, catch_cleanup_find_cloned_def(block, def, def_blk, n_clone_idx)); 1257 } 1258 1259 // Check to see if the use_blk already has an identical phi inserted. 1260 // If it exists, it will be at the first position since all uses of a 1261 // def are processed together. 1262 Node *phi = use_blk->get_node(1); 1263 if( phi->is_Phi() ) { 1264 fixup = phi; 1265 for (uint k = 1; k < use_blk->num_preds(); k++) { 1266 if (phi->in(k) != inputs[k]) { 1267 // Not a match 1268 fixup = NULL; 1269 break; 1270 } 1271 } 1272 } 1273 1274 // If an existing PhiNode was not found, make a new one. 1275 if (fixup == NULL) { 1276 Node *new_phi = PhiNode::make(use_blk->head(), def); 1277 use_blk->insert_node(new_phi, 1); 1278 map_node_to_block(new_phi, use_blk); 1279 for (uint k = 1; k < use_blk->num_preds(); k++) { 1280 new_phi->set_req(k, inputs[k]); 1281 } 1282 fixup = new_phi; 1283 } 1284 1285 } else { 1286 // Found the use just below the Catch. Make it use the clone. 1287 fixup = use_blk->get_node(n_clone_idx); 1288 } 1289 1290 return fixup; 1291 } 1292 1293 //--------------------------catch_cleanup_intra_block-------------------------- 1294 // Fix all input edges in use that reference "def". The use is in the same 1295 // block as the def and both have been cloned in each successor block. 1296 static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg, int n_clone_idx) { 1297 1298 // Both the use and def have been cloned. For each successor block, 1299 // get the clone of the use, and make its input the clone of the def 1300 // found in that block. 1301 1302 uint use_idx = blk->find_node(use); 1303 uint offset_idx = use_idx - beg; 1304 for( uint k = 0; k < blk->_num_succs; k++ ) { 1305 // Get clone in each successor block 1306 Block *sb = blk->_succs[k]; 1307 Node *clone = sb->get_node(offset_idx+1); 1308 assert( clone->Opcode() == use->Opcode(), "" ); 1309 1310 // Make use-clone reference the def-clone 1311 catch_cleanup_fix_all_inputs(clone, def, sb->get_node(n_clone_idx)); 1312 } 1313 } 1314 1315 //------------------------------catch_cleanup_inter_block--------------------- 1316 // Fix all input edges in use that reference "def". The use is in a different 1317 // block than the def. 1318 void PhaseCFG::catch_cleanup_inter_block(Node *use, Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) { 1319 if( !use_blk ) return; // Can happen if the use is a precedence edge 1320 1321 Node *new_def = catch_cleanup_find_cloned_def(use_blk, def, def_blk, n_clone_idx); 1322 catch_cleanup_fix_all_inputs(use, def, new_def); 1323 } 1324 1325 //------------------------------call_catch_cleanup----------------------------- 1326 // If we inserted any instructions between a Call and his CatchNode, 1327 // clone the instructions on all paths below the Catch. 1328 void PhaseCFG::call_catch_cleanup(Block* block) { 1329 1330 // End of region to clone 1331 uint end = block->end_idx(); 1332 if( !block->get_node(end)->is_Catch() ) return; 1333 // Start of region to clone 1334 uint beg = end; 1335 while(!block->get_node(beg-1)->is_MachProj() || 1336 !block->get_node(beg-1)->in(0)->is_MachCall() ) { 1337 beg--; 1338 assert(beg > 0,"Catch cleanup walking beyond block boundary"); 1339 } 1340 // Range of inserted instructions is [beg, end) 1341 if( beg == end ) return; 1342 1343 // Clone along all Catch output paths. Clone area between the 'beg' and 1344 // 'end' indices. 1345 for( uint i = 0; i < block->_num_succs; i++ ) { 1346 Block *sb = block->_succs[i]; 1347 // Clone the entire area; ignoring the edge fixup for now. 1348 for( uint j = end; j > beg; j-- ) { 1349 Node *clone = block->get_node(j-1)->clone(); 1350 sb->insert_node(clone, 1); 1351 map_node_to_block(clone, sb); 1352 if (clone->needs_anti_dependence_check()) { 1353 insert_anti_dependences(sb, clone); 1354 } 1355 } 1356 } 1357 1358 1359 // Fixup edges. Check the def-use info per cloned Node 1360 for(uint i2 = beg; i2 < end; i2++ ) { 1361 uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block 1362 Node *n = block->get_node(i2); // Node that got cloned 1363 // Need DU safe iterator because of edge manipulation in calls. 1364 Unique_Node_List *out = new Unique_Node_List(Thread::current()->resource_area()); 1365 for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) { 1366 out->push(n->fast_out(j1)); 1367 } 1368 uint max = out->size(); 1369 for (uint j = 0; j < max; j++) {// For all users 1370 Node *use = out->pop(); 1371 Block *buse = get_block_for_node(use); 1372 if( use->is_Phi() ) { 1373 for( uint k = 1; k < use->req(); k++ ) 1374 if( use->in(k) == n ) { 1375 Block* b = get_block_for_node(buse->pred(k)); 1376 Node *fixup = catch_cleanup_find_cloned_def(b, n, block, n_clone_idx); 1377 use->set_req(k, fixup); 1378 } 1379 } else { 1380 if (block == buse) { 1381 catch_cleanup_intra_block(use, n, block, beg, n_clone_idx); 1382 } else { 1383 catch_cleanup_inter_block(use, buse, n, block, n_clone_idx); 1384 } 1385 } 1386 } // End for all users 1387 1388 } // End of for all Nodes in cloned area 1389 1390 // Remove the now-dead cloned ops 1391 for(uint i3 = beg; i3 < end; i3++ ) { 1392 block->get_node(beg)->disconnect_inputs(NULL, C); 1393 block->remove_node(beg); 1394 } 1395 1396 // If the successor blocks have a CreateEx node, move it back to the top 1397 for(uint i4 = 0; i4 < block->_num_succs; i4++ ) { 1398 Block *sb = block->_succs[i4]; 1399 uint new_cnt = end - beg; 1400 // Remove any newly created, but dead, nodes. 1401 for( uint j = new_cnt; j > 0; j-- ) { 1402 Node *n = sb->get_node(j); 1403 if (n->outcnt() == 0 && 1404 (!n->is_Proj() || n->as_Proj()->in(0)->outcnt() == 1) ){ 1405 n->disconnect_inputs(NULL, C); 1406 sb->remove_node(j); 1407 new_cnt--; 1408 } 1409 } 1410 // If any newly created nodes remain, move the CreateEx node to the top 1411 if (new_cnt > 0) { 1412 Node *cex = sb->get_node(1+new_cnt); 1413 if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) { 1414 sb->remove_node(1+new_cnt); 1415 sb->insert_node(cex, 1); 1416 } 1417 } 1418 } 1419 }