1 /*
2 * Copyright (c) 1998, 2018, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/macroAssembler.inline.hpp"
27 #include "memory/allocation.inline.hpp"
28 #include "opto/ad.hpp"
29 #include "opto/block.hpp"
30 #include "opto/c2compiler.hpp"
31 #include "opto/callnode.hpp"
32 #include "opto/cfgnode.hpp"
33 #include "opto/machnode.hpp"
34 #include "opto/runtime.hpp"
35 #include "opto/chaitin.hpp"
36 #include "runtime/sharedRuntime.hpp"
37 #include "utilities/macros.hpp"
38 #if INCLUDE_SHENANDOAHGC
39 #include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp"
40 #endif
41
42 // Optimization - Graph Style
43
44 // Check whether val is not-null-decoded compressed oop,
45 // i.e. will grab into the base of the heap if it represents NULL.
46 static bool accesses_heap_base_zone(Node *val) {
47 if (Universe::narrow_oop_base() != NULL) { // Implies UseCompressedOops.
48 if (val && val->is_Mach()) {
49 if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) {
50 // This assumes all Decodes with TypePtr::NotNull are matched to nodes that
51 // decode NULL to point to the heap base (Decode_NN).
52 if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) {
53 return true;
54 }
55 }
56 // Must recognize load operation with Decode matched in memory operand.
57 // We should not reach here exept for PPC/AIX, as os::zero_page_read_protected()
58 // returns true everywhere else. On PPC, no such memory operands
59 // exist, therefore we did not yet implement a check for such operands.
60 NOT_AIX(Unimplemented());
61 }
62 }
63 return false;
64 }
65
66 static bool needs_explicit_null_check_for_read(Node *val) {
67 // On some OSes (AIX) the page at address 0 is only write protected.
68 // If so, only Store operations will trap.
69 if (os::zero_page_read_protected()) {
70 return false; // Implicit null check will work.
71 }
72 // Also a read accessing the base of a heap-based compressed heap will trap.
73 if (accesses_heap_base_zone(val) && // Hits the base zone page.
74 Universe::narrow_oop_use_implicit_null_checks()) { // Base zone page is protected.
75 return false;
76 }
77
78 return true;
79 }
80
81 //------------------------------implicit_null_check----------------------------
82 // Detect implicit-null-check opportunities. Basically, find NULL checks
83 // with suitable memory ops nearby. Use the memory op to do the NULL check.
84 // I can generate a memory op if there is not one nearby.
85 // The proj is the control projection for the not-null case.
86 // The val is the pointer being checked for nullness or
87 // decodeHeapOop_not_null node if it did not fold into address.
88 void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) {
89 // Assume if null check need for 0 offset then always needed
90 // Intel solaris doesn't support any null checks yet and no
91 // mechanism exists (yet) to set the switches at an os_cpu level
92 if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return;
93
94 // Make sure the ptr-is-null path appears to be uncommon!
95 float f = block->end()->as_MachIf()->_prob;
96 if( proj->Opcode() == Op_IfTrue ) f = 1.0f - f;
97 if( f > PROB_UNLIKELY_MAG(4) ) return;
98
99 uint bidx = 0; // Capture index of value into memop
100 bool was_store; // Memory op is a store op
101
102 // Get the successor block for if the test ptr is non-null
103 Block* not_null_block; // this one goes with the proj
104 Block* null_block;
105 if (block->get_node(block->number_of_nodes()-1) == proj) {
106 null_block = block->_succs[0];
107 not_null_block = block->_succs[1];
108 } else {
109 assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other");
110 not_null_block = block->_succs[0];
111 null_block = block->_succs[1];
112 }
113 while (null_block->is_Empty() == Block::empty_with_goto) {
114 null_block = null_block->_succs[0];
115 }
116
117 // Search the exception block for an uncommon trap.
118 // (See Parse::do_if and Parse::do_ifnull for the reason
119 // we need an uncommon trap. Briefly, we need a way to
120 // detect failure of this optimization, as in 6366351.)
121 {
122 bool found_trap = false;
123 for (uint i1 = 0; i1 < null_block->number_of_nodes(); i1++) {
124 Node* nn = null_block->get_node(i1);
125 if (nn->is_MachCall() &&
126 nn->as_MachCall()->entry_point() == SharedRuntime::uncommon_trap_blob()->entry_point()) {
127 const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type();
128 if (trtype->isa_int() && trtype->is_int()->is_con()) {
129 jint tr_con = trtype->is_int()->get_con();
130 Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con);
131 Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con);
132 assert((int)reason < (int)BitsPerInt, "recode bit map");
133 if (is_set_nth_bit(allowed_reasons, (int) reason)
134 && action != Deoptimization::Action_none) {
135 // This uncommon trap is sure to recompile, eventually.
136 // When that happens, C->too_many_traps will prevent
137 // this transformation from happening again.
138 found_trap = true;
139 }
140 }
141 break;
142 }
143 }
144 if (!found_trap) {
145 // We did not find an uncommon trap.
146 return;
147 }
148 }
149
150 // Check for decodeHeapOop_not_null node which did not fold into address
151 bool is_decoden = ((intptr_t)val) & 1;
152 val = (Node*)(((intptr_t)val) & ~1);
153
154 assert(!is_decoden || (val->in(0) == NULL) && val->is_Mach() &&
155 (val->as_Mach()->ideal_Opcode() == Op_DecodeN), "sanity");
156
157 // Search the successor block for a load or store who's base value is also
158 // the tested value. There may be several.
159 Node_List *out = new Node_List(Thread::current()->resource_area());
160 MachNode *best = NULL; // Best found so far
161 for (DUIterator i = val->outs(); val->has_out(i); i++) {
162 Node *m = val->out(i);
163 if( !m->is_Mach() ) continue;
164 MachNode *mach = m->as_Mach();
165 was_store = false;
166 int iop = mach->ideal_Opcode();
167 switch( iop ) {
168 case Op_LoadB:
169 case Op_LoadUB:
170 case Op_LoadUS:
171 case Op_LoadD:
172 case Op_LoadF:
173 case Op_LoadI:
174 case Op_LoadL:
175 case Op_LoadP:
176 case Op_LoadBarrierSlowReg:
177 case Op_LoadBarrierWeakSlowReg:
178 case Op_LoadN:
179 case Op_LoadS:
180 case Op_LoadKlass:
181 case Op_LoadNKlass:
182 case Op_LoadRange:
183 case Op_LoadD_unaligned:
184 case Op_LoadL_unaligned:
185 case Op_ShenandoahReadBarrier:
186 assert(mach->in(2) == val, "should be address");
187 break;
188 case Op_StoreB:
189 case Op_StoreC:
190 case Op_StoreCM:
191 case Op_StoreD:
192 case Op_StoreF:
193 case Op_StoreI:
194 case Op_StoreL:
195 case Op_StoreP:
196 case Op_StoreN:
197 case Op_StoreNKlass:
198 was_store = true; // Memory op is a store op
199 // Stores will have their address in slot 2 (memory in slot 1).
200 // If the value being nul-checked is in another slot, it means we
201 // are storing the checked value, which does NOT check the value!
202 if( mach->in(2) != val ) continue;
203 break; // Found a memory op?
204 case Op_StrComp:
205 case Op_StrEquals:
206 case Op_StrIndexOf:
207 case Op_StrIndexOfChar:
208 case Op_AryEq:
209 case Op_StrInflatedCopy:
210 case Op_StrCompressedCopy:
211 case Op_EncodeISOArray:
212 case Op_HasNegatives:
213 // Not a legit memory op for implicit null check regardless of
214 // embedded loads
215 continue;
216 default: // Also check for embedded loads
217 if( !mach->needs_anti_dependence_check() )
218 continue; // Not an memory op; skip it
219 if( must_clone[iop] ) {
220 // Do not move nodes which produce flags because
221 // RA will try to clone it to place near branch and
222 // it will cause recompilation, see clone_node().
223 continue;
224 }
225 {
226 // Check that value is used in memory address in
227 // instructions with embedded load (CmpP val1,(val2+off)).
228 Node* base;
229 Node* index;
230 const MachOper* oper = mach->memory_inputs(base, index);
231 if (oper == NULL || oper == (MachOper*)-1) {
232 continue; // Not an memory op; skip it
233 }
234 if (val == base ||
235 (val == index && val->bottom_type()->isa_narrowoop())) {
236 break; // Found it
237 } else {
238 continue; // Skip it
239 }
240 }
241 break;
242 }
243
244 // On some OSes (AIX) the page at address 0 is only write protected.
245 // If so, only Store operations will trap.
246 // But a read accessing the base of a heap-based compressed heap will trap.
247 if (!was_store && needs_explicit_null_check_for_read(val)) {
248 continue;
249 }
250
251 // Check that node's control edge is not-null block's head or dominates it,
252 // otherwise we can't hoist it because there are other control dependencies.
253 Node* ctrl = mach->in(0);
254 if (ctrl != NULL && !(ctrl == not_null_block->head() ||
255 get_block_for_node(ctrl)->dominates(not_null_block))) {
256 continue;
257 }
258
259 // check if the offset is not too high for implicit exception
260 {
261 intptr_t offset = 0;
262 const TypePtr *adr_type = NULL; // Do not need this return value here
263 const Node* base = mach->get_base_and_disp(offset, adr_type);
264 if (base == NULL || base == NodeSentinel) {
265 // Narrow oop address doesn't have base, only index.
266 // Give up if offset is beyond page size or if heap base is not protected.
267 if (val->bottom_type()->isa_narrowoop() &&
268 (MacroAssembler::needs_explicit_null_check(offset) ||
269 !Universe::narrow_oop_use_implicit_null_checks()))
270 continue;
271 // cannot reason about it; is probably not implicit null exception
272 } else {
273 const TypePtr* tptr;
274 if (UseCompressedOops && (Universe::narrow_oop_shift() == 0 ||
275 Universe::narrow_klass_shift() == 0)) {
276 // 32-bits narrow oop can be the base of address expressions
277 tptr = base->get_ptr_type();
278 } else {
279 // only regular oops are expected here
280 tptr = base->bottom_type()->is_ptr();
281 }
282 // Give up if offset is not a compile-time constant.
283 if (offset == Type::OffsetBot || tptr->_offset == Type::OffsetBot)
284 continue;
285 offset += tptr->_offset; // correct if base is offseted
286 // Give up if reference is beyond page size.
287 if (MacroAssembler::needs_explicit_null_check(offset))
288 continue;
289 // Give up if base is a decode node and the heap base is not protected.
290 if (base->is_Mach() && base->as_Mach()->ideal_Opcode() == Op_DecodeN &&
291 !Universe::narrow_oop_use_implicit_null_checks())
292 continue;
293 }
294 }
295
296 // Check ctrl input to see if the null-check dominates the memory op
297 Block *cb = get_block_for_node(mach);
298 cb = cb->_idom; // Always hoist at least 1 block
299 if( !was_store ) { // Stores can be hoisted only one block
300 while( cb->_dom_depth > (block->_dom_depth + 1))
301 cb = cb->_idom; // Hoist loads as far as we want
302 // The non-null-block should dominate the memory op, too. Live
303 // range spilling will insert a spill in the non-null-block if it is
304 // needs to spill the memory op for an implicit null check.
305 if (cb->_dom_depth == (block->_dom_depth + 1)) {
306 if (cb != not_null_block) continue;
307 cb = cb->_idom;
308 }
309 }
310 if( cb != block ) continue;
311
312 // Found a memory user; see if it can be hoisted to check-block
313 uint vidx = 0; // Capture index of value into memop
314 uint j;
315 for( j = mach->req()-1; j > 0; j-- ) {
316 if( mach->in(j) == val ) {
317 vidx = j;
318 // Ignore DecodeN val which could be hoisted to where needed.
319 if( is_decoden ) continue;
320 }
321 // Block of memory-op input
322 Block *inb = get_block_for_node(mach->in(j));
323 Block *b = block; // Start from nul check
324 while( b != inb && b->_dom_depth > inb->_dom_depth )
325 b = b->_idom; // search upwards for input
326 // See if input dominates null check
327 if( b != inb )
328 break;
329 }
330 if( j > 0 )
331 continue;
332 Block *mb = get_block_for_node(mach);
333 // Hoisting stores requires more checks for the anti-dependence case.
334 // Give up hoisting if we have to move the store past any load.
335 if( was_store ) {
336 Block *b = mb; // Start searching here for a local load
337 // mach use (faulting) trying to hoist
338 // n might be blocker to hoisting
339 while( b != block ) {
340 uint k;
341 for( k = 1; k < b->number_of_nodes(); k++ ) {
342 Node *n = b->get_node(k);
343 if( n->needs_anti_dependence_check() &&
344 n->in(LoadNode::Memory) == mach->in(StoreNode::Memory) )
345 break; // Found anti-dependent load
346 }
347 if( k < b->number_of_nodes() )
348 break; // Found anti-dependent load
349 // Make sure control does not do a merge (would have to check allpaths)
350 if( b->num_preds() != 2 ) break;
351 b = get_block_for_node(b->pred(1)); // Move up to predecessor block
352 }
353 if( b != block ) continue;
354 }
355
356 // Make sure this memory op is not already being used for a NullCheck
357 Node *e = mb->end();
358 if( e->is_MachNullCheck() && e->in(1) == mach )
359 continue; // Already being used as a NULL check
360
361 // Found a candidate! Pick one with least dom depth - the highest
362 // in the dom tree should be closest to the null check.
363 if (best == NULL || get_block_for_node(mach)->_dom_depth < get_block_for_node(best)->_dom_depth) {
364 best = mach;
365 bidx = vidx;
366 }
367 }
368 // No candidate!
369 if (best == NULL) {
370 return;
371 }
372
373 // ---- Found an implicit null check
374 #ifndef PRODUCT
375 extern int implicit_null_checks;
376 implicit_null_checks++;
377 #endif
378
379 if( is_decoden ) {
380 // Check if we need to hoist decodeHeapOop_not_null first.
381 Block *valb = get_block_for_node(val);
382 if( block != valb && block->_dom_depth < valb->_dom_depth ) {
383 // Hoist it up to the end of the test block.
384 valb->find_remove(val);
385 block->add_inst(val);
386 map_node_to_block(val, block);
387 // DecodeN on x86 may kill flags. Check for flag-killing projections
388 // that also need to be hoisted.
389 for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) {
390 Node* n = val->fast_out(j);
391 if( n->is_MachProj() ) {
392 get_block_for_node(n)->find_remove(n);
393 block->add_inst(n);
394 map_node_to_block(n, block);
395 }
396 }
397 }
398 }
399 // Hoist the memory candidate up to the end of the test block.
400 Block *old_block = get_block_for_node(best);
401 old_block->find_remove(best);
402 block->add_inst(best);
403 map_node_to_block(best, block);
404
405 // Move the control dependence if it is pinned to not-null block.
406 // Don't change it in other cases: NULL or dominating control.
407 if (best->in(0) == not_null_block->head()) {
408 // Set it to control edge of null check.
409 best->set_req(0, proj->in(0)->in(0));
410 }
411
412 // Check for flag-killing projections that also need to be hoisted
413 // Should be DU safe because no edge updates.
414 for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) {
415 Node* n = best->fast_out(j);
416 if( n->is_MachProj() ) {
417 get_block_for_node(n)->find_remove(n);
418 block->add_inst(n);
419 map_node_to_block(n, block);
420 }
421 }
422
423 // proj==Op_True --> ne test; proj==Op_False --> eq test.
424 // One of two graph shapes got matched:
425 // (IfTrue (If (Bool NE (CmpP ptr NULL))))
426 // (IfFalse (If (Bool EQ (CmpP ptr NULL))))
427 // NULL checks are always branch-if-eq. If we see a IfTrue projection
428 // then we are replacing a 'ne' test with a 'eq' NULL check test.
429 // We need to flip the projections to keep the same semantics.
430 if( proj->Opcode() == Op_IfTrue ) {
431 // Swap order of projections in basic block to swap branch targets
432 Node *tmp1 = block->get_node(block->end_idx()+1);
433 Node *tmp2 = block->get_node(block->end_idx()+2);
434 block->map_node(tmp2, block->end_idx()+1);
435 block->map_node(tmp1, block->end_idx()+2);
436 Node *tmp = new Node(C->top()); // Use not NULL input
437 tmp1->replace_by(tmp);
438 tmp2->replace_by(tmp1);
439 tmp->replace_by(tmp2);
440 tmp->destruct();
441 }
442
443 // Remove the existing null check; use a new implicit null check instead.
444 // Since schedule-local needs precise def-use info, we need to correct
445 // it as well.
446 Node *old_tst = proj->in(0);
447 MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx);
448 block->map_node(nul_chk, block->end_idx());
449 map_node_to_block(nul_chk, block);
450 // Redirect users of old_test to nul_chk
451 for (DUIterator_Last i2min, i2 = old_tst->last_outs(i2min); i2 >= i2min; --i2)
452 old_tst->last_out(i2)->set_req(0, nul_chk);
453 // Clean-up any dead code
454 for (uint i3 = 0; i3 < old_tst->req(); i3++) {
455 Node* in = old_tst->in(i3);
456 old_tst->set_req(i3, NULL);
457 if (in->outcnt() == 0) {
458 // Remove dead input node
459 in->disconnect_inputs(NULL, C);
460 block->find_remove(in);
461 }
462 }
463
464 latency_from_uses(nul_chk);
465 latency_from_uses(best);
466
467 // insert anti-dependences to defs in this block
468 if (! best->needs_anti_dependence_check()) {
469 for (uint k = 1; k < block->number_of_nodes(); k++) {
470 Node *n = block->get_node(k);
471 if (n->needs_anti_dependence_check() &&
472 n->in(LoadNode::Memory) == best->in(StoreNode::Memory)) {
473 // Found anti-dependent load
474 insert_anti_dependences(block, n);
475 }
476 }
477 }
478 }
479
480
481 //------------------------------select-----------------------------------------
482 // Select a nice fellow from the worklist to schedule next. If there is only
483 // one choice, then use it. Projections take top priority for correctness
484 // reasons - if I see a projection, then it is next. There are a number of
485 // other special cases, for instructions that consume condition codes, et al.
486 // These are chosen immediately. Some instructions are required to immediately
487 // precede the last instruction in the block, and these are taken last. Of the
488 // remaining cases (most), choose the instruction with the greatest latency
489 // (that is, the most number of pseudo-cycles required to the end of the
490 // routine). If there is a tie, choose the instruction with the most inputs.
491 Node* PhaseCFG::select(
492 Block* block,
493 Node_List &worklist,
494 GrowableArray<int> &ready_cnt,
495 VectorSet &next_call,
496 uint sched_slot,
497 intptr_t* recalc_pressure_nodes) {
498
499 // If only a single entry on the stack, use it
500 uint cnt = worklist.size();
501 if (cnt == 1) {
502 Node *n = worklist[0];
503 worklist.map(0,worklist.pop());
504 return n;
505 }
506
507 uint choice = 0; // Bigger is most important
508 uint latency = 0; // Bigger is scheduled first
509 uint score = 0; // Bigger is better
510 int idx = -1; // Index in worklist
511 int cand_cnt = 0; // Candidate count
512 bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false;
513
514 for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist
515 // Order in worklist is used to break ties.
516 // See caller for how this is used to delay scheduling
517 // of induction variable increments to after the other
518 // uses of the phi are scheduled.
519 Node *n = worklist[i]; // Get Node on worklist
520
521 int iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : 0;
522 if( n->is_Proj() || // Projections always win
523 n->Opcode()== Op_Con || // So does constant 'Top'
524 iop == Op_CreateEx || // Create-exception must start block
525 iop == Op_CheckCastPP
526 ) {
527 worklist.map(i,worklist.pop());
528 return n;
529 }
530
531 // Final call in a block must be adjacent to 'catch'
532 Node *e = block->end();
533 if( e->is_Catch() && e->in(0)->in(0) == n )
534 continue;
535
536 // Memory op for an implicit null check has to be at the end of the block
537 if( e->is_MachNullCheck() && e->in(1) == n )
538 continue;
539
540 // Schedule IV increment last.
541 if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Op_CountedLoopEnd) {
542 // Cmp might be matched into CountedLoopEnd node.
543 Node *cmp = (e->in(1)->ideal_reg() == Op_RegFlags) ? e->in(1) : e;
544 if (cmp->req() > 1 && cmp->in(1) == n && n->is_iteratively_computed()) {
545 continue;
546 }
547 }
548
549 uint n_choice = 2;
550
551 // See if this instruction is consumed by a branch. If so, then (as the
552 // branch is the last instruction in the basic block) force it to the
553 // end of the basic block
554 if ( must_clone[iop] ) {
555 // See if any use is a branch
556 bool found_machif = false;
557
558 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
559 Node* use = n->fast_out(j);
560
561 // The use is a conditional branch, make them adjacent
562 if (use->is_MachIf() && get_block_for_node(use) == block) {
563 found_machif = true;
564 break;
565 }
566
567 // More than this instruction pending for successor to be ready,
568 // don't choose this if other opportunities are ready
569 if (ready_cnt.at(use->_idx) > 1)
570 n_choice = 1;
571 }
572
573 // loop terminated, prefer not to use this instruction
574 if (found_machif)
575 continue;
576 }
577
578 // See if this has a predecessor that is "must_clone", i.e. sets the
579 // condition code. If so, choose this first
580 for (uint j = 0; j < n->req() ; j++) {
581 Node *inn = n->in(j);
582 if (inn) {
583 if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) {
584 n_choice = 3;
585 break;
586 }
587 }
588 }
589
590 // MachTemps should be scheduled last so they are near their uses
591 if (n->is_MachTemp()) {
592 n_choice = 1;
593 }
594
595 uint n_latency = get_latency_for_node(n);
596 uint n_score = n->req(); // Many inputs get high score to break ties
597
598 if (OptoRegScheduling && block_size_threshold_ok) {
599 if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) {
600 _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit());
601 _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit());
602 // simulate the notion that we just picked this node to schedule
603 n->add_flag(Node::Flag_is_scheduled);
604 // now caculate its effect upon the graph if we did
605 adjust_register_pressure(n, block, recalc_pressure_nodes, false);
606 // return its state for finalize in case somebody else wins
607 n->remove_flag(Node::Flag_is_scheduled);
608 // now save the two final pressure components of register pressure, limiting pressure calcs to short size
609 short int_pressure = (short)_regalloc->_scratch_int_pressure.current_pressure();
610 short float_pressure = (short)_regalloc->_scratch_float_pressure.current_pressure();
611 recalc_pressure_nodes[n->_idx] = int_pressure;
612 recalc_pressure_nodes[n->_idx] |= (float_pressure << 16);
613 }
614
615 if (_scheduling_for_pressure) {
616 latency = n_latency;
617 if (n_choice != 3) {
618 // Now evaluate each register pressure component based on threshold in the score.
619 // In general the defining register type will dominate the score, ergo we will not see register pressure grow on both banks
620 // on a single instruction, but we might see it shrink on both banks.
621 // For each use of register that has a register class that is over the high pressure limit, we build n_score up for
622 // live ranges that terminate on this instruction.
623 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
624 short int_pressure = (short)recalc_pressure_nodes[n->_idx];
625 n_score = (int_pressure < 0) ? ((score + n_score) - int_pressure) : (int_pressure > 0) ? 1 : n_score;
626 }
627 if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
628 short float_pressure = (short)(recalc_pressure_nodes[n->_idx] >> 16);
629 n_score = (float_pressure < 0) ? ((score + n_score) - float_pressure) : (float_pressure > 0) ? 1 : n_score;
630 }
631 } else {
632 // make sure we choose these candidates
633 score = 0;
634 }
635 }
636 }
637
638 // Keep best latency found
639 cand_cnt++;
640 if (choice < n_choice ||
641 (choice == n_choice &&
642 ((StressLCM && Compile::randomized_select(cand_cnt)) ||
643 (!StressLCM &&
644 (latency < n_latency ||
645 (latency == n_latency &&
646 (score < n_score))))))) {
647 choice = n_choice;
648 latency = n_latency;
649 score = n_score;
650 idx = i; // Also keep index in worklist
651 }
652 } // End of for all ready nodes in worklist
653
654 guarantee(idx >= 0, "index should be set");
655 Node *n = worklist[(uint)idx]; // Get the winner
656
657 worklist.map((uint)idx, worklist.pop()); // Compress worklist
658 return n;
659 }
660
661 //-------------------------adjust_register_pressure----------------------------
662 void PhaseCFG::adjust_register_pressure(Node* n, Block* block, intptr_t* recalc_pressure_nodes, bool finalize_mode) {
663 PhaseLive* liveinfo = _regalloc->get_live();
664 IndexSet* liveout = liveinfo->live(block);
665 // first adjust the register pressure for the sources
666 for (uint i = 1; i < n->req(); i++) {
667 bool lrg_ends = false;
668 Node *src_n = n->in(i);
669 if (src_n == NULL) continue;
670 if (!src_n->is_Mach()) continue;
671 uint src = _regalloc->_lrg_map.find(src_n);
672 if (src == 0) continue;
673 LRG& lrg_src = _regalloc->lrgs(src);
674 // detect if the live range ends or not
675 if (liveout->member(src) == false) {
676 lrg_ends = true;
677 for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) {
678 Node* m = src_n->fast_out(j); // Get user
679 if (m == n) continue;
680 if (!m->is_Mach()) continue;
681 MachNode *mach = m->as_Mach();
682 bool src_matches = false;
683 int iop = mach->ideal_Opcode();
684
685 switch (iop) {
686 case Op_StoreB:
687 case Op_StoreC:
688 case Op_StoreCM:
689 case Op_StoreD:
690 case Op_StoreF:
691 case Op_StoreI:
692 case Op_StoreL:
693 case Op_StoreP:
694 case Op_StoreN:
695 case Op_StoreVector:
696 case Op_StoreNKlass:
697 for (uint k = 1; k < m->req(); k++) {
698 Node *in = m->in(k);
699 if (in == src_n) {
700 src_matches = true;
701 break;
702 }
703 }
704 break;
705
706 default:
707 src_matches = true;
708 break;
709 }
710
711 // If we have a store as our use, ignore the non source operands
712 if (src_matches == false) continue;
713
714 // Mark every unscheduled use which is not n with a recalculation
715 if ((get_block_for_node(m) == block) && (!m->is_scheduled())) {
716 if (finalize_mode && !m->is_Phi()) {
717 recalc_pressure_nodes[m->_idx] = 0x7fff7fff;
718 }
719 lrg_ends = false;
720 }
721 }
722 }
723 // if none, this live range ends and we can adjust register pressure
724 if (lrg_ends) {
725 if (finalize_mode) {
726 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
727 } else {
728 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
729 }
730 }
731 }
732
733 // now add the register pressure from the dest and evaluate which heuristic we should use:
734 // 1.) The default, latency scheduling
735 // 2.) Register pressure scheduling based on the high pressure limit threshold for int or float register stacks
736 uint dst = _regalloc->_lrg_map.find(n);
737 if (dst != 0) {
738 LRG& lrg_dst = _regalloc->lrgs(dst);
739 if (finalize_mode) {
740 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
741 // check to see if we fall over the register pressure cliff here
742 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
743 _scheduling_for_pressure = true;
744 } else if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
745 _scheduling_for_pressure = true;
746 } else {
747 // restore latency scheduling mode
748 _scheduling_for_pressure = false;
749 }
750 } else {
751 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
752 }
753 }
754 }
755
756 //------------------------------set_next_call----------------------------------
757 void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) {
758 if( next_call.test_set(n->_idx) ) return;
759 for( uint i=0; i<n->len(); i++ ) {
760 Node *m = n->in(i);
761 if( !m ) continue; // must see all nodes in block that precede call
762 if (get_block_for_node(m) == block) {
763 set_next_call(block, m, next_call);
764 }
765 }
766 }
767
768 //------------------------------needed_for_next_call---------------------------
769 // Set the flag 'next_call' for each Node that is needed for the next call to
770 // be scheduled. This flag lets me bias scheduling so Nodes needed for the
771 // next subroutine call get priority - basically it moves things NOT needed
772 // for the next call till after the call. This prevents me from trying to
773 // carry lots of stuff live across a call.
774 void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) {
775 // Find the next control-defining Node in this block
776 Node* call = NULL;
777 for (DUIterator_Fast imax, i = this_call->fast_outs(imax); i < imax; i++) {
778 Node* m = this_call->fast_out(i);
779 if (get_block_for_node(m) == block && // Local-block user
780 m != this_call && // Not self-start node
781 m->is_MachCall()) {
782 call = m;
783 break;
784 }
785 }
786 if (call == NULL) return; // No next call (e.g., block end is near)
787 // Set next-call for all inputs to this call
788 set_next_call(block, call, next_call);
789 }
790
791 //------------------------------add_call_kills-------------------------------------
792 // helper function that adds caller save registers to MachProjNode
793 static void add_call_kills(MachProjNode *proj, RegMask& regs, const char* save_policy, bool exclude_soe) {
794 // Fill in the kill mask for the call
795 for( OptoReg::Name r = OptoReg::Name(0); r < _last_Mach_Reg; r=OptoReg::add(r,1) ) {
796 if( !regs.Member(r) ) { // Not already defined by the call
797 // Save-on-call register?
798 if ((save_policy[r] == 'C') ||
799 (save_policy[r] == 'A') ||
800 ((save_policy[r] == 'E') && exclude_soe)) {
801 proj->_rout.Insert(r);
802 }
803 }
804 }
805 }
806
807
808 //------------------------------sched_call-------------------------------------
809 uint PhaseCFG::sched_call(Block* block, uint node_cnt, Node_List& worklist, GrowableArray<int>& ready_cnt, MachCallNode* mcall, VectorSet& next_call) {
810 RegMask regs;
811
812 // Schedule all the users of the call right now. All the users are
813 // projection Nodes, so they must be scheduled next to the call.
814 // Collect all the defined registers.
815 for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) {
816 Node* n = mcall->fast_out(i);
817 assert( n->is_MachProj(), "" );
818 int n_cnt = ready_cnt.at(n->_idx)-1;
819 ready_cnt.at_put(n->_idx, n_cnt);
820 assert( n_cnt == 0, "" );
821 // Schedule next to call
822 block->map_node(n, node_cnt++);
823 // Collect defined registers
824 regs.OR(n->out_RegMask());
825 // Check for scheduling the next control-definer
826 if( n->bottom_type() == Type::CONTROL )
827 // Warm up next pile of heuristic bits
828 needed_for_next_call(block, n, next_call);
829
830 // Children of projections are now all ready
831 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
832 Node* m = n->fast_out(j); // Get user
833 if(get_block_for_node(m) != block) {
834 continue;
835 }
836 if( m->is_Phi() ) continue;
837 int m_cnt = ready_cnt.at(m->_idx) - 1;
838 ready_cnt.at_put(m->_idx, m_cnt);
839 if( m_cnt == 0 )
840 worklist.push(m);
841 }
842
843 }
844
845 // Act as if the call defines the Frame Pointer.
846 // Certainly the FP is alive and well after the call.
847 regs.Insert(_matcher.c_frame_pointer());
848
849 // Set all registers killed and not already defined by the call.
850 uint r_cnt = mcall->tf()->range()->cnt();
851 int op = mcall->ideal_Opcode();
852 MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj );
853 map_node_to_block(proj, block);
854 block->insert_node(proj, node_cnt++);
855
856 // Select the right register save policy.
857 const char *save_policy = NULL;
858 switch (op) {
859 case Op_CallRuntime:
860 case Op_CallLeaf:
861 case Op_CallLeafNoFP:
862 // Calling C code so use C calling convention
863 save_policy = _matcher._c_reg_save_policy;
864 break;
865
866 case Op_CallStaticJava:
867 case Op_CallDynamicJava:
868 // Calling Java code so use Java calling convention
869 save_policy = _matcher._register_save_policy;
870 break;
871
872 default:
873 ShouldNotReachHere();
874 }
875
876 // When using CallRuntime mark SOE registers as killed by the call
877 // so values that could show up in the RegisterMap aren't live in a
878 // callee saved register since the register wouldn't know where to
879 // find them. CallLeaf and CallLeafNoFP are ok because they can't
880 // have debug info on them. Strictly speaking this only needs to be
881 // done for oops since idealreg2debugmask takes care of debug info
882 // references but there no way to handle oops differently than other
883 // pointers as far as the kill mask goes.
884 bool exclude_soe = op == Op_CallRuntime;
885
886 // If the call is a MethodHandle invoke, we need to exclude the
887 // register which is used to save the SP value over MH invokes from
888 // the mask. Otherwise this register could be used for
889 // deoptimization information.
890 if (op == Op_CallStaticJava) {
891 MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall;
892 if (mcallstaticjava->_method_handle_invoke)
893 proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask());
894 }
895
896 add_call_kills(proj, regs, save_policy, exclude_soe);
897
898 return node_cnt;
899 }
900
901 void PhaseCFG::push_ready_nodes(Node* n, Node* m, Block* block, GrowableArray<int>& ready_cnt, Node_List& worklist, uint max_idx, int c) {
902 if (get_block_for_node(m) != block) {
903 return;
904 }
905 if (m->is_Phi()) {
906 return;
907 }
908 if (m->_idx >= max_idx) { // new node, skip it
909 assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types");
910 return;
911 }
912 int m_cnt = ready_cnt.at(m->_idx) - c;
913 ready_cnt.at_put(m->_idx, m_cnt);
914 if (m_cnt == 0) {
915 worklist.push(m);
916 }
917 }
918
919 //------------------------------schedule_local---------------------------------
920 // Topological sort within a block. Someday become a real scheduler.
921 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) {
922 // Already "sorted" are the block start Node (as the first entry), and
923 // the block-ending Node and any trailing control projections. We leave
924 // these alone. PhiNodes and ParmNodes are made to follow the block start
925 // Node. Everything else gets topo-sorted.
926
927 #ifndef PRODUCT
928 if (trace_opto_pipelining()) {
929 tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order);
930 for (uint i = 0;i < block->number_of_nodes(); i++) {
931 tty->print("# ");
932 block->get_node(i)->fast_dump();
933 }
934 tty->print_cr("#");
935 }
936 #endif
937
938 // RootNode is already sorted
939 if (block->number_of_nodes() == 1) {
940 return true;
941 }
942
943 bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false;
944
945 // We track the uses of local definitions as input dependences so that
946 // we know when a given instruction is avialable to be scheduled.
947 uint i;
948 if (OptoRegScheduling && block_size_threshold_ok) {
949 for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc
950 Node *n = block->get_node(i);
951 n->remove_flag(Node::Flag_is_scheduled);
952 if (!n->is_Phi()) {
953 recalc_pressure_nodes[n->_idx] = 0x7fff7fff;
954 }
955 }
956 } else {
957 #ifdef ASSERT
958 for (i = 1; i < block->number_of_nodes(); i++) {
959 Node *n = block->get_node(i);
960 assert(!n->is_scheduled(), "shouldn't be scheduled yet");
961 }
962 #endif
963 }
964
965 // Move PhiNodes and ParmNodes from 1 to cnt up to the start
966 uint node_cnt = block->end_idx();
967 uint phi_cnt = 1;
968 for( i = 1; i<node_cnt; i++ ) { // Scan for Phi
969 Node *n = block->get_node(i);
970 if( n->is_Phi() || // Found a PhiNode or ParmNode
971 (n->is_Proj() && n->in(0) == block->head()) ) {
972 // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt
973 block->map_node(block->get_node(phi_cnt), i);
974 block->map_node(n, phi_cnt++); // swap Phi/Parm up front
975 // mark n as scheduled
976 n->add_flag(Node::Flag_is_scheduled);
977 } else { // All others
978 // Count block-local inputs to 'n'
979 uint cnt = n->len(); // Input count
980 uint local = 0;
981 for( uint j=0; j<cnt; j++ ) {
982 Node *m = n->in(j);
983 if( m && get_block_for_node(m) == block && !m->is_top() )
984 local++; // One more block-local input
985 }
986 ready_cnt.at_put(n->_idx, local); // Count em up
987
988 #ifdef ASSERT
989 if( UseConcMarkSweepGC || UseG1GC ) {
990 if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_StoreCM ) {
991 // Check the precedence edges
992 for (uint prec = n->req(); prec < n->len(); prec++) {
993 Node* oop_store = n->in(prec);
994 if (oop_store != NULL) {
995 assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark");
996 }
997 }
998 }
999 }
1000 #endif
1001
1002 // A few node types require changing a required edge to a precedence edge
1003 // before allocation.
1004 if( n->is_Mach() && n->req() > TypeFunc::Parms &&
1005 (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire ||
1006 n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) {
1007 // MemBarAcquire could be created without Precedent edge.
1008 // del_req() replaces the specified edge with the last input edge
1009 // and then removes the last edge. If the specified edge > number of
1010 // edges the last edge will be moved outside of the input edges array
1011 // and the edge will be lost. This is why this code should be
1012 // executed only when Precedent (== TypeFunc::Parms) edge is present.
1013 Node *x = n->in(TypeFunc::Parms);
1014 if (x != NULL && get_block_for_node(x) == block && n->find_prec_edge(x) != -1) {
1015 // Old edge to node within same block will get removed, but no precedence
1016 // edge will get added because it already exists. Update ready count.
1017 int cnt = ready_cnt.at(n->_idx);
1018 assert(cnt > 1, "MemBar node %d must not get ready here", n->_idx);
1019 ready_cnt.at_put(n->_idx, cnt-1);
1020 }
1021 n->del_req(TypeFunc::Parms);
1022 n->add_prec(x);
1023 }
1024 }
1025 }
1026 for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count
1027 ready_cnt.at_put(block->get_node(i2)->_idx, 0);
1028
1029 // All the prescheduled guys do not hold back internal nodes
1030 uint i3;
1031 for (i3 = 0; i3 < phi_cnt; i3++) { // For all pre-scheduled
1032 Node *n = block->get_node(i3); // Get pre-scheduled
1033 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
1034 Node* m = n->fast_out(j);
1035 if (get_block_for_node(m) == block) { // Local-block user
1036 int m_cnt = ready_cnt.at(m->_idx)-1;
1037 // mark m as scheduled
1038 if (m_cnt < 0) {
1039 m->add_flag(Node::Flag_is_scheduled);
1040 }
1041 ready_cnt.at_put(m->_idx, m_cnt); // Fix ready count
1042 }
1043 }
1044 }
1045
1046 Node_List delay;
1047 // Make a worklist
1048 Node_List worklist;
1049 for(uint i4=i3; i4<node_cnt; i4++ ) { // Put ready guys on worklist
1050 Node *m = block->get_node(i4);
1051 if( !ready_cnt.at(m->_idx) ) { // Zero ready count?
1052 if (m->is_iteratively_computed()) {
1053 // Push induction variable increments last to allow other uses
1054 // of the phi to be scheduled first. The select() method breaks
1055 // ties in scheduling by worklist order.
1056 delay.push(m);
1057 } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) {
1058 // Force the CreateEx to the top of the list so it's processed
1059 // first and ends up at the start of the block.
1060 worklist.insert(0, m);
1061 } else {
1062 worklist.push(m); // Then on to worklist!
1063 }
1064 }
1065 }
1066 while (delay.size()) {
1067 Node* d = delay.pop();
1068 worklist.push(d);
1069 }
1070
1071 if (OptoRegScheduling && block_size_threshold_ok) {
1072 // To stage register pressure calculations we need to examine the live set variables
1073 // breaking them up by register class to compartmentalize the calculations.
1074 uint float_pressure = Matcher::float_pressure(FLOATPRESSURE);
1075 _regalloc->_sched_int_pressure.init(INTPRESSURE);
1076 _regalloc->_sched_float_pressure.init(float_pressure);
1077 _regalloc->_scratch_int_pressure.init(INTPRESSURE);
1078 _regalloc->_scratch_float_pressure.init(float_pressure);
1079
1080 _regalloc->compute_entry_block_pressure(block);
1081 }
1082
1083 // Warm up the 'next_call' heuristic bits
1084 needed_for_next_call(block, block->head(), next_call);
1085
1086 #ifndef PRODUCT
1087 if (trace_opto_pipelining()) {
1088 for (uint j=0; j< block->number_of_nodes(); j++) {
1089 Node *n = block->get_node(j);
1090 int idx = n->_idx;
1091 tty->print("# ready cnt:%3d ", ready_cnt.at(idx));
1092 tty->print("latency:%3d ", get_latency_for_node(n));
1093 tty->print("%4d: %s\n", idx, n->Name());
1094 }
1095 }
1096 #endif
1097
1098 uint max_idx = (uint)ready_cnt.length();
1099 // Pull from worklist and schedule
1100 while( worklist.size() ) { // Worklist is not ready
1101
1102 #ifndef PRODUCT
1103 if (trace_opto_pipelining()) {
1104 tty->print("# ready list:");
1105 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1106 Node *n = worklist[i]; // Get Node on worklist
1107 tty->print(" %d", n->_idx);
1108 }
1109 tty->cr();
1110 }
1111 #endif
1112
1113 // Select and pop a ready guy from worklist
1114 Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt, recalc_pressure_nodes);
1115 block->map_node(n, phi_cnt++); // Schedule him next
1116
1117 n->add_flag(Node::Flag_is_scheduled);
1118
1119 if (OptoRegScheduling && block_size_threshold_ok) {
1120 // Now adjust the resister pressure with the node we selected
1121 if (!n->is_Phi()) {
1122 adjust_register_pressure(n, block, recalc_pressure_nodes, true);
1123 }
1124 }
1125
1126 #ifndef PRODUCT
1127 if (trace_opto_pipelining()) {
1128 tty->print("# select %d: %s", n->_idx, n->Name());
1129 tty->print(", latency:%d", get_latency_for_node(n));
1130 n->dump();
1131 if (Verbose) {
1132 tty->print("# ready list:");
1133 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1134 Node *n = worklist[i]; // Get Node on worklist
1135 tty->print(" %d", n->_idx);
1136 }
1137 tty->cr();
1138 }
1139 }
1140
1141 #endif
1142 if( n->is_MachCall() ) {
1143 MachCallNode *mcall = n->as_MachCall();
1144 phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call);
1145 continue;
1146 }
1147
1148 if (n->is_Mach() && n->as_Mach()->has_call()) {
1149 RegMask regs;
1150 regs.Insert(_matcher.c_frame_pointer());
1151 regs.OR(n->out_RegMask());
1152
1153 MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj );
1154 map_node_to_block(proj, block);
1155 block->insert_node(proj, phi_cnt++);
1156
1157 add_call_kills(proj, regs, _matcher._c_reg_save_policy, false);
1158 }
1159
1160 // Children are now all ready
1161 for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) {
1162 Node* m = n->fast_out(i5); // Get user
1163 push_ready_nodes(n, m, block, ready_cnt, worklist, max_idx, 1);
1164 }
1165
1166 #if INCLUDE_SHENANDOAHGC
1167 replace_uses_with_shenandoah_barrier(n, block, worklist, ready_cnt, max_idx, phi_cnt);
1168 #endif
1169 }
1170
1171 if( phi_cnt != block->end_idx() ) {
1172 // did not schedule all. Retry, Bailout, or Die
1173 if (C->subsume_loads() == true && !C->failing()) {
1174 // Retry with subsume_loads == false
1175 // If this is the first failure, the sentinel string will "stick"
1176 // to the Compile object, and the C2Compiler will see it and retry.
1177 C->record_failure(C2Compiler::retry_no_subsuming_loads());
1178 } else {
1179 assert(false, "graph should be schedulable");
1180 }
1181 // assert( phi_cnt == end_idx(), "did not schedule all" );
1182 return false;
1183 }
1184
1185 if (OptoRegScheduling && block_size_threshold_ok) {
1186 _regalloc->compute_exit_block_pressure(block);
1187 block->_reg_pressure = _regalloc->_sched_int_pressure.final_pressure();
1188 block->_freg_pressure = _regalloc->_sched_float_pressure.final_pressure();
1189 }
1190
1191 #ifndef PRODUCT
1192 if (trace_opto_pipelining()) {
1193 tty->print_cr("#");
1194 tty->print_cr("# after schedule_local");
1195 for (uint i = 0;i < block->number_of_nodes();i++) {
1196 tty->print("# ");
1197 block->get_node(i)->fast_dump();
1198 }
1199 tty->print_cr("# ");
1200
1201 if (OptoRegScheduling && block_size_threshold_ok) {
1202 tty->print_cr("# pressure info : %d", block->_pre_order);
1203 _regalloc->print_pressure_info(_regalloc->_sched_int_pressure, "int register info");
1204 _regalloc->print_pressure_info(_regalloc->_sched_float_pressure, "float register info");
1205 }
1206 tty->cr();
1207 }
1208 #endif
1209
1210 return true;
1211 }
1212
1213 //--------------------------catch_cleanup_fix_all_inputs-----------------------
1214 static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) {
1215 for (uint l = 0; l < use->len(); l++) {
1216 if (use->in(l) == old_def) {
1217 if (l < use->req()) {
1218 use->set_req(l, new_def);
1219 } else {
1220 use->rm_prec(l);
1221 use->add_prec(new_def);
1222 l--;
1223 }
1224 }
1225 }
1226 }
1227
1228 //------------------------------catch_cleanup_find_cloned_def------------------
1229 Node* PhaseCFG::catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1230 assert( use_blk != def_blk, "Inter-block cleanup only");
1231
1232 // The use is some block below the Catch. Find and return the clone of the def
1233 // that dominates the use. If there is no clone in a dominating block, then
1234 // create a phi for the def in a dominating block.
1235
1236 // Find which successor block dominates this use. The successor
1237 // blocks must all be single-entry (from the Catch only; I will have
1238 // split blocks to make this so), hence they all dominate.
1239 while( use_blk->_dom_depth > def_blk->_dom_depth+1 )
1240 use_blk = use_blk->_idom;
1241
1242 // Find the successor
1243 Node *fixup = NULL;
1244
1245 uint j;
1246 for( j = 0; j < def_blk->_num_succs; j++ )
1247 if( use_blk == def_blk->_succs[j] )
1248 break;
1249
1250 if( j == def_blk->_num_succs ) {
1251 // Block at same level in dom-tree is not a successor. It needs a
1252 // PhiNode, the PhiNode uses from the def and IT's uses need fixup.
1253 Node_Array inputs = new Node_List(Thread::current()->resource_area());
1254 for(uint k = 1; k < use_blk->num_preds(); k++) {
1255 Block* block = get_block_for_node(use_blk->pred(k));
1256 inputs.map(k, catch_cleanup_find_cloned_def(block, def, def_blk, n_clone_idx));
1257 }
1258
1259 // Check to see if the use_blk already has an identical phi inserted.
1260 // If it exists, it will be at the first position since all uses of a
1261 // def are processed together.
1262 Node *phi = use_blk->get_node(1);
1263 if( phi->is_Phi() ) {
1264 fixup = phi;
1265 for (uint k = 1; k < use_blk->num_preds(); k++) {
1266 if (phi->in(k) != inputs[k]) {
1267 // Not a match
1268 fixup = NULL;
1269 break;
1270 }
1271 }
1272 }
1273
1274 // If an existing PhiNode was not found, make a new one.
1275 if (fixup == NULL) {
1276 Node *new_phi = PhiNode::make(use_blk->head(), def);
1277 use_blk->insert_node(new_phi, 1);
1278 map_node_to_block(new_phi, use_blk);
1279 for (uint k = 1; k < use_blk->num_preds(); k++) {
1280 new_phi->set_req(k, inputs[k]);
1281 }
1282 fixup = new_phi;
1283 }
1284
1285 } else {
1286 // Found the use just below the Catch. Make it use the clone.
1287 fixup = use_blk->get_node(n_clone_idx);
1288 }
1289
1290 return fixup;
1291 }
1292
1293 //--------------------------catch_cleanup_intra_block--------------------------
1294 // Fix all input edges in use that reference "def". The use is in the same
1295 // block as the def and both have been cloned in each successor block.
1296 static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg, int n_clone_idx) {
1297
1298 // Both the use and def have been cloned. For each successor block,
1299 // get the clone of the use, and make its input the clone of the def
1300 // found in that block.
1301
1302 uint use_idx = blk->find_node(use);
1303 uint offset_idx = use_idx - beg;
1304 for( uint k = 0; k < blk->_num_succs; k++ ) {
1305 // Get clone in each successor block
1306 Block *sb = blk->_succs[k];
1307 Node *clone = sb->get_node(offset_idx+1);
1308 assert( clone->Opcode() == use->Opcode(), "" );
1309
1310 // Make use-clone reference the def-clone
1311 catch_cleanup_fix_all_inputs(clone, def, sb->get_node(n_clone_idx));
1312 }
1313 }
1314
1315 //------------------------------catch_cleanup_inter_block---------------------
1316 // Fix all input edges in use that reference "def". The use is in a different
1317 // block than the def.
1318 void PhaseCFG::catch_cleanup_inter_block(Node *use, Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1319 if( !use_blk ) return; // Can happen if the use is a precedence edge
1320
1321 Node *new_def = catch_cleanup_find_cloned_def(use_blk, def, def_blk, n_clone_idx);
1322 catch_cleanup_fix_all_inputs(use, def, new_def);
1323 }
1324
1325 //------------------------------call_catch_cleanup-----------------------------
1326 // If we inserted any instructions between a Call and his CatchNode,
1327 // clone the instructions on all paths below the Catch.
1328 void PhaseCFG::call_catch_cleanup(Block* block) {
1329
1330 // End of region to clone
1331 uint end = block->end_idx();
1332 if( !block->get_node(end)->is_Catch() ) return;
1333 // Start of region to clone
1334 uint beg = end;
1335 while(!block->get_node(beg-1)->is_MachProj() ||
1336 !block->get_node(beg-1)->in(0)->is_MachCall() ) {
1337 beg--;
1338 assert(beg > 0,"Catch cleanup walking beyond block boundary");
1339 }
1340 // Range of inserted instructions is [beg, end)
1341 if( beg == end ) return;
1342
1343 // Clone along all Catch output paths. Clone area between the 'beg' and
1344 // 'end' indices.
1345 for( uint i = 0; i < block->_num_succs; i++ ) {
1346 Block *sb = block->_succs[i];
1347 // Clone the entire area; ignoring the edge fixup for now.
1348 for( uint j = end; j > beg; j-- ) {
1349 Node *clone = block->get_node(j-1)->clone();
1350 sb->insert_node(clone, 1);
1351 map_node_to_block(clone, sb);
1352 if (clone->needs_anti_dependence_check()) {
1353 insert_anti_dependences(sb, clone);
1354 }
1355 }
1356 }
1357
1358
1359 // Fixup edges. Check the def-use info per cloned Node
1360 for(uint i2 = beg; i2 < end; i2++ ) {
1361 uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block
1362 Node *n = block->get_node(i2); // Node that got cloned
1363 // Need DU safe iterator because of edge manipulation in calls.
1364 Unique_Node_List *out = new Unique_Node_List(Thread::current()->resource_area());
1365 for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) {
1366 out->push(n->fast_out(j1));
1367 }
1368 uint max = out->size();
1369 for (uint j = 0; j < max; j++) {// For all users
1370 Node *use = out->pop();
1371 Block *buse = get_block_for_node(use);
1372 if( use->is_Phi() ) {
1373 for( uint k = 1; k < use->req(); k++ )
1374 if( use->in(k) == n ) {
1375 Block* b = get_block_for_node(buse->pred(k));
1376 Node *fixup = catch_cleanup_find_cloned_def(b, n, block, n_clone_idx);
1377 use->set_req(k, fixup);
1378 }
1379 } else {
1380 if (block == buse) {
1381 catch_cleanup_intra_block(use, n, block, beg, n_clone_idx);
1382 } else {
1383 catch_cleanup_inter_block(use, buse, n, block, n_clone_idx);
1384 }
1385 }
1386 } // End for all users
1387
1388 } // End of for all Nodes in cloned area
1389
1390 // Remove the now-dead cloned ops
1391 for(uint i3 = beg; i3 < end; i3++ ) {
1392 block->get_node(beg)->disconnect_inputs(NULL, C);
1393 block->remove_node(beg);
1394 }
1395
1396 // If the successor blocks have a CreateEx node, move it back to the top
1397 for(uint i4 = 0; i4 < block->_num_succs; i4++ ) {
1398 Block *sb = block->_succs[i4];
1399 uint new_cnt = end - beg;
1400 // Remove any newly created, but dead, nodes.
1401 for( uint j = new_cnt; j > 0; j-- ) {
1402 Node *n = sb->get_node(j);
1403 if (n->outcnt() == 0 &&
1404 (!n->is_Proj() || n->as_Proj()->in(0)->outcnt() == 1) ){
1405 n->disconnect_inputs(NULL, C);
1406 sb->remove_node(j);
1407 new_cnt--;
1408 }
1409 }
1410 // If any newly created nodes remain, move the CreateEx node to the top
1411 if (new_cnt > 0) {
1412 Node *cex = sb->get_node(1+new_cnt);
1413 if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) {
1414 sb->remove_node(1+new_cnt);
1415 sb->insert_node(cex, 1);
1416 }
1417 }
1418 }
1419 }