718 interfere_with_live(r,&liveout);
719
720 } // End of if normal register-allocated value
721
722 // Area remaining in the block
723 inst_count--;
724 cost = (inst_count <= 0) ? 0.0 : block->_freq * double(inst_count);
725
726 // Make all inputs live
727 if( !n->is_Phi() ) { // Phi function uses come from prior block
728 JVMState* jvms = n->jvms();
729 uint debug_start = jvms ? jvms->debug_start() : 999999;
730 // Start loop at 1 (skip control edge) for most Nodes.
731 // SCMemProj's might be the sole use of a StoreLConditional.
732 // While StoreLConditionals set memory (the SCMemProj use)
733 // they also def flags; if that flag def is unused the
734 // allocator sees a flag-setting instruction with no use of
735 // the flags and assumes it's dead. This keeps the (useless)
736 // flag-setting behavior alive while also keeping the (useful)
737 // memory update effect.
738 for (uint k = ((n->Opcode() == Op_SCMemProj || n->Opcode() == Op_ShenandoahWBMemProj) ? 0:1); k < n->req(); k++) {
739 Node *def = n->in(k);
740 uint x = _lrg_map.live_range_id(def);
741 if (!x) {
742 continue;
743 }
744 LRG &lrg = lrgs(x);
745 // No use-side cost for spilling debug info
746 if (k < debug_start) {
747 // A USE costs twice block frequency (once for the Load, once
748 // for a Load-delay). Rematerialized uses only cost once.
749 lrg._cost += (def->rematerialize() ? block->_freq : (block->_freq + block->_freq));
750 }
751 // It is live now
752 if (liveout.insert(x)) {
753 // Newly live things assumed live from here to top of block
754 lrg._area += cost;
755 // Adjust register pressure
756 if (lrg.mask().is_UP() && lrg.mask_size()) {
757 if (lrg._is_float || lrg._is_vector) {
758 pressure[1] += lrg.reg_pressure();
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718 interfere_with_live(r,&liveout);
719
720 } // End of if normal register-allocated value
721
722 // Area remaining in the block
723 inst_count--;
724 cost = (inst_count <= 0) ? 0.0 : block->_freq * double(inst_count);
725
726 // Make all inputs live
727 if( !n->is_Phi() ) { // Phi function uses come from prior block
728 JVMState* jvms = n->jvms();
729 uint debug_start = jvms ? jvms->debug_start() : 999999;
730 // Start loop at 1 (skip control edge) for most Nodes.
731 // SCMemProj's might be the sole use of a StoreLConditional.
732 // While StoreLConditionals set memory (the SCMemProj use)
733 // they also def flags; if that flag def is unused the
734 // allocator sees a flag-setting instruction with no use of
735 // the flags and assumes it's dead. This keeps the (useless)
736 // flag-setting behavior alive while also keeping the (useful)
737 // memory update effect.
738 for (uint k = ((n->Opcode() == Op_SCMemProj) ? 0:1); k < n->req(); k++) {
739 Node *def = n->in(k);
740 uint x = _lrg_map.live_range_id(def);
741 if (!x) {
742 continue;
743 }
744 LRG &lrg = lrgs(x);
745 // No use-side cost for spilling debug info
746 if (k < debug_start) {
747 // A USE costs twice block frequency (once for the Load, once
748 // for a Load-delay). Rematerialized uses only cost once.
749 lrg._cost += (def->rematerialize() ? block->_freq : (block->_freq + block->_freq));
750 }
751 // It is live now
752 if (liveout.insert(x)) {
753 // Newly live things assumed live from here to top of block
754 lrg._area += cost;
755 // Adjust register pressure
756 if (lrg.mask().is_UP() && lrg.mask_size()) {
757 if (lrg._is_float || lrg._is_vector) {
758 pressure[1] += lrg.reg_pressure();
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