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src/share/vm/opto/mulnode.cpp

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rev 10526 : [backport] Perform gc-state checks with LoadB to fit C2 matchers


  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "memory/allocation.inline.hpp"
  27 #include "opto/addnode.hpp"
  28 #include "opto/connode.hpp"
  29 #include "opto/memnode.hpp"
  30 #include "opto/mulnode.hpp"
  31 #include "opto/phaseX.hpp"

  32 #include "opto/subnode.hpp"

  33 
  34 // Portions of code courtesy of Clifford Click
  35 
  36 
  37 //=============================================================================
  38 //------------------------------hash-------------------------------------------
  39 // Hash function over MulNodes.  Needs to be commutative; i.e., I swap
  40 // (commute) inputs to MulNodes willy-nilly so the hash function must return
  41 // the same value in the presence of edge swapping.
  42 uint MulNode::hash() const {
  43   return (uintptr_t)in(1) + (uintptr_t)in(2) + Opcode();
  44 }
  45 
  46 //------------------------------Identity---------------------------------------
  47 // Multiplying a one preserves the other argument
  48 Node *MulNode::Identity( PhaseTransform *phase ) {
  49   register const Type *one = mul_id();  // The multiplicative identity
  50   if( phase->type( in(1) )->higher_equal( one ) ) return in(2);
  51   if( phase->type( in(2) )->higher_equal( one ) ) return in(1);
  52 


 455       if (t12 && t12->is_con()) {  // Shift is by a constant
 456         int shift = t12->get_con();
 457         shift &= BitsPerJavaInteger - 1;  // semantics of Java shifts
 458         int mask = max_juint >> shift;
 459         if ((mask & con) == mask)  // If AND is useless, skip it
 460           return in1;
 461       }
 462     }
 463   }
 464   return MulNode::Identity(phase);
 465 }
 466 
 467 //------------------------------Ideal------------------------------------------
 468 Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) {
 469   // Special case constant AND mask
 470   const TypeInt *t2 = phase->type( in(2) )->isa_int();
 471   if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
 472   const int mask = t2->get_con();
 473   Node *load = in(1);
 474   uint lop = load->Opcode();









 475 
 476   // Masking bits off of a Character?  Hi bits are already zero.
 477   if( lop == Op_LoadUS &&
 478       (mask & 0xFFFF0000) )     // Can we make a smaller mask?
 479     return new (phase->C) AndINode(load,phase->intcon(mask&0xFFFF));
 480 
 481   // Masking bits off of a Short?  Loading a Character does some masking
 482   if (can_reshape &&
 483       load->outcnt() == 1 && load->unique_out() == this) {
 484     if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) {
 485       Node *ldus = new (phase->C) LoadUSNode(load->in(MemNode::Control),
 486                                              load->in(MemNode::Memory),
 487                                              load->in(MemNode::Address),
 488                                              load->adr_type(),
 489                                              TypeInt::CHAR, MemNode::unordered);
 490       ldus = phase->transform(ldus);
 491       return new (phase->C) AndINode(ldus, phase->intcon(mask & 0xFFFF));
 492     }
 493 
 494     // Masking sign bits off of a Byte?  Do an unsigned byte load plus




  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "memory/allocation.inline.hpp"
  27 #include "opto/addnode.hpp"
  28 #include "opto/connode.hpp"
  29 #include "opto/memnode.hpp"
  30 #include "opto/mulnode.hpp"
  31 #include "opto/phaseX.hpp"
  32 #include "opto/shenandoahSupport.hpp"
  33 #include "opto/subnode.hpp"
  34 #include "utilities/macros.hpp"
  35 
  36 // Portions of code courtesy of Clifford Click
  37 
  38 
  39 //=============================================================================
  40 //------------------------------hash-------------------------------------------
  41 // Hash function over MulNodes.  Needs to be commutative; i.e., I swap
  42 // (commute) inputs to MulNodes willy-nilly so the hash function must return
  43 // the same value in the presence of edge swapping.
  44 uint MulNode::hash() const {
  45   return (uintptr_t)in(1) + (uintptr_t)in(2) + Opcode();
  46 }
  47 
  48 //------------------------------Identity---------------------------------------
  49 // Multiplying a one preserves the other argument
  50 Node *MulNode::Identity( PhaseTransform *phase ) {
  51   register const Type *one = mul_id();  // The multiplicative identity
  52   if( phase->type( in(1) )->higher_equal( one ) ) return in(2);
  53   if( phase->type( in(2) )->higher_equal( one ) ) return in(1);
  54 


 457       if (t12 && t12->is_con()) {  // Shift is by a constant
 458         int shift = t12->get_con();
 459         shift &= BitsPerJavaInteger - 1;  // semantics of Java shifts
 460         int mask = max_juint >> shift;
 461         if ((mask & con) == mask)  // If AND is useless, skip it
 462           return in1;
 463       }
 464     }
 465   }
 466   return MulNode::Identity(phase);
 467 }
 468 
 469 //------------------------------Ideal------------------------------------------
 470 Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) {
 471   // Special case constant AND mask
 472   const TypeInt *t2 = phase->type( in(2) )->isa_int();
 473   if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
 474   const int mask = t2->get_con();
 475   Node *load = in(1);
 476   uint lop = load->Opcode();
 477 
 478 #if INCLUDE_ALL_GCS
 479   if (UseShenandoahGC && ShenandoahWriteBarrierNode::is_gc_state_load(load)) {
 480     // Do not touch the load+mask, we would match the whole sequence exactly.
 481     // Converting the load to LoadUB/LoadUS would mismatch and waste a register
 482     // on the barrier fastpath.
 483     return NULL;
 484   }
 485 #endif
 486 
 487   // Masking bits off of a Character?  Hi bits are already zero.
 488   if( lop == Op_LoadUS &&
 489       (mask & 0xFFFF0000) )     // Can we make a smaller mask?
 490     return new (phase->C) AndINode(load,phase->intcon(mask&0xFFFF));
 491 
 492   // Masking bits off of a Short?  Loading a Character does some masking
 493   if (can_reshape &&
 494       load->outcnt() == 1 && load->unique_out() == this) {
 495     if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) {
 496       Node *ldus = new (phase->C) LoadUSNode(load->in(MemNode::Control),
 497                                              load->in(MemNode::Memory),
 498                                              load->in(MemNode::Address),
 499                                              load->adr_type(),
 500                                              TypeInt::CHAR, MemNode::unordered);
 501       ldus = phase->transform(ldus);
 502       return new (phase->C) AndINode(ldus, phase->intcon(mask & 0xFFFF));
 503     }
 504 
 505     // Masking sign bits off of a Byte?  Do an unsigned byte load plus


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