src/cpu/aarch64/vm/c1_LIRAssembler_aarch64.cpp

rev 10699 : [backport] Several AArch64 cleanups
rev 10703 : [backport] More AArch64 assembler cleanups
rev 10719 : [backport] Fix up superfluous changes against upstream

@@ -968,10 +968,11 @@
 
   stack2reg(src, temp, src->type());
   reg2stack(temp, dest, dest->type(), false);
 }
 
+
 void LIR_Assembler::mem2reg(LIR_Opr src, LIR_Opr dest, BasicType type, LIR_PatchCode patch_code, CodeEmitInfo* info, bool wide, bool /* unaligned */) {
   LIR_Address* addr = src->as_address_ptr();
   LIR_Address* from_addr = src->as_address_ptr();
 
   if (addr->base()->type() == T_OBJECT) {

@@ -1066,10 +1067,11 @@
     }
 #endif
   }
 }
 
+
 void LIR_Assembler::prefetchr(LIR_Opr src) { Unimplemented(); }
 
 
 void LIR_Assembler::prefetchw(LIR_Opr src) { Unimplemented(); }
 

@@ -1152,10 +1154,12 @@
     }
     __ br(acond,*(op->label()));
   }
 }
 
+
+
 #if INCLUDE_ALL_GCS
 void LIR_Assembler::emit_opShenandoahWriteBarrier(LIR_OpShenandoahWriteBarrier* op) {
 
   Register obj = op->in_opr()->as_register();
   Register res = op->result_opr()->as_register();

@@ -1676,16 +1680,18 @@
     __ bind(nope);
   }
   __ membar(__ AnyAny);
 }
 
+
 // Return 1 in rscratch1 if the CAS fails.
 void LIR_Assembler::emit_compare_and_swap(LIR_OpCompareAndSwap* op) {
   assert(VM_Version::supports_cx8(), "wrong machine");
   Register addr = as_reg(op->addr());
   Register newval = as_reg(op->new_value());
   Register cmpval = as_reg(op->cmp_value());
+  Label succeed, fail, around;
   Register res = op->result_opr()->as_register();
 
   if (op->code() == lir_cas_obj) {
     assert(op->tmp1()->is_valid(), "must be");
     Register t1 = op->tmp1()->as_register();

@@ -2023,12 +2029,10 @@
         __ cmpw(reg1, reg2);
       }
       return;
     }
     if (opr2->is_double_cpu()) {
-      guarantee(opr2->type() != T_OBJECT && opr2->type() != T_ARRAY, "need acmp barrier?");
-      guarantee(opr1->type() != T_OBJECT && opr1->type() != T_ARRAY, "need acmp barrier?");
       // cpu register - cpu register
       Register reg2 = opr2->as_register_lo();
       __ cmp(reg1, reg2);
       return;
     }

@@ -2055,16 +2059,10 @@
       default:
         ShouldNotReachHere();
         break;
       }
 
-      if (opr2->type() == T_OBJECT || opr2->type() == T_ARRAY) {
-        jobject2reg(opr2->as_constant_ptr()->as_jobject(), rscratch1);
-        __ cmpoops(reg1, rscratch1);
-        return;
-      }
-
       if (Assembler::operand_valid_for_add_sub_immediate(imm)) {
         if (is_32bit)
           __ cmpw(reg1, imm);
         else
           __ cmp(reg1, imm);