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src/cpu/aarch64/vm/macroAssembler_aarch64.hpp

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rev 10699 : [backport] Several AArch64 cleanups
rev 10703 : [backport] More AArch64 assembler cleanups


 518   // FPSR : op1 == 011
 519   //        CRn == 0100
 520   //        CRm == 0100
 521   //        op2 == 001
 522 
 523   inline void get_fpsr(Register reg)
 524   {
 525     mrs(0b11, 0b0100, 0b0100, 0b001, reg);
 526   }
 527 
 528   inline void set_fpsr(Register reg)
 529   {
 530     msr(0b011, 0b0100, 0b0100, 0b001, reg);
 531   }
 532 
 533   inline void clear_fpsr()
 534   {
 535     msr(0b011, 0b0100, 0b0100, 0b001, zr);
 536   }
 537 
 538   // Macro instructions for accessing and updating the condition flags
 539   inline void get_nzcv(Register reg)
 540   {
 541     mrs(0b011, 0b0100, 0b0010, 0b000, reg);
 542   }
 543 
 544   inline void set_nzcv(Register reg)
 545   {
 546     msr(0b011, 0b0100, 0b0010, 0b000, reg);
 547   }
 548 
 549   // DCZID_EL0: op1 == 011
 550   //            CRn == 0000
 551   //            CRm == 0000
 552   //            op2 == 111
 553   inline void get_dczid_el0(Register reg)
 554   {
 555     mrs(0b011, 0b0000, 0b0000, 0b111, reg);
 556   }
 557 
 558   // CTR_EL0:   op1 == 011
 559   //            CRn == 0000
 560   //            CRm == 0000
 561   //            op2 == 001
 562   inline void get_ctr_el0(Register reg)
 563   {
 564     mrs(0b011, 0b0000, 0b0000, 0b001, reg);
 565   }
 566 
 567   // idiv variant which deals with MINLONG as dividend and -1 as divisor
 568   int corrected_idivl(Register result, Register ra, Register rb,


 931   Address argument_address(RegisterOrConstant arg_slot, int extra_slot_offset = 0);
 932 
 933 
 934   // Debugging
 935 
 936   // only if +VerifyOops
 937   void verify_oop(Register reg, const char* s = "broken oop");
 938   void verify_oop_addr(Address addr, const char * s = "broken oop addr");
 939 
 940 // TODO: verify method and klass metadata (compare against vptr?)
 941   void _verify_method_ptr(Register reg, const char * msg, const char * file, int line) {}
 942   void _verify_klass_ptr(Register reg, const char * msg, const char * file, int line){}
 943 
 944 #define verify_method_ptr(reg) _verify_method_ptr(reg, "broken method " #reg, __FILE__, __LINE__)
 945 #define verify_klass_ptr(reg) _verify_klass_ptr(reg, "broken klass " #reg, __FILE__, __LINE__)
 946 
 947   // only if +VerifyFPU
 948   void verify_FPU(int stack_depth, const char* s = "illegal FPU state");
 949 
 950   // prints msg, dumps registers and stops execution
 951   void stop(const char* msg, Label *l = NULL);
 952 
 953   // prints msg and continues
 954   void warn(const char* msg);
 955 
 956   static void debug64(char* msg, int64_t pc, int64_t regs[]);
 957 
 958   void untested()                                { stop("untested"); }
 959 
 960   void unimplemented(const char* what = "")      { char* b = new char[1024];  jio_snprintf(b, 1024, "unimplemented: %s", what);  stop(b); }
 961 
 962   void should_not_reach_here()                   { stop("should not reach here"); }
 963 
 964   // Stack overflow checking
 965   void bang_stack_with_offset(int offset) {
 966     // stack grows down, caller passes positive offset
 967     assert(offset > 0, "must bang with negative offset");
 968     mov(rscratch2, -offset);
 969     str(zr, Address(sp, rscratch2));
 970   }
 971 




 518   // FPSR : op1 == 011
 519   //        CRn == 0100
 520   //        CRm == 0100
 521   //        op2 == 001
 522 
 523   inline void get_fpsr(Register reg)
 524   {
 525     mrs(0b11, 0b0100, 0b0100, 0b001, reg);
 526   }
 527 
 528   inline void set_fpsr(Register reg)
 529   {
 530     msr(0b011, 0b0100, 0b0100, 0b001, reg);
 531   }
 532 
 533   inline void clear_fpsr()
 534   {
 535     msr(0b011, 0b0100, 0b0100, 0b001, zr);
 536   }
 537 











 538   // DCZID_EL0: op1 == 011
 539   //            CRn == 0000
 540   //            CRm == 0000
 541   //            op2 == 111
 542   inline void get_dczid_el0(Register reg)
 543   {
 544     mrs(0b011, 0b0000, 0b0000, 0b111, reg);
 545   }
 546 
 547   // CTR_EL0:   op1 == 011
 548   //            CRn == 0000
 549   //            CRm == 0000
 550   //            op2 == 001
 551   inline void get_ctr_el0(Register reg)
 552   {
 553     mrs(0b011, 0b0000, 0b0000, 0b001, reg);
 554   }
 555 
 556   // idiv variant which deals with MINLONG as dividend and -1 as divisor
 557   int corrected_idivl(Register result, Register ra, Register rb,


 920   Address argument_address(RegisterOrConstant arg_slot, int extra_slot_offset = 0);
 921 
 922 
 923   // Debugging
 924 
 925   // only if +VerifyOops
 926   void verify_oop(Register reg, const char* s = "broken oop");
 927   void verify_oop_addr(Address addr, const char * s = "broken oop addr");
 928 
 929 // TODO: verify method and klass metadata (compare against vptr?)
 930   void _verify_method_ptr(Register reg, const char * msg, const char * file, int line) {}
 931   void _verify_klass_ptr(Register reg, const char * msg, const char * file, int line){}
 932 
 933 #define verify_method_ptr(reg) _verify_method_ptr(reg, "broken method " #reg, __FILE__, __LINE__)
 934 #define verify_klass_ptr(reg) _verify_klass_ptr(reg, "broken klass " #reg, __FILE__, __LINE__)
 935 
 936   // only if +VerifyFPU
 937   void verify_FPU(int stack_depth, const char* s = "illegal FPU state");
 938 
 939   // prints msg, dumps registers and stops execution
 940   void stop(const char* msg);
 941 
 942   // prints msg and continues
 943   void warn(const char* msg);
 944 
 945   static void debug64(char* msg, int64_t pc, int64_t regs[]);
 946 
 947   void untested()                                { stop("untested"); }
 948 
 949   void unimplemented(const char* what = "")      { char* b = new char[1024];  jio_snprintf(b, 1024, "unimplemented: %s", what);  stop(b); }
 950 
 951   void should_not_reach_here()                   { stop("should not reach here"); }
 952 
 953   // Stack overflow checking
 954   void bang_stack_with_offset(int offset) {
 955     // stack grows down, caller passes positive offset
 956     assert(offset > 0, "must bang with negative offset");
 957     mov(rscratch2, -offset);
 958     str(zr, Address(sp, rscratch2));
 959   }
 960 


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