src/cpu/aarch64/vm/macroAssembler_aarch64.hpp

rev 10699 : [backport] Several AArch64 cleanups
rev 10703 : [backport] More AArch64 assembler cleanups

@@ -533,21 +533,10 @@
   inline void clear_fpsr()
   {
     msr(0b011, 0b0100, 0b0100, 0b001, zr);
   }
 
-  // Macro instructions for accessing and updating the condition flags
-  inline void get_nzcv(Register reg)
-  {
-    mrs(0b011, 0b0100, 0b0010, 0b000, reg);
-  }
-
-  inline void set_nzcv(Register reg)
-  {
-    msr(0b011, 0b0100, 0b0010, 0b000, reg);
-  }
-
   // DCZID_EL0: op1 == 011
   //            CRn == 0000
   //            CRm == 0000
   //            op2 == 111
   inline void get_dczid_el0(Register reg)

@@ -946,11 +935,11 @@
 
   // only if +VerifyFPU
   void verify_FPU(int stack_depth, const char* s = "illegal FPU state");
 
   // prints msg, dumps registers and stops execution
-  void stop(const char* msg, Label *l = NULL);
+  void stop(const char* msg);
 
   // prints msg and continues
   void warn(const char* msg);
 
   static void debug64(char* msg, int64_t pc, int64_t regs[]);