1 /*
2 * Copyright (c) 2018, Red Hat, Inc. and/or its affiliates.
3 *
4 * This code is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License version 2 only, as
6 * published by the Free Software Foundation.
7 *
8 * This code is distributed in the hope that it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
11 * version 2 for more details (a copy is included in the LICENSE file that
12 * accompanied this code).
13 *
14 * You should have received a copy of the GNU General Public License version
15 * 2 along with this work; if not, write to the Free Software Foundation,
16 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
17 *
18 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
19 * or visit www.oracle.com if you need additional information or have any
20 * questions.
21 *
22 */
23
24 #include "precompiled.hpp"
25 #include "gc/shenandoah/brooksPointer.hpp"
26 #include "gc/shenandoah/shenandoahBaseBarrierSetAssembler.hpp"
27 #include "gc/shenandoah/shenandoahHeap.hpp"
28 #include "gc/shenandoah/shenandoahHeapRegion.hpp"
29 #include "gc/shenandoah/shenandoahHeuristics.hpp"
30 #include "gc/shenandoah/shenandoahRuntime.hpp"
31 #include "gc/shenandoah/shenandoahThreadLocalData.hpp"
32 #include "interpreter/interpreter.hpp"
33 #include "interpreter/interp_masm.hpp"
34 #include "runtime/sharedRuntime.hpp"
35 #include "runtime/thread.hpp"
36 #include "utilities/macros.hpp"
37 #ifdef COMPILER1
38 #include "c1/c1_LIRAssembler.hpp"
39 #include "c1/c1_MacroAssembler.hpp"
40 #include "gc/shenandoah/c1/shenandoahBarrierSetC1.hpp"
41 #endif
42
43 #define __ masm->
44
45 address ShenandoahBaseBarrierSetAssembler::_shenandoah_wb = NULL;
46 address ShenandoahBaseBarrierSetAssembler::_shenandoah_wb_C = NULL;
47
48 void ShenandoahBaseBarrierSetAssembler::arraycopy_prologue(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
49 Register src, Register dst, Register count) {
50
51 bool checkcast = (decorators & ARRAYCOPY_CHECKCAST) != 0;
52 bool disjoint = (decorators & ARRAYCOPY_DISJOINT) != 0;
53 bool obj_int = type == T_OBJECT LP64_ONLY(&& UseCompressedOops);
54 bool dest_uninitialized = (decorators & IS_DEST_UNINITIALIZED) != 0;
55
56 if (type == T_OBJECT || type == T_ARRAY) {
57 #ifdef _LP64
58 if (!checkcast && !obj_int) {
59 // Save count for barrier
60 __ movptr(r11, count);
61 } else if (disjoint && obj_int) {
62 // Save dst in r11 in the disjoint case
63 __ movq(r11, dst);
64 }
65 #else
66 if (disjoint) {
67 __ mov(rdx, dst); // save 'to'
68 }
69 #endif
70
71 if (!dest_uninitialized && !ShenandoahHeap::heap()->heuristics()->can_do_traversal_gc()) {
72 Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
73 #ifndef _LP64
74 __ push(thread);
75 __ get_thread(thread);
76 #endif
77
78 Label filtered;
79 Address in_progress(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_active_offset()));
80 // Is marking active?
81 if (in_bytes(SATBMarkQueue::byte_width_of_active()) == 4) {
82 __ cmpl(in_progress, 0);
83 } else {
84 assert(in_bytes(SATBMarkQueue::byte_width_of_active()) == 1, "Assumption");
85 __ cmpb(in_progress, 0);
86 }
87
88 NOT_LP64(__ pop(thread);)
89
90 __ jcc(Assembler::equal, filtered);
91
92 __ pusha(); // push registers
93 #ifdef _LP64
94 if (count == c_rarg0) {
95 if (dst == c_rarg1) {
96 // exactly backwards!!
97 __ xchgptr(c_rarg1, c_rarg0);
98 } else {
99 __ movptr(c_rarg1, count);
100 __ movptr(c_rarg0, dst);
101 }
102 } else {
103 __ movptr(c_rarg0, dst);
104 __ movptr(c_rarg1, count);
105 }
106 if (UseCompressedOops) {
107 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_array_pre_narrow_oop_entry), 2);
108 } else {
109 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_array_pre_oop_entry), 2);
110 }
111 #else
112 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_array_pre_oop_entry),
113 dst, count);
114 #endif
115 __ popa();
116 __ bind(filtered);
117 }
118 }
119
120 }
121
122 void ShenandoahBaseBarrierSetAssembler::arraycopy_epilogue(MacroAssembler* masm, DecoratorSet decorators, BasicType type,
123 Register src, Register dst, Register count) {
124 bool checkcast = (decorators & ARRAYCOPY_CHECKCAST) != 0;
125 bool disjoint = (decorators & ARRAYCOPY_DISJOINT) != 0;
126 bool obj_int = type == T_OBJECT LP64_ONLY(&& UseCompressedOops);
127 Register tmp = rax;
128
129 if (type == T_OBJECT || type == T_ARRAY) {
130 #ifdef _LP64
131 if (!checkcast && !obj_int) {
132 // Save count for barrier
133 count = r11;
134 } else if (disjoint && obj_int) {
135 // Use the saved dst in the disjoint case
136 dst = r11;
137 } else if (checkcast) {
138 tmp = rscratch1;
139 }
140 #else
141 if (disjoint) {
142 __ mov(dst, rdx); // restore 'to'
143 }
144 #endif
145
146 __ pusha(); // push registers (overkill)
147 #ifdef _LP64
148 if (c_rarg0 == count) { // On win64 c_rarg0 == rcx
149 assert_different_registers(c_rarg1, dst);
150 __ mov(c_rarg1, count);
151 __ mov(c_rarg0, dst);
152 } else {
153 assert_different_registers(c_rarg0, count);
154 __ mov(c_rarg0, dst);
155 __ mov(c_rarg1, count);
156 }
157 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_array_post_entry), 2);
158 #else
159 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_array_post_entry),
160 dst, count);
161 #endif
162 __ popa();
163 }
164 }
165
166 void ShenandoahBaseBarrierSetAssembler::shenandoah_write_barrier_pre(MacroAssembler* masm,
167 Register obj,
168 Register pre_val,
169 Register thread,
170 Register tmp,
171 bool tosca_live,
172 bool expand_call) {
173
174 if (ShenandoahSATBBarrier) {
175 satb_write_barrier_pre(masm, obj, pre_val, thread, tmp, tosca_live, expand_call);
176 }
177 }
178
179 void ShenandoahBaseBarrierSetAssembler::satb_write_barrier_pre(MacroAssembler* masm,
180 Register obj,
181 Register pre_val,
182 Register thread,
183 Register tmp,
184 bool tosca_live,
185 bool expand_call) {
186 // If expand_call is true then we expand the call_VM_leaf macro
187 // directly to skip generating the check by
188 // InterpreterMacroAssembler::call_VM_leaf_base that checks _last_sp.
189
190 #ifdef _LP64
191 assert(thread == r15_thread, "must be");
192 #endif // _LP64
193
194 Label done;
195 Label runtime;
196
197 assert(pre_val != noreg, "check this code");
198
199 if (obj != noreg) {
200 assert_different_registers(obj, pre_val, tmp);
201 assert(pre_val != rax, "check this code");
202 }
203
204 Address in_progress(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_active_offset()));
205 Address index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
206 Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
207
208 Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
209 __ testb(gc_state, ShenandoahHeap::MARKING | ShenandoahHeap::TRAVERSAL);
210 __ jcc(Assembler::zero, done);
211
212 // Do we need to load the previous value?
213 if (obj != noreg) {
214 __ load_heap_oop(pre_val, Address(obj, 0), noreg, noreg, AS_RAW);
215 }
216
217 // Is the previous value null?
218 __ cmpptr(pre_val, (int32_t) NULL_WORD);
219 __ jcc(Assembler::equal, done);
220
221 // Can we store original value in the thread's buffer?
222 // Is index == 0?
223 // (The index field is typed as size_t.)
224
225 __ movptr(tmp, index); // tmp := *index_adr
226 __ cmpptr(tmp, 0); // tmp == 0?
227 __ jcc(Assembler::equal, runtime); // If yes, goto runtime
228
229 __ subptr(tmp, wordSize); // tmp := tmp - wordSize
230 __ movptr(index, tmp); // *index_adr := tmp
231 __ addptr(tmp, buffer); // tmp := tmp + *buffer_adr
232
233 // Record the previous value
234 __ movptr(Address(tmp, 0), pre_val);
235 __ jmp(done);
236
237 __ bind(runtime);
238 // save the live input values
239 if(tosca_live) __ push(rax);
240
241 if (obj != noreg && obj != rax)
242 __ push(obj);
243
244 if (pre_val != rax)
245 __ push(pre_val);
246
247 // Calling the runtime using the regular call_VM_leaf mechanism generates
248 // code (generated by InterpreterMacroAssember::call_VM_leaf_base)
249 // that checks that the *(ebp+frame::interpreter_frame_last_sp) == NULL.
250 //
251 // If we care generating the pre-barrier without a frame (e.g. in the
252 // intrinsified Reference.get() routine) then ebp might be pointing to
253 // the caller frame and so this check will most likely fail at runtime.
254 //
255 // Expanding the call directly bypasses the generation of the check.
256 // So when we do not have have a full interpreter frame on the stack
257 // expand_call should be passed true.
258
259 NOT_LP64( __ push(thread); )
260
261 #ifdef _LP64
262 // We move pre_val into c_rarg0 early, in order to avoid smashing it, should
263 // pre_val be c_rarg1 (where the call prologue would copy thread argument).
264 // Note: this should not accidentally smash thread, because thread is always r15.
265 assert(thread != c_rarg0, "smashed arg");
266 if (c_rarg0 != pre_val) {
267 __ mov(c_rarg0, pre_val);
268 }
269 #endif
270
271 if (expand_call) {
272 LP64_ONLY( assert(pre_val != c_rarg1, "smashed arg"); )
273 #ifdef _LP64
274 if (c_rarg1 != thread) {
275 __ mov(c_rarg1, thread);
276 }
277 // Already moved pre_val into c_rarg0 above
278 #else
279 __ push(thread);
280 __ push(pre_val);
281 #endif
282 __ MacroAssembler::call_VM_leaf_base(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_field_pre_entry), 2);
283 } else {
284 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_field_pre_entry), LP64_ONLY(c_rarg0) NOT_LP64(pre_val), thread);
285 }
286
287 NOT_LP64( __ pop(thread); )
288
289 // save the live input values
290 if (pre_val != rax)
291 __ pop(pre_val);
292
293 if (obj != noreg && obj != rax)
294 __ pop(obj);
295
296 if(tosca_live) __ pop(rax);
297
298 __ bind(done);
299 }
300
301 void ShenandoahBaseBarrierSetAssembler::read_barrier(MacroAssembler* masm, Register dst) {
302 if (ShenandoahReadBarrier) {
303 read_barrier_impl(masm, dst);
304 }
305 }
306
307 void ShenandoahBaseBarrierSetAssembler::read_barrier_impl(MacroAssembler* masm, Register dst) {
308 assert(UseShenandoahGC && (ShenandoahReadBarrier || ShenandoahStoreValReadBarrier || ShenandoahCASBarrier), "should be enabled");
309 Label is_null;
310 __ testptr(dst, dst);
311 __ jcc(Assembler::zero, is_null);
312 read_barrier_not_null_impl(masm, dst);
313 __ bind(is_null);
314 }
315
316 void ShenandoahBaseBarrierSetAssembler::read_barrier_not_null(MacroAssembler* masm, Register dst) {
317 if (ShenandoahReadBarrier) {
318 read_barrier_not_null_impl(masm, dst);
319 }
320 }
321
322 void ShenandoahBaseBarrierSetAssembler::read_barrier_not_null_impl(MacroAssembler* masm, Register dst) {
323 assert(UseShenandoahGC && (ShenandoahReadBarrier || ShenandoahStoreValReadBarrier || ShenandoahCASBarrier), "should be enabled");
324 __ movptr(dst, Address(dst, BrooksPointer::byte_offset()));
325 }
326
327
328 void ShenandoahBaseBarrierSetAssembler::write_barrier(MacroAssembler* masm, Register dst) {
329 if (ShenandoahWriteBarrier) {
330 write_barrier_impl(masm, dst);
331 }
332 }
333
334 void ShenandoahBaseBarrierSetAssembler::write_barrier_impl(MacroAssembler* masm, Register dst) {
335 assert(UseShenandoahGC && (ShenandoahWriteBarrier || ShenandoahStoreValEnqueueBarrier), "Should be enabled");
336 #ifdef _LP64
337 Label done;
338
339 Address gc_state(r15_thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
340 __ testb(gc_state, ShenandoahHeap::HAS_FORWARDED | ShenandoahHeap::EVACUATION | ShenandoahHeap::TRAVERSAL);
341 __ jccb(Assembler::zero, done);
342
343 // Heap is unstable, need to perform the read-barrier even if WB is inactive
344 if (ShenandoahWriteBarrierRB) {
345 read_barrier_not_null(masm, dst);
346 }
347
348 __ testb(gc_state, ShenandoahHeap::EVACUATION | ShenandoahHeap::TRAVERSAL);
349 __ jccb(Assembler::zero, done);
350
351 if (dst != rax) {
352 __ xchgptr(dst, rax); // Move obj into rax and save rax into obj.
353 }
354
355 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, ShenandoahBaseBarrierSetAssembler::shenandoah_wb())));
356
357 if (dst != rax) {
358 __ xchgptr(rax, dst); // Swap back obj with rax.
359 }
360
361 __ bind(done);
362 #else
363 Unimplemented();
364 #endif
365 }
366
367 void ShenandoahBaseBarrierSetAssembler::storeval_barrier(MacroAssembler* masm, Register dst, Register tmp) {
368 if (ShenandoahStoreValReadBarrier || ShenandoahStoreValEnqueueBarrier) {
369 storeval_barrier_impl(masm, dst, tmp);
370 }
371 }
372
373 void ShenandoahBaseBarrierSetAssembler::storeval_barrier_impl(MacroAssembler* masm, Register dst, Register tmp) {
374 assert(UseShenandoahGC && (ShenandoahStoreValReadBarrier || ShenandoahStoreValEnqueueBarrier), "should be enabled");
375
376 if (dst == noreg) return;
377
378 #ifdef _LP64
379 if (ShenandoahStoreValEnqueueBarrier) {
380 Label is_null;
381 __ testptr(dst, dst);
382 __ jcc(Assembler::zero, is_null);
383 write_barrier_impl(masm, dst);
384 __ bind(is_null);
385
386 enqueue_barrier(masm, dst, tmp);
387 }
388 if (ShenandoahStoreValReadBarrier) {
389 read_barrier_impl(masm, dst);
390 }
391 #else
392 Unimplemented();
393 #endif
394 }
395
396 void ShenandoahBaseBarrierSetAssembler::enqueue_barrier(MacroAssembler* masm, Register dst, Register tmp) {
397 if (ShenandoahStoreValEnqueueBarrier) {
398 // The set of registers to be saved+restored is the same as in the write-barrier above.
399 // Those are the commonly used registers in the interpreter.
400 __ pusha();
401 // __ push_callee_saved_registers();
402 __ subptr(rsp, 2 * Interpreter::stackElementSize);
403 __ movdbl(Address(rsp, 0), xmm0);
404
405 satb_write_barrier_pre(masm, noreg, dst, r15_thread, tmp, true, false);
406 __ movdbl(xmm0, Address(rsp, 0));
407 __ addptr(rsp, 2 * Interpreter::stackElementSize);
408 //__ pop_callee_saved_registers();
409 __ popa();
410 }
411 }
412
413 void ShenandoahBaseBarrierSetAssembler::tlab_allocate(MacroAssembler* masm,
414 Register thread, Register obj,
415 Register var_size_in_bytes,
416 int con_size_in_bytes,
417 Register t1, Register t2,
418 Label& slow_case) {
419 assert_different_registers(obj, t1, t2);
420 assert_different_registers(obj, var_size_in_bytes, t1);
421 Register end = t2;
422 if (!thread->is_valid()) {
423 #ifdef _LP64
424 thread = r15_thread;
425 #else
426 assert(t1->is_valid(), "need temp reg");
427 thread = t1;
428 __ get_thread(thread);
429 #endif
430 }
431
432 __ verify_tlab();
433
434 __ movptr(obj, Address(thread, JavaThread::tlab_top_offset()));
435 if (var_size_in_bytes == noreg) {
436 __ lea(end, Address(obj, con_size_in_bytes + BrooksPointer::byte_size()));
437 } else {
438 __ addptr(var_size_in_bytes, BrooksPointer::byte_size());
439 __ lea(end, Address(obj, var_size_in_bytes, Address::times_1));
440 }
441 __ cmpptr(end, Address(thread, JavaThread::tlab_end_offset()));
442 __ jcc(Assembler::above, slow_case);
443
444 // update the tlab top pointer
445 __ movptr(Address(thread, JavaThread::tlab_top_offset()), end);
446
447 // Initialize brooks pointer
448 #ifdef _LP64
449 __ incrementq(obj, BrooksPointer::byte_size());
450 #else
451 __ incrementl(obj, BrooksPointer::byte_size());
452 #endif
453 __ movptr(Address(obj, BrooksPointer::byte_offset()), obj);
454
455 // recover var_size_in_bytes if necessary
456 if (var_size_in_bytes == end) {
457 __ subptr(var_size_in_bytes, obj);
458 }
459 __ verify_tlab();
460 }
461
462
463 // Special Shenandoah CAS implementation that handles false negatives
464 // due to concurrent evacuation.
465 #ifndef _LP64
466 void ShenandoahBaseBarrierSetAssembler::cmpxchg_oop(MacroAssembler* masm,
467 Register res, Address addr, Register oldval, Register newval,
468 bool exchange, bool encode, Register tmp1, Register tmp2) {
469 // Shenandoah has no 32-bit version for this.
470 Unimplemented();
471 }
472 #else
473 void ShenandoahBaseBarrierSetAssembler::cmpxchg_oop(MacroAssembler* masm,
474 Register res, Address addr, Register oldval, Register newval,
475 bool exchange, bool encode, Register tmp1, Register tmp2) {
476 if (!ShenandoahCASBarrier) {
477 #ifdef _LP64
478 if (UseCompressedOops) {
479 if (encode) {
480 __ encode_heap_oop(oldval);
481 __ mov(rscratch1, newval);
482 __ encode_heap_oop(rscratch1);
483 newval = rscratch1;
484 }
485 if (os::is_MP()) {
486 __ lock();
487 }
488 // oldval (rax) is implicitly used by this instruction
489 __ cmpxchgl(newval, addr);
490 } else
491 #endif
492 {
493 if (os::is_MP()) {
494 __ lock();
495 }
496 __ cmpxchgptr(newval, addr);
497 }
498
499 if (!exchange) {
500 assert(res != NULL, "need result register");
501 __ setb(Assembler::equal, res);
502 __ movzbl(res, res);
503 }
504 return;
505 }
506
507 assert(ShenandoahCASBarrier, "Should only be used when CAS barrier is enabled");
508 assert(oldval == rax, "must be in rax for implicit use in cmpxchg");
509
510 Label retry, done;
511
512 // Apply storeval barrier to newval.
513 if (encode) {
514 storeval_barrier(masm, newval, tmp1);
515 }
516
517 if (UseCompressedOops) {
518 if (encode) {
519 __ encode_heap_oop(oldval);
520 __ mov(rscratch1, newval);
521 __ encode_heap_oop(rscratch1);
522 newval = rscratch1;
523 }
524 }
525
526 // Remember oldval for retry logic below
527 if (UseCompressedOops) {
528 __ movl(tmp1, oldval);
529 } else {
530 __ movptr(tmp1, oldval);
531 }
532
533 // Step 1. Try to CAS with given arguments. If successful, then we are done,
534 // and can safely return.
535 if (os::is_MP()) __ lock();
536 if (UseCompressedOops) {
537 __ cmpxchgl(newval, addr);
538 } else {
539 __ cmpxchgptr(newval, addr);
540 }
541 __ jcc(Assembler::equal, done, true);
542
543 // Step 2. CAS had failed. This may be a false negative.
544 //
545 // The trouble comes when we compare the to-space pointer with the from-space
546 // pointer to the same object. To resolve this, it will suffice to read both
547 // oldval and the value from memory through the read barriers -- this will give
548 // both to-space pointers. If they mismatch, then it was a legitimate failure.
549 //
550 if (UseCompressedOops) {
551 __ decode_heap_oop(tmp1);
552 }
553 read_barrier_impl(masm, tmp1);
554
555 if (UseCompressedOops) {
556 __ movl(tmp2, oldval);
557 __ decode_heap_oop(tmp2);
558 } else {
559 __ movptr(tmp2, oldval);
560 }
561 read_barrier_impl(masm, tmp2);
562
563 __ cmpptr(tmp1, tmp2);
564 __ jcc(Assembler::notEqual, done, true);
565
566 // Step 3. Try to CAS again with resolved to-space pointers.
567 //
568 // Corner case: it may happen that somebody stored the from-space pointer
569 // to memory while we were preparing for retry. Therefore, we can fail again
570 // on retry, and so need to do this in loop, always re-reading the failure
571 // witness through the read barrier.
572 __ bind(retry);
573 if (os::is_MP()) __ lock();
574 if (UseCompressedOops) {
575 __ cmpxchgl(newval, addr);
576 } else {
577 __ cmpxchgptr(newval, addr);
578 }
579 __ jcc(Assembler::equal, done, true);
580
581 if (UseCompressedOops) {
582 __ movl(tmp2, oldval);
583 __ decode_heap_oop(tmp2);
584 } else {
585 __ movptr(tmp2, oldval);
586 }
587 read_barrier_impl(masm, tmp2);
588
589 __ cmpptr(tmp1, tmp2);
590 __ jcc(Assembler::equal, retry, true);
591
592 // Step 4. If we need a boolean result out of CAS, check the flag again,
593 // and promote the result. Note that we handle the flag from both the CAS
594 // itself and from the retry loop.
595 __ bind(done);
596 if (!exchange) {
597 assert(res != NULL, "need result register");
598 __ setb(Assembler::equal, res);
599 __ movzbl(res, res);
600 }
601 }
602 #endif // LP64
603
604 #ifdef COMPILER1
605
606 #undef __
607 #define __ ce->masm()->
608
609 void ShenandoahBaseBarrierSetAssembler::gen_pre_barrier_stub(LIR_Assembler* ce, ShenandoahPreBarrierStub* stub) {
610 ShenandoahBarrierSetC1* bs = (ShenandoahBarrierSetC1*)BarrierSet::barrier_set()->barrier_set_c1();
611 // At this point we know that marking is in progress.
612 // If do_load() is true then we have to emit the
613 // load of the previous value; otherwise it has already
614 // been loaded into _pre_val.
615
616 __ bind(*stub->entry());
617 assert(stub->pre_val()->is_register(), "Precondition.");
618
619 Register pre_val_reg = stub->pre_val()->as_register();
620
621 if (stub->do_load()) {
622 ce->mem2reg(stub->addr(), stub->pre_val(), T_OBJECT, stub->patch_code(), stub->info(), false /*wide*/, false /*unaligned*/);
623 }
624
625 __ cmpptr(pre_val_reg, (int32_t)NULL_WORD);
626 __ jcc(Assembler::equal, *stub->continuation());
627 ce->store_parameter(stub->pre_val()->as_register(), 0);
628 __ call(RuntimeAddress(bs->pre_barrier_c1_runtime_code_blob()->code_begin()));
629 __ jmp(*stub->continuation());
630
631 }
632
633 void ShenandoahBaseBarrierSetAssembler::gen_write_barrier_stub(LIR_Assembler* ce, ShenandoahWriteBarrierStub* stub) {
634 __ bind(*stub->entry());
635
636 Label done;
637 Register obj = stub->obj()->as_register();
638 Register res = stub->result()->as_register();
639
640 if (res != obj) {
641 __ mov(res, obj);
642 }
643
644 // Check for null.
645 if (stub->needs_null_check()) {
646 __ testptr(res, res);
647 __ jcc(Assembler::zero, done);
648 }
649
650 write_barrier(ce->masm(), res);
651
652 __ bind(done);
653 __ jmp(*stub->continuation());
654 }
655
656 #undef __
657
658 #define __ sasm->
659
660 void ShenandoahBaseBarrierSetAssembler::generate_c1_pre_barrier_runtime_stub(StubAssembler* sasm) {
661 __ prologue("shenandoah_pre_barrier", false);
662 // arg0 : previous value of memory
663
664 __ push(rax);
665 __ push(rdx);
666
667 const Register pre_val = rax;
668 const Register thread = NOT_LP64(rax) LP64_ONLY(r15_thread);
669 const Register tmp = rdx;
670
671 NOT_LP64(__ get_thread(thread);)
672
673 Address queue_index(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_index_offset()));
674 Address buffer(thread, in_bytes(ShenandoahThreadLocalData::satb_mark_queue_buffer_offset()));
675
676 Label done;
677 Label runtime;
678
679 // Is SATB still active?
680 Address gc_state(thread, in_bytes(ShenandoahThreadLocalData::gc_state_offset()));
681 __ testb(gc_state, ShenandoahHeap::MARKING | ShenandoahHeap::TRAVERSAL);
682 __ jcc(Assembler::zero, done);
683
684 // Can we store original value in the thread's buffer?
685
686 __ movptr(tmp, queue_index);
687 __ testptr(tmp, tmp);
688 __ jcc(Assembler::zero, runtime);
689 __ subptr(tmp, wordSize);
690 __ movptr(queue_index, tmp);
691 __ addptr(tmp, buffer);
692
693 // prev_val (rax)
694 __ load_parameter(0, pre_val);
695 __ movptr(Address(tmp, 0), pre_val);
696 __ jmp(done);
697
698 __ bind(runtime);
699
700 __ save_live_registers_no_oop_map(true);
701
702 // load the pre-value
703 __ load_parameter(0, rcx);
704 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_ref_field_pre_entry), rcx, thread);
705
706 __ restore_live_registers(true);
707
708 __ bind(done);
709
710 __ pop(rdx);
711 __ pop(rax);
712
713 __ epilogue();
714 }
715
716 #undef __
717
718 #endif // COMPILER1
719
720 address ShenandoahBaseBarrierSetAssembler::shenandoah_wb() {
721 assert(_shenandoah_wb != NULL, "need write barrier stub");
722 return _shenandoah_wb;
723 }
724
725 address ShenandoahBaseBarrierSetAssembler::shenandoah_wb_C() {
726 assert(_shenandoah_wb_C != NULL, "need write barrier stub");
727 return _shenandoah_wb_C;
728 }
729
730 #define __ cgen->assembler()->
731
732 address ShenandoahBaseBarrierSetAssembler::generate_shenandoah_wb(StubCodeGenerator* cgen, bool c_abi, bool do_cset_test) {
733 __ align(CodeEntryAlignment);
734 StubCodeMark mark(cgen, "StubRoutines", "shenandoah_wb");
735 address start = __ pc();
736
737 #ifdef _LP64
738 Label not_done;
739
740 // We use RDI, which also serves as argument register for slow call.
741 // RAX always holds the src object ptr, except after the slow call and
742 // the cmpxchg, then it holds the result.
743 // R8 and RCX are used as temporary registers.
744 if (!c_abi) {
745 __ push(rdi);
746 __ push(r8);
747 }
748
749 // Check for object beeing in the collection set.
750 // TODO: Can we use only 1 register here?
751 // The source object arrives here in rax.
752 // live: rax
753 // live: rdi
754 if (!c_abi) {
755 __ mov(rdi, rax);
756 } else {
757 if (rax != c_rarg0) {
758 __ mov(rax, c_rarg0);
759 }
760 }
761 if (do_cset_test) {
762 __ shrptr(rdi, ShenandoahHeapRegion::region_size_bytes_shift_jint());
763 // live: r8
764 __ movptr(r8, (intptr_t) ShenandoahHeap::in_cset_fast_test_addr());
765 __ movbool(r8, Address(r8, rdi, Address::times_1));
766 // unlive: rdi
767 __ testbool(r8);
768 // unlive: r8
769 __ jccb(Assembler::notZero, not_done);
770
771 if (!c_abi) {
772 __ pop(r8);
773 __ pop(rdi);
774 }
775 __ ret(0);
776
777 __ bind(not_done);
778 }
779
780 if (!c_abi) {
781 __ push(rcx);
782 }
783
784 if (!c_abi) {
785 __ push(rdx);
786 __ push(rdi);
787 __ push(rsi);
788 __ push(r8);
789 __ push(r9);
790 __ push(r10);
791 __ push(r11);
792 __ push(r12);
793 __ push(r13);
794 __ push(r14);
795 __ push(r15);
796 }
797 __ save_vector_registers();
798 __ movptr(rdi, rax);
799 __ call_VM_leaf(CAST_FROM_FN_PTR(address, ShenandoahRuntime::write_barrier_JRT), rdi);
800 __ restore_vector_registers();
801 if (!c_abi) {
802 __ pop(r15);
803 __ pop(r14);
804 __ pop(r13);
805 __ pop(r12);
806 __ pop(r11);
807 __ pop(r10);
808 __ pop(r9);
809 __ pop(r8);
810 __ pop(rsi);
811 __ pop(rdi);
812 __ pop(rdx);
813
814 __ pop(rcx);
815 __ pop(r8);
816 __ pop(rdi);
817 }
818 __ ret(0);
819 #else
820 ShouldNotReachHere();
821 #endif
822 return start;
823 }
824
825 #undef __
826
827 void ShenandoahBaseBarrierSetAssembler::barrier_stubs_init() {
828 if (ShenandoahWriteBarrier || ShenandoahStoreValEnqueueBarrier) {
829 int stub_code_size = 4096;
830 ResourceMark rm;
831 BufferBlob* bb = BufferBlob::create("shenandoah_barrier_stubs", stub_code_size);
832 CodeBuffer buf(bb);
833 StubCodeGenerator cgen(&buf);
834 _shenandoah_wb = generate_shenandoah_wb(&cgen, false, true);
835 _shenandoah_wb_C = generate_shenandoah_wb(&cgen, true, !ShenandoahWriteBarrierCsetTestInIR);
836 }
837 }