1 /*
   2  * Copyright (c) 1998, 2018, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "asm/macroAssembler.inline.hpp"
  27 #include "memory/allocation.inline.hpp"
  28 #include "opto/ad.hpp"
  29 #include "opto/block.hpp"
  30 #include "opto/c2compiler.hpp"
  31 #include "opto/callnode.hpp"
  32 #include "opto/cfgnode.hpp"
  33 #include "opto/machnode.hpp"
  34 #include "opto/runtime.hpp"
  35 #include "opto/chaitin.hpp"
  36 #include "runtime/sharedRuntime.hpp"
  37 #include "utilities/macros.hpp"
  38 #if INCLUDE_SHENANDOAHGC
  39 #include "gc/shenandoah/shenandoahBarrierSetAssembler.hpp"
  40 #endif
  41 
  42 // Optimization - Graph Style
  43 
  44 // Check whether val is not-null-decoded compressed oop,
  45 // i.e. will grab into the base of the heap if it represents NULL.
  46 static bool accesses_heap_base_zone(Node *val) {
  47   if (Universe::narrow_oop_base() != NULL) { // Implies UseCompressedOops.
  48     if (val && val->is_Mach()) {
  49       if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) {
  50         // This assumes all Decodes with TypePtr::NotNull are matched to nodes that
  51         // decode NULL to point to the heap base (Decode_NN).
  52         if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) {
  53           return true;
  54         }
  55       }
  56       // Must recognize load operation with Decode matched in memory operand.
  57       // We should not reach here exept for PPC/AIX, as os::zero_page_read_protected()
  58       // returns true everywhere else. On PPC, no such memory operands
  59       // exist, therefore we did not yet implement a check for such operands.
  60       NOT_AIX(Unimplemented());
  61     }
  62   }
  63   return false;
  64 }
  65 
  66 static bool needs_explicit_null_check_for_read(Node *val) {
  67   // On some OSes (AIX) the page at address 0 is only write protected.
  68   // If so, only Store operations will trap.
  69   if (os::zero_page_read_protected()) {
  70     return false;  // Implicit null check will work.
  71   }
  72   // Also a read accessing the base of a heap-based compressed heap will trap.
  73   if (accesses_heap_base_zone(val) &&                    // Hits the base zone page.
  74       Universe::narrow_oop_use_implicit_null_checks()) { // Base zone page is protected.
  75     return false;
  76   }
  77 
  78   return true;
  79 }
  80 
  81 //------------------------------implicit_null_check----------------------------
  82 // Detect implicit-null-check opportunities.  Basically, find NULL checks
  83 // with suitable memory ops nearby.  Use the memory op to do the NULL check.
  84 // I can generate a memory op if there is not one nearby.
  85 // The proj is the control projection for the not-null case.
  86 // The val is the pointer being checked for nullness or
  87 // decodeHeapOop_not_null node if it did not fold into address.
  88 void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) {
  89   // Assume if null check need for 0 offset then always needed
  90   // Intel solaris doesn't support any null checks yet and no
  91   // mechanism exists (yet) to set the switches at an os_cpu level
  92   if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return;
  93 
  94   // Make sure the ptr-is-null path appears to be uncommon!
  95   float f = block->end()->as_MachIf()->_prob;
  96   if( proj->Opcode() == Op_IfTrue ) f = 1.0f - f;
  97   if( f > PROB_UNLIKELY_MAG(4) ) return;
  98 
  99   uint bidx = 0;                // Capture index of value into memop
 100   bool was_store;               // Memory op is a store op
 101 
 102   // Get the successor block for if the test ptr is non-null
 103   Block* not_null_block;  // this one goes with the proj
 104   Block* null_block;
 105   if (block->get_node(block->number_of_nodes()-1) == proj) {
 106     null_block     = block->_succs[0];
 107     not_null_block = block->_succs[1];
 108   } else {
 109     assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other");
 110     not_null_block = block->_succs[0];
 111     null_block     = block->_succs[1];
 112   }
 113   while (null_block->is_Empty() == Block::empty_with_goto) {
 114     null_block     = null_block->_succs[0];
 115   }
 116 
 117   // Search the exception block for an uncommon trap.
 118   // (See Parse::do_if and Parse::do_ifnull for the reason
 119   // we need an uncommon trap.  Briefly, we need a way to
 120   // detect failure of this optimization, as in 6366351.)
 121   {
 122     bool found_trap = false;
 123     for (uint i1 = 0; i1 < null_block->number_of_nodes(); i1++) {
 124       Node* nn = null_block->get_node(i1);
 125       if (nn->is_MachCall() &&
 126           nn->as_MachCall()->entry_point() == SharedRuntime::uncommon_trap_blob()->entry_point()) {
 127         const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type();
 128         if (trtype->isa_int() && trtype->is_int()->is_con()) {
 129           jint tr_con = trtype->is_int()->get_con();
 130           Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con);
 131           Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con);
 132           assert((int)reason < (int)BitsPerInt, "recode bit map");
 133           if (is_set_nth_bit(allowed_reasons, (int) reason)
 134               && action != Deoptimization::Action_none) {
 135             // This uncommon trap is sure to recompile, eventually.
 136             // When that happens, C->too_many_traps will prevent
 137             // this transformation from happening again.
 138             found_trap = true;
 139           }
 140         }
 141         break;
 142       }
 143     }
 144     if (!found_trap) {
 145       // We did not find an uncommon trap.
 146       return;
 147     }
 148   }
 149 
 150   // Check for decodeHeapOop_not_null node which did not fold into address
 151   bool is_decoden = ((intptr_t)val) & 1;
 152   val = (Node*)(((intptr_t)val) & ~1);
 153 
 154   assert(!is_decoden || (val->in(0) == NULL) && val->is_Mach() &&
 155          (val->as_Mach()->ideal_Opcode() == Op_DecodeN), "sanity");
 156 
 157   // Search the successor block for a load or store who's base value is also
 158   // the tested value.  There may be several.
 159   Node_List *out = new Node_List(Thread::current()->resource_area());
 160   MachNode *best = NULL;        // Best found so far
 161   for (DUIterator i = val->outs(); val->has_out(i); i++) {
 162     Node *m = val->out(i);
 163     if( !m->is_Mach() ) continue;
 164     MachNode *mach = m->as_Mach();
 165     was_store = false;
 166     int iop = mach->ideal_Opcode();
 167     switch( iop ) {
 168     case Op_LoadB:
 169     case Op_LoadUB:
 170     case Op_LoadUS:
 171     case Op_LoadD:
 172     case Op_LoadF:
 173     case Op_LoadI:
 174     case Op_LoadL:
 175     case Op_LoadP:
 176     case Op_LoadBarrierSlowReg:
 177     case Op_LoadBarrierWeakSlowReg:
 178     case Op_LoadN:
 179     case Op_LoadS:
 180     case Op_LoadKlass:
 181     case Op_LoadNKlass:
 182     case Op_LoadRange:
 183     case Op_LoadD_unaligned:
 184     case Op_LoadL_unaligned:
 185     case Op_ShenandoahReadBarrier:
 186       assert(mach->in(2) == val, "should be address");
 187       break;
 188     case Op_StoreB:
 189     case Op_StoreC:
 190     case Op_StoreCM:
 191     case Op_StoreD:
 192     case Op_StoreF:
 193     case Op_StoreI:
 194     case Op_StoreL:
 195     case Op_StoreP:
 196     case Op_StoreN:
 197     case Op_StoreNKlass:
 198       was_store = true;         // Memory op is a store op
 199       // Stores will have their address in slot 2 (memory in slot 1).
 200       // If the value being nul-checked is in another slot, it means we
 201       // are storing the checked value, which does NOT check the value!
 202       if( mach->in(2) != val ) continue;
 203       break;                    // Found a memory op?
 204     case Op_StrComp:
 205     case Op_StrEquals:
 206     case Op_StrIndexOf:
 207     case Op_StrIndexOfChar:
 208     case Op_AryEq:
 209     case Op_StrInflatedCopy:
 210     case Op_StrCompressedCopy:
 211     case Op_EncodeISOArray:
 212     case Op_HasNegatives:
 213       // Not a legit memory op for implicit null check regardless of
 214       // embedded loads
 215       continue;
 216     default:                    // Also check for embedded loads
 217       if( !mach->needs_anti_dependence_check() )
 218         continue;               // Not an memory op; skip it
 219       if( must_clone[iop] ) {
 220         // Do not move nodes which produce flags because
 221         // RA will try to clone it to place near branch and
 222         // it will cause recompilation, see clone_node().
 223         continue;
 224       }
 225       {
 226         // Check that value is used in memory address in
 227         // instructions with embedded load (CmpP val1,(val2+off)).
 228         Node* base;
 229         Node* index;
 230         const MachOper* oper = mach->memory_inputs(base, index);
 231         if (oper == NULL || oper == (MachOper*)-1) {
 232           continue;             // Not an memory op; skip it
 233         }
 234         if (val == base ||
 235             (val == index && val->bottom_type()->isa_narrowoop())) {
 236           break;                // Found it
 237         } else {
 238           continue;             // Skip it
 239         }
 240       }
 241       break;
 242     }
 243 
 244     // On some OSes (AIX) the page at address 0 is only write protected.
 245     // If so, only Store operations will trap.
 246     // But a read accessing the base of a heap-based compressed heap will trap.
 247     if (!was_store && needs_explicit_null_check_for_read(val)) {
 248       continue;
 249     }
 250 
 251     // Check that node's control edge is not-null block's head or dominates it,
 252     // otherwise we can't hoist it because there are other control dependencies.
 253     Node* ctrl = mach->in(0);
 254     if (ctrl != NULL && !(ctrl == not_null_block->head() ||
 255         get_block_for_node(ctrl)->dominates(not_null_block))) {
 256       continue;
 257     }
 258 
 259     // check if the offset is not too high for implicit exception
 260     {
 261       intptr_t offset = 0;
 262       const TypePtr *adr_type = NULL;  // Do not need this return value here
 263       const Node* base = mach->get_base_and_disp(offset, adr_type);
 264       if (base == NULL || base == NodeSentinel) {
 265         // Narrow oop address doesn't have base, only index.
 266         // Give up if offset is beyond page size or if heap base is not protected.
 267         if (val->bottom_type()->isa_narrowoop() &&
 268             (MacroAssembler::needs_explicit_null_check(offset) ||
 269              !Universe::narrow_oop_use_implicit_null_checks()))
 270           continue;
 271         // cannot reason about it; is probably not implicit null exception
 272       } else {
 273         const TypePtr* tptr;
 274         if (UseCompressedOops && (Universe::narrow_oop_shift() == 0 ||
 275                                   Universe::narrow_klass_shift() == 0)) {
 276           // 32-bits narrow oop can be the base of address expressions
 277           tptr = base->get_ptr_type();
 278         } else {
 279           // only regular oops are expected here
 280           tptr = base->bottom_type()->is_ptr();
 281         }
 282         // Give up if offset is not a compile-time constant.
 283         if (offset == Type::OffsetBot || tptr->_offset == Type::OffsetBot)
 284           continue;
 285         offset += tptr->_offset; // correct if base is offseted
 286         // Give up if reference is beyond page size.
 287         if (MacroAssembler::needs_explicit_null_check(offset))
 288           continue;
 289         // Give up if base is a decode node and the heap base is not protected.
 290         if (base->is_Mach() && base->as_Mach()->ideal_Opcode() == Op_DecodeN &&
 291             !Universe::narrow_oop_use_implicit_null_checks())
 292           continue;
 293       }
 294     }
 295 
 296     // Check ctrl input to see if the null-check dominates the memory op
 297     Block *cb = get_block_for_node(mach);
 298     cb = cb->_idom;             // Always hoist at least 1 block
 299     if( !was_store ) {          // Stores can be hoisted only one block
 300       while( cb->_dom_depth > (block->_dom_depth + 1))
 301         cb = cb->_idom;         // Hoist loads as far as we want
 302       // The non-null-block should dominate the memory op, too. Live
 303       // range spilling will insert a spill in the non-null-block if it is
 304       // needs to spill the memory op for an implicit null check.
 305       if (cb->_dom_depth == (block->_dom_depth + 1)) {
 306         if (cb != not_null_block) continue;
 307         cb = cb->_idom;
 308       }
 309     }
 310     if( cb != block ) continue;
 311 
 312     // Found a memory user; see if it can be hoisted to check-block
 313     uint vidx = 0;              // Capture index of value into memop
 314     uint j;
 315     for( j = mach->req()-1; j > 0; j-- ) {
 316       if( mach->in(j) == val ) {
 317         vidx = j;
 318         // Ignore DecodeN val which could be hoisted to where needed.
 319         if( is_decoden ) continue;
 320       }
 321       // Block of memory-op input
 322       Block *inb = get_block_for_node(mach->in(j));
 323       Block *b = block;          // Start from nul check
 324       while( b != inb && b->_dom_depth > inb->_dom_depth )
 325         b = b->_idom;           // search upwards for input
 326       // See if input dominates null check
 327       if( b != inb )
 328         break;
 329     }
 330     if( j > 0 )
 331       continue;
 332     Block *mb = get_block_for_node(mach);
 333     // Hoisting stores requires more checks for the anti-dependence case.
 334     // Give up hoisting if we have to move the store past any load.
 335     if( was_store ) {
 336       Block *b = mb;            // Start searching here for a local load
 337       // mach use (faulting) trying to hoist
 338       // n might be blocker to hoisting
 339       while( b != block ) {
 340         uint k;
 341         for( k = 1; k < b->number_of_nodes(); k++ ) {
 342           Node *n = b->get_node(k);
 343           if( n->needs_anti_dependence_check() &&
 344               n->in(LoadNode::Memory) == mach->in(StoreNode::Memory) )
 345             break;              // Found anti-dependent load
 346         }
 347         if( k < b->number_of_nodes() )
 348           break;                // Found anti-dependent load
 349         // Make sure control does not do a merge (would have to check allpaths)
 350         if( b->num_preds() != 2 ) break;
 351         b = get_block_for_node(b->pred(1)); // Move up to predecessor block
 352       }
 353       if( b != block ) continue;
 354     }
 355 
 356     // Make sure this memory op is not already being used for a NullCheck
 357     Node *e = mb->end();
 358     if( e->is_MachNullCheck() && e->in(1) == mach )
 359       continue;                 // Already being used as a NULL check
 360 
 361     // Found a candidate!  Pick one with least dom depth - the highest
 362     // in the dom tree should be closest to the null check.
 363     if (best == NULL || get_block_for_node(mach)->_dom_depth < get_block_for_node(best)->_dom_depth) {
 364       best = mach;
 365       bidx = vidx;
 366     }
 367   }
 368   // No candidate!
 369   if (best == NULL) {
 370     return;
 371   }
 372 
 373   // ---- Found an implicit null check
 374 #ifndef PRODUCT
 375   extern int implicit_null_checks;
 376   implicit_null_checks++;
 377 #endif
 378 
 379   if( is_decoden ) {
 380     // Check if we need to hoist decodeHeapOop_not_null first.
 381     Block *valb = get_block_for_node(val);
 382     if( block != valb && block->_dom_depth < valb->_dom_depth ) {
 383       // Hoist it up to the end of the test block.
 384       valb->find_remove(val);
 385       block->add_inst(val);
 386       map_node_to_block(val, block);
 387       // DecodeN on x86 may kill flags. Check for flag-killing projections
 388       // that also need to be hoisted.
 389       for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) {
 390         Node* n = val->fast_out(j);
 391         if( n->is_MachProj() ) {
 392           get_block_for_node(n)->find_remove(n);
 393           block->add_inst(n);
 394           map_node_to_block(n, block);
 395         }
 396       }
 397     }
 398   }
 399   // Hoist the memory candidate up to the end of the test block.
 400   Block *old_block = get_block_for_node(best);
 401   old_block->find_remove(best);
 402   block->add_inst(best);
 403   map_node_to_block(best, block);
 404 
 405   // Move the control dependence if it is pinned to not-null block.
 406   // Don't change it in other cases: NULL or dominating control.
 407   if (best->in(0) == not_null_block->head()) {
 408     // Set it to control edge of null check.
 409     best->set_req(0, proj->in(0)->in(0));
 410   }
 411 
 412   // Check for flag-killing projections that also need to be hoisted
 413   // Should be DU safe because no edge updates.
 414   for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) {
 415     Node* n = best->fast_out(j);
 416     if( n->is_MachProj() ) {
 417       get_block_for_node(n)->find_remove(n);
 418       block->add_inst(n);
 419       map_node_to_block(n, block);
 420     }
 421   }
 422 
 423   // proj==Op_True --> ne test; proj==Op_False --> eq test.
 424   // One of two graph shapes got matched:
 425   //   (IfTrue  (If (Bool NE (CmpP ptr NULL))))
 426   //   (IfFalse (If (Bool EQ (CmpP ptr NULL))))
 427   // NULL checks are always branch-if-eq.  If we see a IfTrue projection
 428   // then we are replacing a 'ne' test with a 'eq' NULL check test.
 429   // We need to flip the projections to keep the same semantics.
 430   if( proj->Opcode() == Op_IfTrue ) {
 431     // Swap order of projections in basic block to swap branch targets
 432     Node *tmp1 = block->get_node(block->end_idx()+1);
 433     Node *tmp2 = block->get_node(block->end_idx()+2);
 434     block->map_node(tmp2, block->end_idx()+1);
 435     block->map_node(tmp1, block->end_idx()+2);
 436     Node *tmp = new Node(C->top()); // Use not NULL input
 437     tmp1->replace_by(tmp);
 438     tmp2->replace_by(tmp1);
 439     tmp->replace_by(tmp2);
 440     tmp->destruct();
 441   }
 442 
 443   // Remove the existing null check; use a new implicit null check instead.
 444   // Since schedule-local needs precise def-use info, we need to correct
 445   // it as well.
 446   Node *old_tst = proj->in(0);
 447   MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx);
 448   block->map_node(nul_chk, block->end_idx());
 449   map_node_to_block(nul_chk, block);
 450   // Redirect users of old_test to nul_chk
 451   for (DUIterator_Last i2min, i2 = old_tst->last_outs(i2min); i2 >= i2min; --i2)
 452     old_tst->last_out(i2)->set_req(0, nul_chk);
 453   // Clean-up any dead code
 454   for (uint i3 = 0; i3 < old_tst->req(); i3++) {
 455     Node* in = old_tst->in(i3);
 456     old_tst->set_req(i3, NULL);
 457     if (in->outcnt() == 0) {
 458       // Remove dead input node
 459       in->disconnect_inputs(NULL, C);
 460       block->find_remove(in);
 461     }
 462   }
 463 
 464   latency_from_uses(nul_chk);
 465   latency_from_uses(best);
 466 
 467   // insert anti-dependences to defs in this block
 468   if (! best->needs_anti_dependence_check()) {
 469     for (uint k = 1; k < block->number_of_nodes(); k++) {
 470       Node *n = block->get_node(k);
 471       if (n->needs_anti_dependence_check() &&
 472           n->in(LoadNode::Memory) == best->in(StoreNode::Memory)) {
 473         // Found anti-dependent load
 474         insert_anti_dependences(block, n);
 475       }
 476     }
 477   }
 478 }
 479 
 480 
 481 //------------------------------select-----------------------------------------
 482 // Select a nice fellow from the worklist to schedule next. If there is only
 483 // one choice, then use it. Projections take top priority for correctness
 484 // reasons - if I see a projection, then it is next.  There are a number of
 485 // other special cases, for instructions that consume condition codes, et al.
 486 // These are chosen immediately. Some instructions are required to immediately
 487 // precede the last instruction in the block, and these are taken last. Of the
 488 // remaining cases (most), choose the instruction with the greatest latency
 489 // (that is, the most number of pseudo-cycles required to the end of the
 490 // routine). If there is a tie, choose the instruction with the most inputs.
 491 Node* PhaseCFG::select(
 492   Block* block,
 493   Node_List &worklist,
 494   GrowableArray<int> &ready_cnt,
 495   VectorSet &next_call,
 496   uint sched_slot,
 497   intptr_t* recalc_pressure_nodes) {
 498 
 499   // If only a single entry on the stack, use it
 500   uint cnt = worklist.size();
 501   if (cnt == 1) {
 502     Node *n = worklist[0];
 503     worklist.map(0,worklist.pop());
 504     return n;
 505   }
 506 
 507   uint choice  = 0; // Bigger is most important
 508   uint latency = 0; // Bigger is scheduled first
 509   uint score   = 0; // Bigger is better
 510   int idx = -1;     // Index in worklist
 511   int cand_cnt = 0; // Candidate count
 512   bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false;
 513 
 514   for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist
 515     // Order in worklist is used to break ties.
 516     // See caller for how this is used to delay scheduling
 517     // of induction variable increments to after the other
 518     // uses of the phi are scheduled.
 519     Node *n = worklist[i];      // Get Node on worklist
 520 
 521     int iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : 0;
 522     if( n->is_Proj() ||         // Projections always win
 523         n->Opcode()== Op_Con || // So does constant 'Top'
 524         iop == Op_CreateEx ||   // Create-exception must start block
 525         iop == Op_CheckCastPP
 526         ) {
 527       worklist.map(i,worklist.pop());
 528       return n;
 529     }
 530 
 531     // Final call in a block must be adjacent to 'catch'
 532     Node *e = block->end();
 533     if( e->is_Catch() && e->in(0)->in(0) == n )
 534       continue;
 535 
 536     // Memory op for an implicit null check has to be at the end of the block
 537     if( e->is_MachNullCheck() && e->in(1) == n )
 538       continue;
 539 
 540     // Schedule IV increment last.
 541     if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Op_CountedLoopEnd) {
 542       // Cmp might be matched into CountedLoopEnd node.
 543       Node *cmp = (e->in(1)->ideal_reg() == Op_RegFlags) ? e->in(1) : e;
 544       if (cmp->req() > 1 && cmp->in(1) == n && n->is_iteratively_computed()) {
 545         continue;
 546       }
 547     }
 548 
 549     uint n_choice  = 2;
 550 
 551     // See if this instruction is consumed by a branch. If so, then (as the
 552     // branch is the last instruction in the basic block) force it to the
 553     // end of the basic block
 554     if ( must_clone[iop] ) {
 555       // See if any use is a branch
 556       bool found_machif = false;
 557 
 558       for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
 559         Node* use = n->fast_out(j);
 560 
 561         // The use is a conditional branch, make them adjacent
 562         if (use->is_MachIf() && get_block_for_node(use) == block) {
 563           found_machif = true;
 564           break;
 565         }
 566 
 567         // More than this instruction pending for successor to be ready,
 568         // don't choose this if other opportunities are ready
 569         if (ready_cnt.at(use->_idx) > 1)
 570           n_choice = 1;
 571       }
 572 
 573       // loop terminated, prefer not to use this instruction
 574       if (found_machif)
 575         continue;
 576     }
 577 
 578     // See if this has a predecessor that is "must_clone", i.e. sets the
 579     // condition code. If so, choose this first
 580     for (uint j = 0; j < n->req() ; j++) {
 581       Node *inn = n->in(j);
 582       if (inn) {
 583         if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) {
 584           n_choice = 3;
 585           break;
 586         }
 587       }
 588     }
 589 
 590     // MachTemps should be scheduled last so they are near their uses
 591     if (n->is_MachTemp()) {
 592       n_choice = 1;
 593     }
 594 
 595     uint n_latency = get_latency_for_node(n);
 596     uint n_score = n->req();   // Many inputs get high score to break ties
 597 
 598     if (OptoRegScheduling && block_size_threshold_ok) {
 599       if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) {
 600         _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit());
 601         _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit());
 602         // simulate the notion that we just picked this node to schedule
 603         n->add_flag(Node::Flag_is_scheduled);
 604         // now caculate its effect upon the graph if we did
 605         adjust_register_pressure(n, block, recalc_pressure_nodes, false);
 606         // return its state for finalize in case somebody else wins
 607         n->remove_flag(Node::Flag_is_scheduled);
 608         // now save the two final pressure components of register pressure, limiting pressure calcs to short size
 609         short int_pressure = (short)_regalloc->_scratch_int_pressure.current_pressure();
 610         short float_pressure = (short)_regalloc->_scratch_float_pressure.current_pressure();
 611         recalc_pressure_nodes[n->_idx] = int_pressure;
 612         recalc_pressure_nodes[n->_idx] |= (float_pressure << 16);
 613       }
 614 
 615       if (_scheduling_for_pressure) {
 616         latency = n_latency;
 617         if (n_choice != 3) {
 618           // Now evaluate each register pressure component based on threshold in the score.
 619           // In general the defining register type will dominate the score, ergo we will not see register pressure grow on both banks
 620           // on a single instruction, but we might see it shrink on both banks.
 621           // For each use of register that has a register class that is over the high pressure limit, we build n_score up for
 622           // live ranges that terminate on this instruction.
 623           if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
 624             short int_pressure = (short)recalc_pressure_nodes[n->_idx];
 625             n_score = (int_pressure < 0) ? ((score + n_score) - int_pressure) : (int_pressure > 0) ? 1 : n_score;
 626           }
 627           if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
 628             short float_pressure = (short)(recalc_pressure_nodes[n->_idx] >> 16);
 629             n_score = (float_pressure < 0) ? ((score + n_score) - float_pressure) : (float_pressure > 0) ? 1 : n_score;
 630           }
 631         } else {
 632           // make sure we choose these candidates
 633           score = 0;
 634         }
 635       }
 636     }
 637 
 638     // Keep best latency found
 639     cand_cnt++;
 640     if (choice < n_choice ||
 641         (choice == n_choice &&
 642          ((StressLCM && Compile::randomized_select(cand_cnt)) ||
 643           (!StressLCM &&
 644            (latency < n_latency ||
 645             (latency == n_latency &&
 646              (score < n_score))))))) {
 647       choice  = n_choice;
 648       latency = n_latency;
 649       score   = n_score;
 650       idx     = i;               // Also keep index in worklist
 651     }
 652   } // End of for all ready nodes in worklist
 653 
 654   guarantee(idx >= 0, "index should be set");
 655   Node *n = worklist[(uint)idx];      // Get the winner
 656 
 657   worklist.map((uint)idx, worklist.pop());     // Compress worklist
 658   return n;
 659 }
 660 
 661 //-------------------------adjust_register_pressure----------------------------
 662 void PhaseCFG::adjust_register_pressure(Node* n, Block* block, intptr_t* recalc_pressure_nodes, bool finalize_mode) {
 663   PhaseLive* liveinfo = _regalloc->get_live();
 664   IndexSet* liveout = liveinfo->live(block);
 665   // first adjust the register pressure for the sources
 666   for (uint i = 1; i < n->req(); i++) {
 667     bool lrg_ends = false;
 668     Node *src_n = n->in(i);
 669     if (src_n == NULL) continue;
 670     if (!src_n->is_Mach()) continue;
 671     uint src = _regalloc->_lrg_map.find(src_n);
 672     if (src == 0) continue;
 673     LRG& lrg_src = _regalloc->lrgs(src);
 674     // detect if the live range ends or not
 675     if (liveout->member(src) == false) {
 676       lrg_ends = true;
 677       for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) {
 678         Node* m = src_n->fast_out(j); // Get user
 679         if (m == n) continue;
 680         if (!m->is_Mach()) continue;
 681         MachNode *mach = m->as_Mach();
 682         bool src_matches = false;
 683         int iop = mach->ideal_Opcode();
 684 
 685         switch (iop) {
 686         case Op_StoreB:
 687         case Op_StoreC:
 688         case Op_StoreCM:
 689         case Op_StoreD:
 690         case Op_StoreF:
 691         case Op_StoreI:
 692         case Op_StoreL:
 693         case Op_StoreP:
 694         case Op_StoreN:
 695         case Op_StoreVector:
 696         case Op_StoreNKlass:
 697           for (uint k = 1; k < m->req(); k++) {
 698             Node *in = m->in(k);
 699             if (in == src_n) {
 700               src_matches = true;
 701               break;
 702             }
 703           }
 704           break;
 705 
 706         default:
 707           src_matches = true;
 708           break;
 709         }
 710 
 711         // If we have a store as our use, ignore the non source operands
 712         if (src_matches == false) continue;
 713 
 714         // Mark every unscheduled use which is not n with a recalculation
 715         if ((get_block_for_node(m) == block) && (!m->is_scheduled())) {
 716           if (finalize_mode && !m->is_Phi()) {
 717             recalc_pressure_nodes[m->_idx] = 0x7fff7fff;
 718           }
 719           lrg_ends = false;
 720         }
 721       }
 722     }
 723     // if none, this live range ends and we can adjust register pressure
 724     if (lrg_ends) {
 725       if (finalize_mode) {
 726         _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
 727       } else {
 728         _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
 729       }
 730     }
 731   }
 732 
 733   // now add the register pressure from the dest and evaluate which heuristic we should use:
 734   // 1.) The default, latency scheduling
 735   // 2.) Register pressure scheduling based on the high pressure limit threshold for int or float register stacks
 736   uint dst = _regalloc->_lrg_map.find(n);
 737   if (dst != 0) {
 738     LRG& lrg_dst = _regalloc->lrgs(dst);
 739     if (finalize_mode) {
 740       _regalloc->raise_pressure(block, lrg_dst, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
 741       // check to see if we fall over the register pressure cliff here
 742       if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
 743         _scheduling_for_pressure = true;
 744       } else if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
 745         _scheduling_for_pressure = true;
 746       } else {
 747         // restore latency scheduling mode
 748         _scheduling_for_pressure = false;
 749       }
 750     } else {
 751       _regalloc->raise_pressure(block, lrg_dst, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
 752     }
 753   }
 754 }
 755 
 756 //------------------------------set_next_call----------------------------------
 757 void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) {
 758   if( next_call.test_set(n->_idx) ) return;
 759   for( uint i=0; i<n->len(); i++ ) {
 760     Node *m = n->in(i);
 761     if( !m ) continue;  // must see all nodes in block that precede call
 762     if (get_block_for_node(m) == block) {
 763       set_next_call(block, m, next_call);
 764     }
 765   }
 766 }
 767 
 768 //------------------------------needed_for_next_call---------------------------
 769 // Set the flag 'next_call' for each Node that is needed for the next call to
 770 // be scheduled.  This flag lets me bias scheduling so Nodes needed for the
 771 // next subroutine call get priority - basically it moves things NOT needed
 772 // for the next call till after the call.  This prevents me from trying to
 773 // carry lots of stuff live across a call.
 774 void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) {
 775   // Find the next control-defining Node in this block
 776   Node* call = NULL;
 777   for (DUIterator_Fast imax, i = this_call->fast_outs(imax); i < imax; i++) {
 778     Node* m = this_call->fast_out(i);
 779     if (get_block_for_node(m) == block && // Local-block user
 780         m != this_call &&       // Not self-start node
 781         m->is_MachCall()) {
 782       call = m;
 783       break;
 784     }
 785   }
 786   if (call == NULL)  return;    // No next call (e.g., block end is near)
 787   // Set next-call for all inputs to this call
 788   set_next_call(block, call, next_call);
 789 }
 790 
 791 //------------------------------add_call_kills-------------------------------------
 792 // helper function that adds caller save registers to MachProjNode
 793 static void add_call_kills(MachProjNode *proj, RegMask& regs, const char* save_policy, bool exclude_soe, bool exclude_fp) {
 794   // Fill in the kill mask for the call
 795   for( OptoReg::Name r = OptoReg::Name(0); r < _last_Mach_Reg; r=OptoReg::add(r,1) ) {
 796     if (exclude_fp && (register_save_type[r] == Op_RegF || register_save_type[r] == Op_RegD)) {
 797       continue;
 798     }
 799     if( !regs.Member(r) ) {     // Not already defined by the call
 800       // Save-on-call register?
 801       if ((save_policy[r] == 'C') ||
 802           (save_policy[r] == 'A') ||
 803           ((save_policy[r] == 'E') && exclude_soe)) {
 804         proj->_rout.Insert(r);
 805       }
 806     }
 807   }
 808 }
 809 
 810 
 811 //------------------------------sched_call-------------------------------------
 812 uint PhaseCFG::sched_call(Block* block, uint node_cnt, Node_List& worklist, GrowableArray<int>& ready_cnt, MachCallNode* mcall, VectorSet& next_call) {
 813   RegMask regs;
 814 
 815   // Schedule all the users of the call right now.  All the users are
 816   // projection Nodes, so they must be scheduled next to the call.
 817   // Collect all the defined registers.
 818   for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) {
 819     Node* n = mcall->fast_out(i);
 820     assert( n->is_MachProj(), "" );
 821     int n_cnt = ready_cnt.at(n->_idx)-1;
 822     ready_cnt.at_put(n->_idx, n_cnt);
 823     assert( n_cnt == 0, "" );
 824     // Schedule next to call
 825     block->map_node(n, node_cnt++);
 826     // Collect defined registers
 827     regs.OR(n->out_RegMask());
 828     // Check for scheduling the next control-definer
 829     if( n->bottom_type() == Type::CONTROL )
 830       // Warm up next pile of heuristic bits
 831       needed_for_next_call(block, n, next_call);
 832 
 833     // Children of projections are now all ready
 834     for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
 835       Node* m = n->fast_out(j); // Get user
 836       if(get_block_for_node(m) != block) {
 837         continue;
 838       }
 839       if( m->is_Phi() ) continue;
 840       int m_cnt = ready_cnt.at(m->_idx) - 1;
 841       ready_cnt.at_put(m->_idx, m_cnt);
 842       if( m_cnt == 0 )
 843         worklist.push(m);
 844     }
 845 
 846   }
 847 
 848   // Act as if the call defines the Frame Pointer.
 849   // Certainly the FP is alive and well after the call.
 850   regs.Insert(_matcher.c_frame_pointer());
 851 
 852   // Set all registers killed and not already defined by the call.
 853   uint r_cnt = mcall->tf()->range()->cnt();
 854   int op = mcall->ideal_Opcode();
 855   MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj );
 856   map_node_to_block(proj, block);
 857   block->insert_node(proj, node_cnt++);
 858 
 859   // Select the right register save policy.
 860   const char *save_policy = NULL;
 861   switch (op) {
 862     case Op_CallRuntime:
 863     case Op_CallLeaf:
 864     case Op_CallLeafNoFP:
 865       // Calling C code so use C calling convention
 866       save_policy = _matcher._c_reg_save_policy;
 867       break;
 868 
 869     case Op_CallStaticJava:
 870     case Op_CallDynamicJava:
 871       // Calling Java code so use Java calling convention
 872       save_policy = _matcher._register_save_policy;
 873       break;
 874 
 875     default:
 876       ShouldNotReachHere();
 877   }
 878 
 879   // When using CallRuntime mark SOE registers as killed by the call
 880   // so values that could show up in the RegisterMap aren't live in a
 881   // callee saved register since the register wouldn't know where to
 882   // find them.  CallLeaf and CallLeafNoFP are ok because they can't
 883   // have debug info on them.  Strictly speaking this only needs to be
 884   // done for oops since idealreg2debugmask takes care of debug info
 885   // references but there no way to handle oops differently than other
 886   // pointers as far as the kill mask goes.
 887   bool exclude_soe = op == Op_CallRuntime;
 888 
 889   // If the call is a MethodHandle invoke, we need to exclude the
 890   // register which is used to save the SP value over MH invokes from
 891   // the mask.  Otherwise this register could be used for
 892   // deoptimization information.
 893   if (op == Op_CallStaticJava) {
 894     MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall;
 895     if (mcallstaticjava->_method_handle_invoke)
 896       proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask());
 897   }
 898 
 899 #if INCLUDE_SHENANDOAHGC
 900   if (UseShenandoahGC &&
 901       ShenandoahBarrierSetAssembler::is_shenandoah_wb_C_call(mcall->entry_point())) {
 902     assert(op == Op_CallLeafNoFP, "shenandoah_wb_C should be called with Op_CallLeafNoFP");
 903     add_call_kills(proj, regs, save_policy, exclude_soe, true);
 904   } else
 905 #endif
 906   {
 907     add_call_kills(proj, regs, save_policy, exclude_soe, false);
 908   }
 909   return node_cnt;
 910 }
 911 
 912 void PhaseCFG::push_ready_nodes(Node* n, Node* m, Block* block, GrowableArray<int>& ready_cnt, Node_List& worklist, uint max_idx, int c) {
 913   if (get_block_for_node(m) != block) {
 914     return;
 915   }
 916   if (m->is_Phi()) {
 917     return;
 918   }
 919   if (m->_idx >= max_idx) { // new node, skip it
 920     assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types");
 921     return;
 922   }
 923   int m_cnt = ready_cnt.at(m->_idx) - c;
 924   ready_cnt.at_put(m->_idx, m_cnt);
 925   if (m_cnt == 0) {
 926     worklist.push(m);
 927   }
 928 }
 929 
 930 //------------------------------schedule_local---------------------------------
 931 // Topological sort within a block.  Someday become a real scheduler.
 932 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) {
 933   // Already "sorted" are the block start Node (as the first entry), and
 934   // the block-ending Node and any trailing control projections.  We leave
 935   // these alone.  PhiNodes and ParmNodes are made to follow the block start
 936   // Node.  Everything else gets topo-sorted.
 937 
 938 #ifndef PRODUCT
 939     if (trace_opto_pipelining()) {
 940       tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order);
 941       for (uint i = 0;i < block->number_of_nodes(); i++) {
 942         tty->print("# ");
 943         block->get_node(i)->fast_dump();
 944       }
 945       tty->print_cr("#");
 946     }
 947 #endif
 948 
 949   // RootNode is already sorted
 950   if (block->number_of_nodes() == 1) {
 951     return true;
 952   }
 953 
 954   bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false;
 955 
 956   // We track the uses of local definitions as input dependences so that
 957   // we know when a given instruction is avialable to be scheduled.
 958   uint i;
 959   if (OptoRegScheduling && block_size_threshold_ok) {
 960     for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc
 961       Node *n = block->get_node(i);
 962       n->remove_flag(Node::Flag_is_scheduled);
 963       if (!n->is_Phi()) {
 964         recalc_pressure_nodes[n->_idx] = 0x7fff7fff;
 965       }
 966     }
 967   } else {
 968 #ifdef ASSERT
 969     for (i = 1; i < block->number_of_nodes(); i++) {
 970       Node *n = block->get_node(i);
 971       assert(!n->is_scheduled(), "shouldn't be scheduled yet");
 972     }
 973 #endif
 974   }
 975 
 976   // Move PhiNodes and ParmNodes from 1 to cnt up to the start
 977   uint node_cnt = block->end_idx();
 978   uint phi_cnt = 1;
 979   for( i = 1; i<node_cnt; i++ ) { // Scan for Phi
 980     Node *n = block->get_node(i);
 981     if( n->is_Phi() ||          // Found a PhiNode or ParmNode
 982         (n->is_Proj()  && n->in(0) == block->head()) ) {
 983       // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt
 984       block->map_node(block->get_node(phi_cnt), i);
 985       block->map_node(n, phi_cnt++);  // swap Phi/Parm up front
 986       // mark n as scheduled
 987       n->add_flag(Node::Flag_is_scheduled);
 988     } else {                    // All others
 989       // Count block-local inputs to 'n'
 990       uint cnt = n->len();      // Input count
 991       uint local = 0;
 992       for( uint j=0; j<cnt; j++ ) {
 993         Node *m = n->in(j);
 994         if( m && get_block_for_node(m) == block && !m->is_top() )
 995           local++;              // One more block-local input
 996       }
 997       ready_cnt.at_put(n->_idx, local); // Count em up
 998 
 999 #ifdef ASSERT
1000       if( UseConcMarkSweepGC || UseG1GC ) {
1001         if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_StoreCM ) {
1002           // Check the precedence edges
1003           for (uint prec = n->req(); prec < n->len(); prec++) {
1004             Node* oop_store = n->in(prec);
1005             if (oop_store != NULL) {
1006               assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark");
1007             }
1008           }
1009         }
1010       }
1011 #endif
1012 
1013       // A few node types require changing a required edge to a precedence edge
1014       // before allocation.
1015       if( n->is_Mach() && n->req() > TypeFunc::Parms &&
1016           (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire ||
1017            n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) {
1018         // MemBarAcquire could be created without Precedent edge.
1019         // del_req() replaces the specified edge with the last input edge
1020         // and then removes the last edge. If the specified edge > number of
1021         // edges the last edge will be moved outside of the input edges array
1022         // and the edge will be lost. This is why this code should be
1023         // executed only when Precedent (== TypeFunc::Parms) edge is present.
1024         Node *x = n->in(TypeFunc::Parms);
1025         if (x != NULL && get_block_for_node(x) == block && n->find_prec_edge(x) != -1) {
1026           // Old edge to node within same block will get removed, but no precedence
1027           // edge will get added because it already exists. Update ready count.
1028           int cnt = ready_cnt.at(n->_idx);
1029           assert(cnt > 1, "MemBar node %d must not get ready here", n->_idx);
1030           ready_cnt.at_put(n->_idx, cnt-1);
1031         }
1032         n->del_req(TypeFunc::Parms);
1033         n->add_prec(x);
1034       }
1035     }
1036   }
1037   for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count
1038     ready_cnt.at_put(block->get_node(i2)->_idx, 0);
1039 
1040   // All the prescheduled guys do not hold back internal nodes
1041   uint i3;
1042   for (i3 = 0; i3 < phi_cnt; i3++) {  // For all pre-scheduled
1043     Node *n = block->get_node(i3);       // Get pre-scheduled
1044     for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
1045       Node* m = n->fast_out(j);
1046       if (get_block_for_node(m) == block) { // Local-block user
1047         int m_cnt = ready_cnt.at(m->_idx)-1;
1048         // mark m as scheduled
1049         if (m_cnt < 0) {
1050           m->add_flag(Node::Flag_is_scheduled);
1051         }
1052         ready_cnt.at_put(m->_idx, m_cnt);   // Fix ready count
1053       }
1054     }
1055   }
1056 
1057   Node_List delay;
1058   // Make a worklist
1059   Node_List worklist;
1060   for(uint i4=i3; i4<node_cnt; i4++ ) {    // Put ready guys on worklist
1061     Node *m = block->get_node(i4);
1062     if( !ready_cnt.at(m->_idx) ) {   // Zero ready count?
1063       if (m->is_iteratively_computed()) {
1064         // Push induction variable increments last to allow other uses
1065         // of the phi to be scheduled first. The select() method breaks
1066         // ties in scheduling by worklist order.
1067         delay.push(m);
1068       } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) {
1069         // Force the CreateEx to the top of the list so it's processed
1070         // first and ends up at the start of the block.
1071         worklist.insert(0, m);
1072       } else {
1073         worklist.push(m);         // Then on to worklist!
1074       }
1075     }
1076   }
1077   while (delay.size()) {
1078     Node* d = delay.pop();
1079     worklist.push(d);
1080   }
1081 
1082   if (OptoRegScheduling && block_size_threshold_ok) {
1083     // To stage register pressure calculations we need to examine the live set variables
1084     // breaking them up by register class to compartmentalize the calculations.
1085     uint float_pressure = Matcher::float_pressure(FLOATPRESSURE);
1086     _regalloc->_sched_int_pressure.init(INTPRESSURE);
1087     _regalloc->_sched_float_pressure.init(float_pressure);
1088     _regalloc->_scratch_int_pressure.init(INTPRESSURE);
1089     _regalloc->_scratch_float_pressure.init(float_pressure);
1090 
1091     _regalloc->compute_entry_block_pressure(block);
1092   }
1093 
1094   // Warm up the 'next_call' heuristic bits
1095   needed_for_next_call(block, block->head(), next_call);
1096 
1097 #ifndef PRODUCT
1098     if (trace_opto_pipelining()) {
1099       for (uint j=0; j< block->number_of_nodes(); j++) {
1100         Node     *n = block->get_node(j);
1101         int     idx = n->_idx;
1102         tty->print("#   ready cnt:%3d  ", ready_cnt.at(idx));
1103         tty->print("latency:%3d  ", get_latency_for_node(n));
1104         tty->print("%4d: %s\n", idx, n->Name());
1105       }
1106     }
1107 #endif
1108 
1109   uint max_idx = (uint)ready_cnt.length();
1110   // Pull from worklist and schedule
1111   while( worklist.size() ) {    // Worklist is not ready
1112 
1113 #ifndef PRODUCT
1114     if (trace_opto_pipelining()) {
1115       tty->print("#   ready list:");
1116       for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1117         Node *n = worklist[i];      // Get Node on worklist
1118         tty->print(" %d", n->_idx);
1119       }
1120       tty->cr();
1121     }
1122 #endif
1123 
1124     // Select and pop a ready guy from worklist
1125     Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt, recalc_pressure_nodes);
1126     block->map_node(n, phi_cnt++);    // Schedule him next
1127 
1128     n->add_flag(Node::Flag_is_scheduled);
1129 
1130     if (OptoRegScheduling && block_size_threshold_ok) {
1131       // Now adjust the resister pressure with the node we selected
1132       if (!n->is_Phi()) {
1133         adjust_register_pressure(n, block, recalc_pressure_nodes, true);
1134       }
1135     }
1136 
1137 #ifndef PRODUCT
1138     if (trace_opto_pipelining()) {
1139       tty->print("#    select %d: %s", n->_idx, n->Name());
1140       tty->print(", latency:%d", get_latency_for_node(n));
1141       n->dump();
1142       if (Verbose) {
1143         tty->print("#   ready list:");
1144         for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1145           Node *n = worklist[i];      // Get Node on worklist
1146           tty->print(" %d", n->_idx);
1147         }
1148         tty->cr();
1149       }
1150     }
1151 
1152 #endif
1153     if( n->is_MachCall() ) {
1154       MachCallNode *mcall = n->as_MachCall();
1155       phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call);
1156       continue;
1157     }
1158 
1159     if (n->is_Mach() && n->as_Mach()->has_call()) {
1160       RegMask regs;
1161       regs.Insert(_matcher.c_frame_pointer());
1162       regs.OR(n->out_RegMask());
1163 
1164       MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj );
1165       map_node_to_block(proj, block);
1166       block->insert_node(proj, phi_cnt++);
1167 
1168       add_call_kills(proj, regs, _matcher._c_reg_save_policy, false, false);
1169     }
1170 
1171     // Children are now all ready
1172     for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) {
1173       Node* m = n->fast_out(i5); // Get user
1174       push_ready_nodes(n, m, block, ready_cnt, worklist, max_idx, 1);
1175     }
1176 
1177 #if INCLUDE_SHENANDOAHGC
1178     replace_uses_with_shenandoah_barrier(n, block, worklist, ready_cnt, max_idx, phi_cnt);
1179 #endif
1180   }
1181 
1182   if( phi_cnt != block->end_idx() ) {
1183     // did not schedule all.  Retry, Bailout, or Die
1184     if (C->subsume_loads() == true && !C->failing()) {
1185       // Retry with subsume_loads == false
1186       // If this is the first failure, the sentinel string will "stick"
1187       // to the Compile object, and the C2Compiler will see it and retry.
1188       C->record_failure(C2Compiler::retry_no_subsuming_loads());
1189     } else {
1190       assert(false, "graph should be schedulable");
1191     }
1192     // assert( phi_cnt == end_idx(), "did not schedule all" );
1193     return false;
1194   }
1195 
1196   if (OptoRegScheduling && block_size_threshold_ok) {
1197     _regalloc->compute_exit_block_pressure(block);
1198     block->_reg_pressure = _regalloc->_sched_int_pressure.final_pressure();
1199     block->_freg_pressure = _regalloc->_sched_float_pressure.final_pressure();
1200   }
1201 
1202 #ifndef PRODUCT
1203   if (trace_opto_pipelining()) {
1204     tty->print_cr("#");
1205     tty->print_cr("# after schedule_local");
1206     for (uint i = 0;i < block->number_of_nodes();i++) {
1207       tty->print("# ");
1208       block->get_node(i)->fast_dump();
1209     }
1210     tty->print_cr("# ");
1211 
1212     if (OptoRegScheduling && block_size_threshold_ok) {
1213       tty->print_cr("# pressure info : %d", block->_pre_order);
1214       _regalloc->print_pressure_info(_regalloc->_sched_int_pressure, "int register info");
1215       _regalloc->print_pressure_info(_regalloc->_sched_float_pressure, "float register info");
1216     }
1217     tty->cr();
1218   }
1219 #endif
1220 
1221   return true;
1222 }
1223 
1224 //--------------------------catch_cleanup_fix_all_inputs-----------------------
1225 static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) {
1226   for (uint l = 0; l < use->len(); l++) {
1227     if (use->in(l) == old_def) {
1228       if (l < use->req()) {
1229         use->set_req(l, new_def);
1230       } else {
1231         use->rm_prec(l);
1232         use->add_prec(new_def);
1233         l--;
1234       }
1235     }
1236   }
1237 }
1238 
1239 //------------------------------catch_cleanup_find_cloned_def------------------
1240 Node* PhaseCFG::catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1241   assert( use_blk != def_blk, "Inter-block cleanup only");
1242 
1243   // The use is some block below the Catch.  Find and return the clone of the def
1244   // that dominates the use. If there is no clone in a dominating block, then
1245   // create a phi for the def in a dominating block.
1246 
1247   // Find which successor block dominates this use.  The successor
1248   // blocks must all be single-entry (from the Catch only; I will have
1249   // split blocks to make this so), hence they all dominate.
1250   while( use_blk->_dom_depth > def_blk->_dom_depth+1 )
1251     use_blk = use_blk->_idom;
1252 
1253   // Find the successor
1254   Node *fixup = NULL;
1255 
1256   uint j;
1257   for( j = 0; j < def_blk->_num_succs; j++ )
1258     if( use_blk == def_blk->_succs[j] )
1259       break;
1260 
1261   if( j == def_blk->_num_succs ) {
1262     // Block at same level in dom-tree is not a successor.  It needs a
1263     // PhiNode, the PhiNode uses from the def and IT's uses need fixup.
1264     Node_Array inputs = new Node_List(Thread::current()->resource_area());
1265     for(uint k = 1; k < use_blk->num_preds(); k++) {
1266       Block* block = get_block_for_node(use_blk->pred(k));
1267       inputs.map(k, catch_cleanup_find_cloned_def(block, def, def_blk, n_clone_idx));
1268     }
1269 
1270     // Check to see if the use_blk already has an identical phi inserted.
1271     // If it exists, it will be at the first position since all uses of a
1272     // def are processed together.
1273     Node *phi = use_blk->get_node(1);
1274     if( phi->is_Phi() ) {
1275       fixup = phi;
1276       for (uint k = 1; k < use_blk->num_preds(); k++) {
1277         if (phi->in(k) != inputs[k]) {
1278           // Not a match
1279           fixup = NULL;
1280           break;
1281         }
1282       }
1283     }
1284 
1285     // If an existing PhiNode was not found, make a new one.
1286     if (fixup == NULL) {
1287       Node *new_phi = PhiNode::make(use_blk->head(), def);
1288       use_blk->insert_node(new_phi, 1);
1289       map_node_to_block(new_phi, use_blk);
1290       for (uint k = 1; k < use_blk->num_preds(); k++) {
1291         new_phi->set_req(k, inputs[k]);
1292       }
1293       fixup = new_phi;
1294     }
1295 
1296   } else {
1297     // Found the use just below the Catch.  Make it use the clone.
1298     fixup = use_blk->get_node(n_clone_idx);
1299   }
1300 
1301   return fixup;
1302 }
1303 
1304 //--------------------------catch_cleanup_intra_block--------------------------
1305 // Fix all input edges in use that reference "def".  The use is in the same
1306 // block as the def and both have been cloned in each successor block.
1307 static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg, int n_clone_idx) {
1308 
1309   // Both the use and def have been cloned. For each successor block,
1310   // get the clone of the use, and make its input the clone of the def
1311   // found in that block.
1312 
1313   uint use_idx = blk->find_node(use);
1314   uint offset_idx = use_idx - beg;
1315   for( uint k = 0; k < blk->_num_succs; k++ ) {
1316     // Get clone in each successor block
1317     Block *sb = blk->_succs[k];
1318     Node *clone = sb->get_node(offset_idx+1);
1319     assert( clone->Opcode() == use->Opcode(), "" );
1320 
1321     // Make use-clone reference the def-clone
1322     catch_cleanup_fix_all_inputs(clone, def, sb->get_node(n_clone_idx));
1323   }
1324 }
1325 
1326 //------------------------------catch_cleanup_inter_block---------------------
1327 // Fix all input edges in use that reference "def".  The use is in a different
1328 // block than the def.
1329 void PhaseCFG::catch_cleanup_inter_block(Node *use, Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1330   if( !use_blk ) return;        // Can happen if the use is a precedence edge
1331 
1332   Node *new_def = catch_cleanup_find_cloned_def(use_blk, def, def_blk, n_clone_idx);
1333   catch_cleanup_fix_all_inputs(use, def, new_def);
1334 }
1335 
1336 //------------------------------call_catch_cleanup-----------------------------
1337 // If we inserted any instructions between a Call and his CatchNode,
1338 // clone the instructions on all paths below the Catch.
1339 void PhaseCFG::call_catch_cleanup(Block* block) {
1340 
1341   // End of region to clone
1342   uint end = block->end_idx();
1343   if( !block->get_node(end)->is_Catch() ) return;
1344   // Start of region to clone
1345   uint beg = end;
1346   while(!block->get_node(beg-1)->is_MachProj() ||
1347         !block->get_node(beg-1)->in(0)->is_MachCall() ) {
1348     beg--;
1349     assert(beg > 0,"Catch cleanup walking beyond block boundary");
1350   }
1351   // Range of inserted instructions is [beg, end)
1352   if( beg == end ) return;
1353 
1354   // Clone along all Catch output paths.  Clone area between the 'beg' and
1355   // 'end' indices.
1356   for( uint i = 0; i < block->_num_succs; i++ ) {
1357     Block *sb = block->_succs[i];
1358     // Clone the entire area; ignoring the edge fixup for now.
1359     for( uint j = end; j > beg; j-- ) {
1360       Node *clone = block->get_node(j-1)->clone();
1361       sb->insert_node(clone, 1);
1362       map_node_to_block(clone, sb);
1363       if (clone->needs_anti_dependence_check()) {
1364         insert_anti_dependences(sb, clone);
1365       }
1366     }
1367   }
1368 
1369 
1370   // Fixup edges.  Check the def-use info per cloned Node
1371   for(uint i2 = beg; i2 < end; i2++ ) {
1372     uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block
1373     Node *n = block->get_node(i2);        // Node that got cloned
1374     // Need DU safe iterator because of edge manipulation in calls.
1375     Unique_Node_List *out = new Unique_Node_List(Thread::current()->resource_area());
1376     for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) {
1377       out->push(n->fast_out(j1));
1378     }
1379     uint max = out->size();
1380     for (uint j = 0; j < max; j++) {// For all users
1381       Node *use = out->pop();
1382       Block *buse = get_block_for_node(use);
1383       if( use->is_Phi() ) {
1384         for( uint k = 1; k < use->req(); k++ )
1385           if( use->in(k) == n ) {
1386             Block* b = get_block_for_node(buse->pred(k));
1387             Node *fixup = catch_cleanup_find_cloned_def(b, n, block, n_clone_idx);
1388             use->set_req(k, fixup);
1389           }
1390       } else {
1391         if (block == buse) {
1392           catch_cleanup_intra_block(use, n, block, beg, n_clone_idx);
1393         } else {
1394           catch_cleanup_inter_block(use, buse, n, block, n_clone_idx);
1395         }
1396       }
1397     } // End for all users
1398 
1399   } // End of for all Nodes in cloned area
1400 
1401   // Remove the now-dead cloned ops
1402   for(uint i3 = beg; i3 < end; i3++ ) {
1403     block->get_node(beg)->disconnect_inputs(NULL, C);
1404     block->remove_node(beg);
1405   }
1406 
1407   // If the successor blocks have a CreateEx node, move it back to the top
1408   for(uint i4 = 0; i4 < block->_num_succs; i4++ ) {
1409     Block *sb = block->_succs[i4];
1410     uint new_cnt = end - beg;
1411     // Remove any newly created, but dead, nodes.
1412     for( uint j = new_cnt; j > 0; j-- ) {
1413       Node *n = sb->get_node(j);
1414       if (n->outcnt() == 0 &&
1415           (!n->is_Proj() || n->as_Proj()->in(0)->outcnt() == 1) ){
1416         n->disconnect_inputs(NULL, C);
1417         sb->remove_node(j);
1418         new_cnt--;
1419       }
1420     }
1421     // If any newly created nodes remain, move the CreateEx node to the top
1422     if (new_cnt > 0) {
1423       Node *cex = sb->get_node(1+new_cnt);
1424       if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) {
1425         sb->remove_node(1+new_cnt);
1426         sb->insert_node(cex, 1);
1427       }
1428     }
1429   }
1430 }