src/share/vm/opto/library_call.cpp

rev 11420 : Correct order between load, LRB and membar nodes

@@ -2807,10 +2807,15 @@
     }
   }
 
   if (is_volatile) {
     if (!is_store) {
+#if INCLUDE_ALL_GCS
+      if (UseShenandoahGC) {
+        load = ShenandoahBarrierSetC2::bsc2()->step_over_gc_barrier(load);
+      }
+#endif
       Node* mb = insert_mem_bar(Op_MemBarAcquire, load);
       mb->as_MemBar()->set_trailing_load();
     } else {
       if (!support_IRIW_for_not_multiple_copy_atomic_cpu) {
         Node* mb = insert_mem_bar(Op_MemBarVolatile, store);