# HG changeset patch # User rkennke # Date 1500392769 -7200 # Tue Jul 18 17:46:09 2017 +0200 # Node ID bd9d00b7de3ee21861d3552bdb4203ce4f8cd6d1 # Parent 564b6d8434ff3aae6f1751ff1a217784bb7352e9 [mq]: refactor-acmp.patch diff --git a/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp b/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp --- a/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp +++ b/src/cpu/x86/vm/c1_LIRAssembler_x86.cpp @@ -2612,8 +2612,7 @@ if (opr2->is_single_cpu()) { // cpu register - cpu register if (opr1->type() == T_OBJECT || opr1->type() == T_ARRAY) { - __ cmpptr(reg1, opr2->as_register()); - oopDesc::bs()->asm_acmp_barrier(masm(), reg1, opr2->as_register()); + __ cmpoopptr(reg1, opr2->as_register()); } else { assert(opr2->type() != T_OBJECT && opr2->type() != T_ARRAY, "cmp int, oop?"); __ cmpl(reg1, opr2->as_register()); @@ -2621,13 +2620,7 @@ } else if (opr2->is_stack()) { // cpu register - stack if (opr1->type() == T_OBJECT || opr1->type() == T_ARRAY) { - if (UseShenandoahGC && ShenandoahAcmpBarrier) { - __ movptr(rscratch1, frame_map()->address_for_slot(opr2->single_stack_ix())); - __ cmpptr(reg1, rscratch1); - oopDesc::bs()->asm_acmp_barrier(masm(), reg1, rscratch1); - } else { - __ cmpptr(reg1, frame_map()->address_for_slot(opr2->single_stack_ix())); - } + __ cmpoopptr(reg1, frame_map()->address_for_slot(opr2->single_stack_ix())); } else { __ cmpl(reg1, frame_map()->address_for_slot(opr2->single_stack_ix())); } @@ -2644,8 +2637,7 @@ } else { #ifdef _LP64 __ movoop(rscratch1, o); - __ cmpptr(reg1, rscratch1); - oopDesc::bs()->asm_acmp_barrier(masm(), reg1, rscratch1); + __ cmpoopptr(reg1, rscratch1); #else __ cmpoop(reg1, c->as_jobject()); #endif // _LP64 @@ -2758,13 +2750,7 @@ #ifdef _LP64 // %%% Make this explode if addr isn't reachable until we figure out a // better strategy by giving noreg as the temp for as_Address - if (UseShenandoahGC && ShenandoahAcmpBarrier) { - __ movptr(rscratch2, as_Address(addr, noreg)); - __ cmpptr(rscratch1, rscratch2); - oopDesc::bs()->asm_acmp_barrier(masm(), rscratch1, rscratch2); - } else { - __ cmpptr(rscratch1, as_Address(addr, noreg)); - } + __ cmpoopptr(rscratch1, as_Address(addr, noreg)); #else __ cmpoop(as_Address(addr), c->as_jobject()); #endif // _LP64 diff --git a/src/cpu/x86/vm/macroAssembler_x86.cpp b/src/cpu/x86/vm/macroAssembler_x86.cpp --- a/src/cpu/x86/vm/macroAssembler_x86.cpp +++ b/src/cpu/x86/vm/macroAssembler_x86.cpp @@ -26,12 +26,14 @@ #include "asm/assembler.hpp" #include "asm/assembler.inline.hpp" #include "compiler/disassembler.hpp" +#include "gc/shared/barrierSet.hpp" #include "gc/shared/cardTableModRefBS.hpp" #include "gc/shared/collectedHeap.inline.hpp" #include "interpreter/interpreter.hpp" #include "memory/resourceArea.hpp" #include "memory/universe.hpp" #include "oops/klass.inline.hpp" +#include "oops/oop.hpp" #include "prims/jvm.h" #include "prims/methodHandles.hpp" #include "runtime/biasedLocking.hpp" @@ -8779,8 +8781,7 @@ if (is_array_equ) { // Check the input args - cmpptr(ary1, ary2); - oopDesc::bs()->asm_acmp_barrier(this, ary1, ary2); + cmpoopptr(ary1, ary2); jcc(Assembler::equal, TRUE_LABEL); // Need additional checks for arrays_equals. @@ -11798,3 +11799,21 @@ #endif } } + +void MacroAssembler::cmpoopptr(Register src1, Register src2) { + cmpptr(src1, src2); + oopDesc::bs()->asm_acmp_barrier(this, src1, src2); +} + +void MacroAssembler::cmpoopptr(Register src1, Address src2) { + cmpptr(src1, src2); + if (UseShenandoahGC && ShenandoahAcmpBarrier) { + Label done; + jccb(Assembler::equal, done); + movptr(rscratch2, src2); + oopDesc::bs()->interpreter_read_barrier(this, src1); + oopDesc::bs()->interpreter_read_barrier(this, rscratch2); + cmpptr(src1, rscratch2); + bind(done); + } +} diff --git a/src/cpu/x86/vm/macroAssembler_x86.hpp b/src/cpu/x86/vm/macroAssembler_x86.hpp --- a/src/cpu/x86/vm/macroAssembler_x86.hpp +++ b/src/cpu/x86/vm/macroAssembler_x86.hpp @@ -786,6 +786,10 @@ // cmp64 to avoild hiding cmpq void cmp64(Register src1, AddressLiteral src); + // Special cmp for heap objects, possibly inserting required barriers. + void cmpoopptr(Register src1, Register src2); + void cmpoopptr(Register src1, Address src2); + void cmpxchgptr(Register reg, Address adr); // Special Shenandoah CAS implementation that handles false negatives diff --git a/src/cpu/x86/vm/methodHandles_x86.cpp b/src/cpu/x86/vm/methodHandles_x86.cpp --- a/src/cpu/x86/vm/methodHandles_x86.cpp +++ b/src/cpu/x86/vm/methodHandles_x86.cpp @@ -187,8 +187,7 @@ // assert(sizeof(u2) == sizeof(Method::_size_of_parameters), ""); __ movptr(temp2, __ argument_address(temp2, -1)); Label L; - __ cmpptr(recv, temp2); - oopDesc::bs()->asm_acmp_barrier(_masm, recv, temp2); + __ cmpoopptr(recv, temp2); __ jcc(Assembler::equal, L); __ movptr(rax, temp2); __ STOP("receiver not on stack"); diff --git a/src/cpu/x86/vm/templateTable_x86.cpp b/src/cpu/x86/vm/templateTable_x86.cpp --- a/src/cpu/x86/vm/templateTable_x86.cpp +++ b/src/cpu/x86/vm/templateTable_x86.cpp @@ -2348,8 +2348,7 @@ // assume branch is more often taken than not (loops use backward branches) Label not_taken; __ pop_ptr(rdx); - __ cmpptr(rdx, rax); - oopDesc::bs()->asm_acmp_barrier(_masm, rdx, rax); + __ cmpoopptr(rdx, rax); __ jcc(j_not(cc), not_taken); branch(false, false); __ bind(not_taken); diff --git a/src/share/vm/gc/shenandoah/shenandoahBarrierSet.hpp b/src/share/vm/gc/shenandoah/shenandoahBarrierSet.hpp --- a/src/share/vm/gc/shenandoah/shenandoahBarrierSet.hpp +++ b/src/share/vm/gc/shenandoah/shenandoahBarrierSet.hpp @@ -122,6 +122,7 @@ virtual void interpreter_read_barrier_not_null(MacroAssembler* masm, Register dst); void interpreter_write_barrier(MacroAssembler* masm, Register dst); void asm_acmp_barrier(MacroAssembler* masm, Register op1, Register op2); + void asm_acmp_barrier(MacroAssembler* masm, Register op1, Address op2); #endif };