1 /* 2 * Copyright (c) 2003, 2016, Oracle and/or its affiliates. All rights reserved. 3 * Copyright (c) 2014, 2015, Red Hat Inc. All rights reserved. 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 5 * 6 * This code is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 only, as 8 * published by the Free Software Foundation. 9 * 10 * This code is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 13 * version 2 for more details (a copy is included in the LICENSE file that 14 * accompanied this code). 15 * 16 * You should have received a copy of the GNU General Public License version 17 * 2 along with this work; if not, write to the Free Software Foundation, 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 21 * or visit www.oracle.com if you need additional information or have any 22 * questions. 23 * 24 */ 25 26 #include "precompiled.hpp" 27 #include "asm/macroAssembler.hpp" 28 #include "asm/macroAssembler.inline.hpp" 29 #include "code/debugInfoRec.hpp" 30 #include "code/icBuffer.hpp" 31 #include "code/vtableStubs.hpp" 32 #include "interpreter/interpreter.hpp" 33 #include "interpreter/interp_masm.hpp" 34 #include "logging/log.hpp" 35 #include "memory/resourceArea.hpp" 36 #include "oops/compiledICHolder.hpp" 37 #include "runtime/sharedRuntime.hpp" 38 #include "runtime/vframeArray.hpp" 39 #include "vmreg_aarch64.inline.hpp" 40 #ifdef COMPILER1 41 #include "c1/c1_Runtime1.hpp" 42 #endif 43 #if defined(COMPILER2) || INCLUDE_JVMCI 44 #include "adfiles/ad_aarch64.hpp" 45 #include "opto/runtime.hpp" 46 #endif 47 #if INCLUDE_JVMCI 48 #include "jvmci/jvmciJavaClasses.hpp" 49 #endif 50 51 #ifdef BUILTIN_SIM 52 #include "../../../../../../simulator/simulator.hpp" 53 #endif 54 55 #define __ masm-> 56 57 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size; 58 59 class SimpleRuntimeFrame { 60 61 public: 62 63 // Most of the runtime stubs have this simple frame layout. 64 // This class exists to make the layout shared in one place. 65 // Offsets are for compiler stack slots, which are jints. 66 enum layout { 67 // The frame sender code expects that rbp will be in the "natural" place and 68 // will override any oopMap setting for it. We must therefore force the layout 69 // so that it agrees with the frame sender code. 70 // we don't expect any arg reg save area so aarch64 asserts that 71 // frame::arg_reg_save_area_bytes == 0 72 rbp_off = 0, 73 rbp_off2, 74 return_off, return_off2, 75 framesize 76 }; 77 }; 78 79 // FIXME -- this is used by C1 80 class RegisterSaver { 81 public: 82 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors = false); 83 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false); 84 85 // Offsets into the register save area 86 // Used by deoptimization when it is managing result register 87 // values on its own 88 89 static int r0_offset_in_bytes(void) { return (32 + r0->encoding()) * wordSize; } 90 static int reg_offset_in_bytes(Register r) { return r0_offset_in_bytes() + r->encoding() * wordSize; } 91 static int rmethod_offset_in_bytes(void) { return reg_offset_in_bytes(rmethod); } 92 static int rscratch1_offset_in_bytes(void) { return (32 + rscratch1->encoding()) * wordSize; } 93 static int v0_offset_in_bytes(void) { return 0; } 94 static int return_offset_in_bytes(void) { return (32 /* floats*/ + 31 /* gregs*/) * wordSize; } 95 96 // During deoptimization only the result registers need to be restored, 97 // all the other values have already been extracted. 98 static void restore_result_registers(MacroAssembler* masm); 99 100 // Capture info about frame layout 101 enum layout { 102 fpu_state_off = 0, 103 fpu_state_end = fpu_state_off+FPUStateSizeInWords-1, 104 // The frame sender code expects that rfp will be in 105 // the "natural" place and will override any oopMap 106 // setting for it. We must therefore force the layout 107 // so that it agrees with the frame sender code. 108 r0_off = fpu_state_off+FPUStateSizeInWords, 109 rfp_off = r0_off + 30 * 2, 110 return_off = rfp_off + 2, // slot for return address 111 reg_save_size = return_off + 2}; 112 113 }; 114 115 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors) { 116 #if defined(COMPILER2) || INCLUDE_JVMCI 117 if (save_vectors) { 118 // Save upper half of vector registers 119 int vect_words = 32 * 8 / wordSize; 120 additional_frame_words += vect_words; 121 } 122 #else 123 assert(!save_vectors, "vectors are generated only by C2 and JVMCI"); 124 #endif 125 126 int frame_size_in_bytes = round_to(additional_frame_words*wordSize + 127 reg_save_size*BytesPerInt, 16); 128 // OopMap frame size is in compiler stack slots (jint's) not bytes or words 129 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt; 130 // The caller will allocate additional_frame_words 131 int additional_frame_slots = additional_frame_words*wordSize / BytesPerInt; 132 // CodeBlob frame size is in words. 133 int frame_size_in_words = frame_size_in_bytes / wordSize; 134 *total_frame_words = frame_size_in_words; 135 136 // Save registers, fpu state, and flags. 137 138 __ enter(); 139 __ push_CPU_state(save_vectors); 140 141 // Set an oopmap for the call site. This oopmap will map all 142 // oop-registers and debug-info registers as callee-saved. This 143 // will allow deoptimization at this safepoint to find all possible 144 // debug-info recordings, as well as let GC find all oops. 145 146 OopMapSet *oop_maps = new OopMapSet(); 147 OopMap* oop_map = new OopMap(frame_size_in_slots, 0); 148 149 for (int i = 0; i < RegisterImpl::number_of_registers; i++) { 150 Register r = as_Register(i); 151 if (r < rheapbase && r != rscratch1 && r != rscratch2) { 152 int sp_offset = 2 * (i + 32); // SP offsets are in 4-byte words, 153 // register slots are 8 bytes 154 // wide, 32 floating-point 155 // registers 156 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset + additional_frame_slots), 157 r->as_VMReg()); 158 } 159 } 160 161 for (int i = 0; i < FloatRegisterImpl::number_of_registers; i++) { 162 FloatRegister r = as_FloatRegister(i); 163 int sp_offset = save_vectors ? (4 * i) : (2 * i); 164 oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset), 165 r->as_VMReg()); 166 } 167 168 return oop_map; 169 } 170 171 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) { 172 #ifndef COMPILER2 173 assert(!restore_vectors, "vectors are generated only by C2 and JVMCI"); 174 #endif 175 __ pop_CPU_state(restore_vectors); 176 __ leave(); 177 } 178 179 void RegisterSaver::restore_result_registers(MacroAssembler* masm) { 180 181 // Just restore result register. Only used by deoptimization. By 182 // now any callee save register that needs to be restored to a c2 183 // caller of the deoptee has been extracted into the vframeArray 184 // and will be stuffed into the c2i adapter we create for later 185 // restoration so only result registers need to be restored here. 186 187 // Restore fp result register 188 __ ldrd(v0, Address(sp, v0_offset_in_bytes())); 189 // Restore integer result register 190 __ ldr(r0, Address(sp, r0_offset_in_bytes())); 191 192 // Pop all of the register save are off the stack 193 __ add(sp, sp, round_to(return_offset_in_bytes(), 16)); 194 } 195 196 // Is vector's size (in bytes) bigger than a size saved by default? 197 // 8 bytes vector registers are saved by default on AArch64. 198 bool SharedRuntime::is_wide_vector(int size) { 199 return size > 8; 200 } 201 202 size_t SharedRuntime::trampoline_size() { 203 return 16; 204 } 205 206 void SharedRuntime::generate_trampoline(MacroAssembler *masm, address destination) { 207 __ mov(rscratch1, destination); 208 __ br(rscratch1); 209 } 210 211 // The java_calling_convention describes stack locations as ideal slots on 212 // a frame with no abi restrictions. Since we must observe abi restrictions 213 // (like the placement of the register window) the slots must be biased by 214 // the following value. 215 static int reg2offset_in(VMReg r) { 216 // Account for saved rfp and lr 217 // This should really be in_preserve_stack_slots 218 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size; 219 } 220 221 static int reg2offset_out(VMReg r) { 222 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size; 223 } 224 225 // --------------------------------------------------------------------------- 226 // Read the array of BasicTypes from a signature, and compute where the 227 // arguments should go. Values in the VMRegPair regs array refer to 4-byte 228 // quantities. Values less than VMRegImpl::stack0 are registers, those above 229 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer 230 // as framesizes are fixed. 231 // VMRegImpl::stack0 refers to the first slot 0(sp). 232 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register 233 // up to RegisterImpl::number_of_registers) are the 64-bit 234 // integer registers. 235 236 // Note: the INPUTS in sig_bt are in units of Java argument words, 237 // which are 64-bit. The OUTPUTS are in 32-bit units. 238 239 // The Java calling convention is a "shifted" version of the C ABI. 240 // By skipping the first C ABI register we can call non-static jni 241 // methods with small numbers of arguments without having to shuffle 242 // the arguments at all. Since we control the java ABI we ought to at 243 // least get some advantage out of it. 244 245 int SharedRuntime::java_calling_convention(const BasicType *sig_bt, 246 VMRegPair *regs, 247 int total_args_passed, 248 int is_outgoing) { 249 250 // Create the mapping between argument positions and 251 // registers. 252 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = { 253 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5, j_rarg6, j_rarg7 254 }; 255 static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_j] = { 256 j_farg0, j_farg1, j_farg2, j_farg3, 257 j_farg4, j_farg5, j_farg6, j_farg7 258 }; 259 260 261 uint int_args = 0; 262 uint fp_args = 0; 263 uint stk_args = 0; // inc by 2 each time 264 265 for (int i = 0; i < total_args_passed; i++) { 266 switch (sig_bt[i]) { 267 case T_BOOLEAN: 268 case T_CHAR: 269 case T_BYTE: 270 case T_SHORT: 271 case T_INT: 272 if (int_args < Argument::n_int_register_parameters_j) { 273 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); 274 } else { 275 regs[i].set1(VMRegImpl::stack2reg(stk_args)); 276 stk_args += 2; 277 } 278 break; 279 case T_VOID: 280 // halves of T_LONG or T_DOUBLE 281 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); 282 regs[i].set_bad(); 283 break; 284 case T_LONG: 285 assert(sig_bt[i + 1] == T_VOID, "expecting half"); 286 // fall through 287 case T_OBJECT: 288 case T_ARRAY: 289 case T_ADDRESS: 290 if (int_args < Argument::n_int_register_parameters_j) { 291 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); 292 } else { 293 regs[i].set2(VMRegImpl::stack2reg(stk_args)); 294 stk_args += 2; 295 } 296 break; 297 case T_FLOAT: 298 if (fp_args < Argument::n_float_register_parameters_j) { 299 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); 300 } else { 301 regs[i].set1(VMRegImpl::stack2reg(stk_args)); 302 stk_args += 2; 303 } 304 break; 305 case T_DOUBLE: 306 assert(sig_bt[i + 1] == T_VOID, "expecting half"); 307 if (fp_args < Argument::n_float_register_parameters_j) { 308 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); 309 } else { 310 regs[i].set2(VMRegImpl::stack2reg(stk_args)); 311 stk_args += 2; 312 } 313 break; 314 default: 315 ShouldNotReachHere(); 316 break; 317 } 318 } 319 320 return round_to(stk_args, 2); 321 } 322 323 // Patch the callers callsite with entry to compiled code if it exists. 324 static void patch_callers_callsite(MacroAssembler *masm) { 325 Label L; 326 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset()))); 327 __ cbz(rscratch1, L); 328 329 __ enter(); 330 __ push_CPU_state(); 331 332 // VM needs caller's callsite 333 // VM needs target method 334 // This needs to be a long call since we will relocate this adapter to 335 // the codeBuffer and it may not reach 336 337 #ifndef PRODUCT 338 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area"); 339 #endif 340 341 __ mov(c_rarg0, rmethod); 342 __ mov(c_rarg1, lr); 343 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite))); 344 __ blrt(rscratch1, 2, 0, 0); 345 __ maybe_isb(); 346 347 __ pop_CPU_state(); 348 // restore sp 349 __ leave(); 350 __ bind(L); 351 } 352 353 static void gen_c2i_adapter(MacroAssembler *masm, 354 int total_args_passed, 355 int comp_args_on_stack, 356 const BasicType *sig_bt, 357 const VMRegPair *regs, 358 Label& skip_fixup) { 359 // Before we get into the guts of the C2I adapter, see if we should be here 360 // at all. We've come from compiled code and are attempting to jump to the 361 // interpreter, which means the caller made a static call to get here 362 // (vcalls always get a compiled target if there is one). Check for a 363 // compiled target. If there is one, we need to patch the caller's call. 364 patch_callers_callsite(masm); 365 366 __ bind(skip_fixup); 367 368 int words_pushed = 0; 369 370 // Since all args are passed on the stack, total_args_passed * 371 // Interpreter::stackElementSize is the space we need. 372 373 int extraspace = total_args_passed * Interpreter::stackElementSize; 374 375 __ mov(r13, sp); 376 377 // stack is aligned, keep it that way 378 extraspace = round_to(extraspace, 2*wordSize); 379 380 if (extraspace) 381 __ sub(sp, sp, extraspace); 382 383 // Now write the args into the outgoing interpreter space 384 for (int i = 0; i < total_args_passed; i++) { 385 if (sig_bt[i] == T_VOID) { 386 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); 387 continue; 388 } 389 390 // offset to start parameters 391 int st_off = (total_args_passed - i - 1) * Interpreter::stackElementSize; 392 int next_off = st_off - Interpreter::stackElementSize; 393 394 // Say 4 args: 395 // i st_off 396 // 0 32 T_LONG 397 // 1 24 T_VOID 398 // 2 16 T_OBJECT 399 // 3 8 T_BOOL 400 // - 0 return address 401 // 402 // However to make thing extra confusing. Because we can fit a long/double in 403 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter 404 // leaves one slot empty and only stores to a single slot. In this case the 405 // slot that is occupied is the T_VOID slot. See I said it was confusing. 406 407 VMReg r_1 = regs[i].first(); 408 VMReg r_2 = regs[i].second(); 409 if (!r_1->is_valid()) { 410 assert(!r_2->is_valid(), ""); 411 continue; 412 } 413 if (r_1->is_stack()) { 414 // memory to memory use rscratch1 415 int ld_off = (r_1->reg2stack() * VMRegImpl::stack_slot_size 416 + extraspace 417 + words_pushed * wordSize); 418 if (!r_2->is_valid()) { 419 // sign extend?? 420 __ ldrw(rscratch1, Address(sp, ld_off)); 421 __ str(rscratch1, Address(sp, st_off)); 422 423 } else { 424 425 __ ldr(rscratch1, Address(sp, ld_off)); 426 427 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG 428 // T_DOUBLE and T_LONG use two slots in the interpreter 429 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { 430 // ld_off == LSW, ld_off+wordSize == MSW 431 // st_off == MSW, next_off == LSW 432 __ str(rscratch1, Address(sp, next_off)); 433 #ifdef ASSERT 434 // Overwrite the unused slot with known junk 435 __ mov(rscratch1, 0xdeadffffdeadaaaaul); 436 __ str(rscratch1, Address(sp, st_off)); 437 #endif /* ASSERT */ 438 } else { 439 __ str(rscratch1, Address(sp, st_off)); 440 } 441 } 442 } else if (r_1->is_Register()) { 443 Register r = r_1->as_Register(); 444 if (!r_2->is_valid()) { 445 // must be only an int (or less ) so move only 32bits to slot 446 // why not sign extend?? 447 __ str(r, Address(sp, st_off)); 448 } else { 449 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG 450 // T_DOUBLE and T_LONG use two slots in the interpreter 451 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) { 452 // long/double in gpr 453 #ifdef ASSERT 454 // Overwrite the unused slot with known junk 455 __ mov(rscratch1, 0xdeadffffdeadaaabul); 456 __ str(rscratch1, Address(sp, st_off)); 457 #endif /* ASSERT */ 458 __ str(r, Address(sp, next_off)); 459 } else { 460 __ str(r, Address(sp, st_off)); 461 } 462 } 463 } else { 464 assert(r_1->is_FloatRegister(), ""); 465 if (!r_2->is_valid()) { 466 // only a float use just part of the slot 467 __ strs(r_1->as_FloatRegister(), Address(sp, st_off)); 468 } else { 469 #ifdef ASSERT 470 // Overwrite the unused slot with known junk 471 __ mov(rscratch1, 0xdeadffffdeadaaacul); 472 __ str(rscratch1, Address(sp, st_off)); 473 #endif /* ASSERT */ 474 __ strd(r_1->as_FloatRegister(), Address(sp, next_off)); 475 } 476 } 477 } 478 479 __ mov(esp, sp); // Interp expects args on caller's expression stack 480 481 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::interpreter_entry_offset()))); 482 __ br(rscratch1); 483 } 484 485 486 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm, 487 int total_args_passed, 488 int comp_args_on_stack, 489 const BasicType *sig_bt, 490 const VMRegPair *regs) { 491 492 // Note: r13 contains the senderSP on entry. We must preserve it since 493 // we may do a i2c -> c2i transition if we lose a race where compiled 494 // code goes non-entrant while we get args ready. 495 496 // In addition we use r13 to locate all the interpreter args because 497 // we must align the stack to 16 bytes. 498 499 // Adapters are frameless. 500 501 // An i2c adapter is frameless because the *caller* frame, which is 502 // interpreted, routinely repairs its own esp (from 503 // interpreter_frame_last_sp), even if a callee has modified the 504 // stack pointer. It also recalculates and aligns sp. 505 506 // A c2i adapter is frameless because the *callee* frame, which is 507 // interpreted, routinely repairs its caller's sp (from sender_sp, 508 // which is set up via the senderSP register). 509 510 // In other words, if *either* the caller or callee is interpreted, we can 511 // get the stack pointer repaired after a call. 512 513 // This is why c2i and i2c adapters cannot be indefinitely composed. 514 // In particular, if a c2i adapter were to somehow call an i2c adapter, 515 // both caller and callee would be compiled methods, and neither would 516 // clean up the stack pointer changes performed by the two adapters. 517 // If this happens, control eventually transfers back to the compiled 518 // caller, but with an uncorrected stack, causing delayed havoc. 519 520 if (VerifyAdapterCalls && 521 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) { 522 #if 0 523 // So, let's test for cascading c2i/i2c adapters right now. 524 // assert(Interpreter::contains($return_addr) || 525 // StubRoutines::contains($return_addr), 526 // "i2c adapter must return to an interpreter frame"); 527 __ block_comment("verify_i2c { "); 528 Label L_ok; 529 if (Interpreter::code() != NULL) 530 range_check(masm, rax, r11, 531 Interpreter::code()->code_start(), Interpreter::code()->code_end(), 532 L_ok); 533 if (StubRoutines::code1() != NULL) 534 range_check(masm, rax, r11, 535 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(), 536 L_ok); 537 if (StubRoutines::code2() != NULL) 538 range_check(masm, rax, r11, 539 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(), 540 L_ok); 541 const char* msg = "i2c adapter must return to an interpreter frame"; 542 __ block_comment(msg); 543 __ stop(msg); 544 __ bind(L_ok); 545 __ block_comment("} verify_i2ce "); 546 #endif 547 } 548 549 // Cut-out for having no stack args. 550 int comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord; 551 if (comp_args_on_stack) { 552 __ sub(rscratch1, sp, comp_words_on_stack * wordSize); 553 __ andr(sp, rscratch1, -16); 554 } 555 556 // Will jump to the compiled code just as if compiled code was doing it. 557 // Pre-load the register-jump target early, to schedule it better. 558 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::from_compiled_offset()))); 559 560 #if INCLUDE_JVMCI 561 if (EnableJVMCI) { 562 // check if this call should be routed towards a specific entry point 563 __ ldr(rscratch2, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset()))); 564 Label no_alternative_target; 565 __ cbz(rscratch2, no_alternative_target); 566 __ mov(rscratch1, rscratch2); 567 __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_alternate_call_target_offset()))); 568 __ bind(no_alternative_target); 569 } 570 #endif // INCLUDE_JVMCI 571 572 // Now generate the shuffle code. 573 for (int i = 0; i < total_args_passed; i++) { 574 if (sig_bt[i] == T_VOID) { 575 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half"); 576 continue; 577 } 578 579 // Pick up 0, 1 or 2 words from SP+offset. 580 581 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(), 582 "scrambled load targets?"); 583 // Load in argument order going down. 584 int ld_off = (total_args_passed - i - 1)*Interpreter::stackElementSize; 585 // Point to interpreter value (vs. tag) 586 int next_off = ld_off - Interpreter::stackElementSize; 587 // 588 // 589 // 590 VMReg r_1 = regs[i].first(); 591 VMReg r_2 = regs[i].second(); 592 if (!r_1->is_valid()) { 593 assert(!r_2->is_valid(), ""); 594 continue; 595 } 596 if (r_1->is_stack()) { 597 // Convert stack slot to an SP offset (+ wordSize to account for return address ) 598 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size; 599 if (!r_2->is_valid()) { 600 // sign extend??? 601 __ ldrsw(rscratch2, Address(esp, ld_off)); 602 __ str(rscratch2, Address(sp, st_off)); 603 } else { 604 // 605 // We are using two optoregs. This can be either T_OBJECT, 606 // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates 607 // two slots but only uses one for thr T_LONG or T_DOUBLE case 608 // So we must adjust where to pick up the data to match the 609 // interpreter. 610 // 611 // Interpreter local[n] == MSW, local[n+1] == LSW however locals 612 // are accessed as negative so LSW is at LOW address 613 614 // ld_off is MSW so get LSW 615 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? 616 next_off : ld_off; 617 __ ldr(rscratch2, Address(esp, offset)); 618 // st_off is LSW (i.e. reg.first()) 619 __ str(rscratch2, Address(sp, st_off)); 620 } 621 } else if (r_1->is_Register()) { // Register argument 622 Register r = r_1->as_Register(); 623 if (r_2->is_valid()) { 624 // 625 // We are using two VMRegs. This can be either T_OBJECT, 626 // T_ADDRESS, T_LONG, or T_DOUBLE the interpreter allocates 627 // two slots but only uses one for thr T_LONG or T_DOUBLE case 628 // So we must adjust where to pick up the data to match the 629 // interpreter. 630 631 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)? 632 next_off : ld_off; 633 634 // this can be a misaligned move 635 __ ldr(r, Address(esp, offset)); 636 } else { 637 // sign extend and use a full word? 638 __ ldrw(r, Address(esp, ld_off)); 639 } 640 } else { 641 if (!r_2->is_valid()) { 642 __ ldrs(r_1->as_FloatRegister(), Address(esp, ld_off)); 643 } else { 644 __ ldrd(r_1->as_FloatRegister(), Address(esp, next_off)); 645 } 646 } 647 } 648 649 // 6243940 We might end up in handle_wrong_method if 650 // the callee is deoptimized as we race thru here. If that 651 // happens we don't want to take a safepoint because the 652 // caller frame will look interpreted and arguments are now 653 // "compiled" so it is much better to make this transition 654 // invisible to the stack walking code. Unfortunately if 655 // we try and find the callee by normal means a safepoint 656 // is possible. So we stash the desired callee in the thread 657 // and the vm will find there should this case occur. 658 659 __ str(rmethod, Address(rthread, JavaThread::callee_target_offset())); 660 661 __ br(rscratch1); 662 } 663 664 #ifdef BUILTIN_SIM 665 static void generate_i2c_adapter_name(char *result, int total_args_passed, const BasicType *sig_bt) 666 { 667 strcpy(result, "i2c("); 668 int idx = 4; 669 for (int i = 0; i < total_args_passed; i++) { 670 switch(sig_bt[i]) { 671 case T_BOOLEAN: 672 result[idx++] = 'Z'; 673 break; 674 case T_CHAR: 675 result[idx++] = 'C'; 676 break; 677 case T_FLOAT: 678 result[idx++] = 'F'; 679 break; 680 case T_DOUBLE: 681 assert((i < (total_args_passed - 1)) && (sig_bt[i+1] == T_VOID), 682 "double must be followed by void"); 683 i++; 684 result[idx++] = 'D'; 685 break; 686 case T_BYTE: 687 result[idx++] = 'B'; 688 break; 689 case T_SHORT: 690 result[idx++] = 'S'; 691 break; 692 case T_INT: 693 result[idx++] = 'I'; 694 break; 695 case T_LONG: 696 assert((i < (total_args_passed - 1)) && (sig_bt[i+1] == T_VOID), 697 "long must be followed by void"); 698 i++; 699 result[idx++] = 'L'; 700 break; 701 case T_OBJECT: 702 result[idx++] = 'O'; 703 break; 704 case T_ARRAY: 705 result[idx++] = '['; 706 break; 707 case T_ADDRESS: 708 result[idx++] = 'P'; 709 break; 710 case T_NARROWOOP: 711 result[idx++] = 'N'; 712 break; 713 case T_METADATA: 714 result[idx++] = 'M'; 715 break; 716 case T_NARROWKLASS: 717 result[idx++] = 'K'; 718 break; 719 default: 720 result[idx++] = '?'; 721 break; 722 } 723 } 724 result[idx++] = ')'; 725 result[idx] = '\0'; 726 } 727 #endif 728 729 // --------------------------------------------------------------- 730 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm, 731 int total_args_passed, 732 int comp_args_on_stack, 733 const BasicType *sig_bt, 734 const VMRegPair *regs, 735 AdapterFingerPrint* fingerprint) { 736 address i2c_entry = __ pc(); 737 #ifdef BUILTIN_SIM 738 char *name = NULL; 739 AArch64Simulator *sim = NULL; 740 size_t len = 65536; 741 if (NotifySimulator) { 742 name = NEW_C_HEAP_ARRAY(char, len, mtInternal); 743 } 744 745 if (name) { 746 generate_i2c_adapter_name(name, total_args_passed, sig_bt); 747 sim = AArch64Simulator::get_current(UseSimulatorCache, DisableBCCheck); 748 sim->notifyCompile(name, i2c_entry); 749 } 750 #endif 751 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs); 752 753 address c2i_unverified_entry = __ pc(); 754 Label skip_fixup; 755 756 Label ok; 757 758 Register holder = rscratch2; 759 Register receiver = j_rarg0; 760 Register tmp = r10; // A call-clobbered register not used for arg passing 761 762 // ------------------------------------------------------------------------- 763 // Generate a C2I adapter. On entry we know rmethod holds the Method* during calls 764 // to the interpreter. The args start out packed in the compiled layout. They 765 // need to be unpacked into the interpreter layout. This will almost always 766 // require some stack space. We grow the current (compiled) stack, then repack 767 // the args. We finally end in a jump to the generic interpreter entry point. 768 // On exit from the interpreter, the interpreter will restore our SP (lest the 769 // compiled code, which relys solely on SP and not FP, get sick). 770 771 { 772 __ block_comment("c2i_unverified_entry {"); 773 __ load_klass(rscratch1, receiver); 774 __ ldr(tmp, Address(holder, CompiledICHolder::holder_klass_offset())); 775 __ cmp(rscratch1, tmp); 776 __ ldr(rmethod, Address(holder, CompiledICHolder::holder_method_offset())); 777 __ br(Assembler::EQ, ok); 778 __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); 779 780 __ bind(ok); 781 // Method might have been compiled since the call site was patched to 782 // interpreted; if that is the case treat it as a miss so we can get 783 // the call site corrected. 784 __ ldr(rscratch1, Address(rmethod, in_bytes(Method::code_offset()))); 785 __ cbz(rscratch1, skip_fixup); 786 __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); 787 __ block_comment("} c2i_unverified_entry"); 788 } 789 790 address c2i_entry = __ pc(); 791 792 #ifdef BUILTIN_SIM 793 if (name) { 794 name[0] = 'c'; 795 name[2] = 'i'; 796 sim->notifyCompile(name, c2i_entry); 797 FREE_C_HEAP_ARRAY(char, name, mtInternal); 798 } 799 #endif 800 801 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup); 802 803 __ flush(); 804 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry); 805 } 806 807 int SharedRuntime::c_calling_convention(const BasicType *sig_bt, 808 VMRegPair *regs, 809 VMRegPair *regs2, 810 int total_args_passed) { 811 assert(regs2 == NULL, "not needed on AArch64"); 812 813 // We return the amount of VMRegImpl stack slots we need to reserve for all 814 // the arguments NOT counting out_preserve_stack_slots. 815 816 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = { 817 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5, c_rarg6, c_rarg7 818 }; 819 static const FloatRegister FP_ArgReg[Argument::n_float_register_parameters_c] = { 820 c_farg0, c_farg1, c_farg2, c_farg3, 821 c_farg4, c_farg5, c_farg6, c_farg7 822 }; 823 824 uint int_args = 0; 825 uint fp_args = 0; 826 uint stk_args = 0; // inc by 2 each time 827 828 for (int i = 0; i < total_args_passed; i++) { 829 switch (sig_bt[i]) { 830 case T_BOOLEAN: 831 case T_CHAR: 832 case T_BYTE: 833 case T_SHORT: 834 case T_INT: 835 if (int_args < Argument::n_int_register_parameters_c) { 836 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg()); 837 } else { 838 regs[i].set1(VMRegImpl::stack2reg(stk_args)); 839 stk_args += 2; 840 } 841 break; 842 case T_LONG: 843 assert(sig_bt[i + 1] == T_VOID, "expecting half"); 844 // fall through 845 case T_OBJECT: 846 case T_ARRAY: 847 case T_ADDRESS: 848 case T_METADATA: 849 if (int_args < Argument::n_int_register_parameters_c) { 850 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg()); 851 } else { 852 regs[i].set2(VMRegImpl::stack2reg(stk_args)); 853 stk_args += 2; 854 } 855 break; 856 case T_FLOAT: 857 if (fp_args < Argument::n_float_register_parameters_c) { 858 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg()); 859 } else { 860 regs[i].set1(VMRegImpl::stack2reg(stk_args)); 861 stk_args += 2; 862 } 863 break; 864 case T_DOUBLE: 865 assert(sig_bt[i + 1] == T_VOID, "expecting half"); 866 if (fp_args < Argument::n_float_register_parameters_c) { 867 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg()); 868 } else { 869 regs[i].set2(VMRegImpl::stack2reg(stk_args)); 870 stk_args += 2; 871 } 872 break; 873 case T_VOID: // Halves of longs and doubles 874 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half"); 875 regs[i].set_bad(); 876 break; 877 default: 878 ShouldNotReachHere(); 879 break; 880 } 881 } 882 883 return stk_args; 884 } 885 886 // On 64 bit we will store integer like items to the stack as 887 // 64 bits items (sparc abi) even though java would only store 888 // 32bits for a parameter. On 32bit it will simply be 32 bits 889 // So this routine will do 32->32 on 32bit and 32->64 on 64bit 890 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 891 if (src.first()->is_stack()) { 892 if (dst.first()->is_stack()) { 893 // stack to stack 894 __ ldr(rscratch1, Address(rfp, reg2offset_in(src.first()))); 895 __ str(rscratch1, Address(sp, reg2offset_out(dst.first()))); 896 } else { 897 // stack to reg 898 __ ldrsw(dst.first()->as_Register(), Address(rfp, reg2offset_in(src.first()))); 899 } 900 } else if (dst.first()->is_stack()) { 901 // reg to stack 902 // Do we really have to sign extend??? 903 // __ movslq(src.first()->as_Register(), src.first()->as_Register()); 904 __ str(src.first()->as_Register(), Address(sp, reg2offset_out(dst.first()))); 905 } else { 906 if (dst.first() != src.first()) { 907 __ sxtw(dst.first()->as_Register(), src.first()->as_Register()); 908 } 909 } 910 } 911 912 // An oop arg. Must pass a handle not the oop itself 913 static void object_move(MacroAssembler* masm, 914 OopMap* map, 915 int oop_handle_offset, 916 int framesize_in_slots, 917 VMRegPair src, 918 VMRegPair dst, 919 bool is_receiver, 920 int* receiver_offset) { 921 922 // must pass a handle. First figure out the location we use as a handle 923 924 Register rHandle = dst.first()->is_stack() ? rscratch2 : dst.first()->as_Register(); 925 926 // See if oop is NULL if it is we need no handle 927 928 if (src.first()->is_stack()) { 929 930 // Oop is already on the stack as an argument 931 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots(); 932 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots)); 933 if (is_receiver) { 934 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size; 935 } 936 937 __ ldr(rscratch1, Address(rfp, reg2offset_in(src.first()))); 938 __ lea(rHandle, Address(rfp, reg2offset_in(src.first()))); 939 // conditionally move a NULL 940 __ cmp(rscratch1, zr); 941 __ csel(rHandle, zr, rHandle, Assembler::EQ); 942 } else { 943 944 // Oop is in an a register we must store it to the space we reserve 945 // on the stack for oop_handles and pass a handle if oop is non-NULL 946 947 const Register rOop = src.first()->as_Register(); 948 int oop_slot; 949 if (rOop == j_rarg0) 950 oop_slot = 0; 951 else if (rOop == j_rarg1) 952 oop_slot = 1; 953 else if (rOop == j_rarg2) 954 oop_slot = 2; 955 else if (rOop == j_rarg3) 956 oop_slot = 3; 957 else if (rOop == j_rarg4) 958 oop_slot = 4; 959 else if (rOop == j_rarg5) 960 oop_slot = 5; 961 else if (rOop == j_rarg6) 962 oop_slot = 6; 963 else { 964 assert(rOop == j_rarg7, "wrong register"); 965 oop_slot = 7; 966 } 967 968 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset; 969 int offset = oop_slot*VMRegImpl::stack_slot_size; 970 971 map->set_oop(VMRegImpl::stack2reg(oop_slot)); 972 // Store oop in handle area, may be NULL 973 __ str(rOop, Address(sp, offset)); 974 if (is_receiver) { 975 *receiver_offset = offset; 976 } 977 978 __ cmp(rOop, zr); 979 __ lea(rHandle, Address(sp, offset)); 980 // conditionally move a NULL 981 __ csel(rHandle, zr, rHandle, Assembler::EQ); 982 } 983 984 // If arg is on the stack then place it otherwise it is already in correct reg. 985 if (dst.first()->is_stack()) { 986 __ str(rHandle, Address(sp, reg2offset_out(dst.first()))); 987 } 988 } 989 990 // A float arg may have to do float reg int reg conversion 991 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 992 if (src.first() != dst.first()) { 993 if (src.is_single_phys_reg() && dst.is_single_phys_reg()) 994 __ fmovs(dst.first()->as_FloatRegister(), src.first()->as_FloatRegister()); 995 else 996 ShouldNotReachHere(); 997 } 998 } 999 1000 // A long move 1001 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 1002 if (src.first()->is_stack()) { 1003 if (dst.first()->is_stack()) { 1004 // stack to stack 1005 __ ldr(rscratch1, Address(rfp, reg2offset_in(src.first()))); 1006 __ str(rscratch1, Address(sp, reg2offset_out(dst.first()))); 1007 } else { 1008 // stack to reg 1009 __ ldr(dst.first()->as_Register(), Address(rfp, reg2offset_in(src.first()))); 1010 } 1011 } else if (dst.first()->is_stack()) { 1012 // reg to stack 1013 // Do we really have to sign extend??? 1014 // __ movslq(src.first()->as_Register(), src.first()->as_Register()); 1015 __ str(src.first()->as_Register(), Address(sp, reg2offset_out(dst.first()))); 1016 } else { 1017 if (dst.first() != src.first()) { 1018 __ mov(dst.first()->as_Register(), src.first()->as_Register()); 1019 } 1020 } 1021 } 1022 1023 1024 // A double move 1025 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) { 1026 if (src.first() != dst.first()) { 1027 if (src.is_single_phys_reg() && dst.is_single_phys_reg()) 1028 __ fmovd(dst.first()->as_FloatRegister(), src.first()->as_FloatRegister()); 1029 else 1030 ShouldNotReachHere(); 1031 } 1032 } 1033 1034 1035 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { 1036 // We always ignore the frame_slots arg and just use the space just below frame pointer 1037 // which by this time is free to use 1038 switch (ret_type) { 1039 case T_FLOAT: 1040 __ strs(v0, Address(rfp, -wordSize)); 1041 break; 1042 case T_DOUBLE: 1043 __ strd(v0, Address(rfp, -wordSize)); 1044 break; 1045 case T_VOID: break; 1046 default: { 1047 __ str(r0, Address(rfp, -wordSize)); 1048 } 1049 } 1050 } 1051 1052 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) { 1053 // We always ignore the frame_slots arg and just use the space just below frame pointer 1054 // which by this time is free to use 1055 switch (ret_type) { 1056 case T_FLOAT: 1057 __ ldrs(v0, Address(rfp, -wordSize)); 1058 break; 1059 case T_DOUBLE: 1060 __ ldrd(v0, Address(rfp, -wordSize)); 1061 break; 1062 case T_VOID: break; 1063 default: { 1064 __ ldr(r0, Address(rfp, -wordSize)); 1065 } 1066 } 1067 } 1068 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { 1069 RegSet x; 1070 for ( int i = first_arg ; i < arg_count ; i++ ) { 1071 if (args[i].first()->is_Register()) { 1072 x = x + args[i].first()->as_Register(); 1073 } else if (args[i].first()->is_FloatRegister()) { 1074 __ strd(args[i].first()->as_FloatRegister(), Address(__ pre(sp, -2 * wordSize))); 1075 } 1076 } 1077 __ push(x, sp); 1078 } 1079 1080 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) { 1081 RegSet x; 1082 for ( int i = first_arg ; i < arg_count ; i++ ) { 1083 if (args[i].first()->is_Register()) { 1084 x = x + args[i].first()->as_Register(); 1085 } else { 1086 ; 1087 } 1088 } 1089 __ pop(x, sp); 1090 for ( int i = first_arg ; i < arg_count ; i++ ) { 1091 if (args[i].first()->is_Register()) { 1092 ; 1093 } else if (args[i].first()->is_FloatRegister()) { 1094 __ ldrd(args[i].first()->as_FloatRegister(), Address(__ post(sp, 2 * wordSize))); 1095 } 1096 } 1097 } 1098 1099 1100 // Check GCLocker::needs_gc and enter the runtime if it's true. This 1101 // keeps a new JNI critical region from starting until a GC has been 1102 // forced. Save down any oops in registers and describe them in an 1103 // OopMap. 1104 static void check_needs_gc_for_critical_native(MacroAssembler* masm, 1105 int stack_slots, 1106 int total_c_args, 1107 int total_in_args, 1108 int arg_save_area, 1109 OopMapSet* oop_maps, 1110 VMRegPair* in_regs, 1111 BasicType* in_sig_bt) { Unimplemented(); } 1112 1113 // Unpack an array argument into a pointer to the body and the length 1114 // if the array is non-null, otherwise pass 0 for both. 1115 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) { Unimplemented(); } 1116 1117 1118 class ComputeMoveOrder: public StackObj { 1119 class MoveOperation: public ResourceObj { 1120 friend class ComputeMoveOrder; 1121 private: 1122 VMRegPair _src; 1123 VMRegPair _dst; 1124 int _src_index; 1125 int _dst_index; 1126 bool _processed; 1127 MoveOperation* _next; 1128 MoveOperation* _prev; 1129 1130 static int get_id(VMRegPair r) { Unimplemented(); return 0; } 1131 1132 public: 1133 MoveOperation(int src_index, VMRegPair src, int dst_index, VMRegPair dst): 1134 _src(src) 1135 , _src_index(src_index) 1136 , _dst(dst) 1137 , _dst_index(dst_index) 1138 , _next(NULL) 1139 , _prev(NULL) 1140 , _processed(false) { Unimplemented(); } 1141 1142 VMRegPair src() const { Unimplemented(); return _src; } 1143 int src_id() const { Unimplemented(); return 0; } 1144 int src_index() const { Unimplemented(); return 0; } 1145 VMRegPair dst() const { Unimplemented(); return _src; } 1146 void set_dst(int i, VMRegPair dst) { Unimplemented(); } 1147 int dst_index() const { Unimplemented(); return 0; } 1148 int dst_id() const { Unimplemented(); return 0; } 1149 MoveOperation* next() const { Unimplemented(); return 0; } 1150 MoveOperation* prev() const { Unimplemented(); return 0; } 1151 void set_processed() { Unimplemented(); } 1152 bool is_processed() const { Unimplemented(); return 0; } 1153 1154 // insert 1155 void break_cycle(VMRegPair temp_register) { Unimplemented(); } 1156 1157 void link(GrowableArray<MoveOperation*>& killer) { Unimplemented(); } 1158 }; 1159 1160 private: 1161 GrowableArray<MoveOperation*> edges; 1162 1163 public: 1164 ComputeMoveOrder(int total_in_args, VMRegPair* in_regs, int total_c_args, VMRegPair* out_regs, 1165 BasicType* in_sig_bt, GrowableArray<int>& arg_order, VMRegPair tmp_vmreg) { Unimplemented(); } 1166 1167 // Collected all the move operations 1168 void add_edge(int src_index, VMRegPair src, int dst_index, VMRegPair dst) { Unimplemented(); } 1169 1170 // Walk the edges breaking cycles between moves. The result list 1171 // can be walked in order to produce the proper set of loads 1172 GrowableArray<MoveOperation*>* get_store_order(VMRegPair temp_register) { Unimplemented(); return 0; } 1173 }; 1174 1175 1176 static void rt_call(MacroAssembler* masm, address dest, int gpargs, int fpargs, int type) { 1177 CodeBlob *cb = CodeCache::find_blob(dest); 1178 if (cb) { 1179 __ far_call(RuntimeAddress(dest)); 1180 } else { 1181 assert((unsigned)gpargs < 256, "eek!"); 1182 assert((unsigned)fpargs < 32, "eek!"); 1183 __ lea(rscratch1, RuntimeAddress(dest)); 1184 if (UseBuiltinSim) __ mov(rscratch2, (gpargs << 6) | (fpargs << 2) | type); 1185 __ blrt(rscratch1, rscratch2); 1186 __ maybe_isb(); 1187 } 1188 } 1189 1190 static void verify_oop_args(MacroAssembler* masm, 1191 methodHandle method, 1192 const BasicType* sig_bt, 1193 const VMRegPair* regs) { 1194 Register temp_reg = r19; // not part of any compiled calling seq 1195 if (VerifyOops) { 1196 for (int i = 0; i < method->size_of_parameters(); i++) { 1197 if (sig_bt[i] == T_OBJECT || 1198 sig_bt[i] == T_ARRAY) { 1199 VMReg r = regs[i].first(); 1200 assert(r->is_valid(), "bad oop arg"); 1201 if (r->is_stack()) { 1202 __ ldr(temp_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size)); 1203 __ verify_oop(temp_reg); 1204 } else { 1205 __ verify_oop(r->as_Register()); 1206 } 1207 } 1208 } 1209 } 1210 } 1211 1212 static void gen_special_dispatch(MacroAssembler* masm, 1213 methodHandle method, 1214 const BasicType* sig_bt, 1215 const VMRegPair* regs) { 1216 verify_oop_args(masm, method, sig_bt, regs); 1217 vmIntrinsics::ID iid = method->intrinsic_id(); 1218 1219 // Now write the args into the outgoing interpreter space 1220 bool has_receiver = false; 1221 Register receiver_reg = noreg; 1222 int member_arg_pos = -1; 1223 Register member_reg = noreg; 1224 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid); 1225 if (ref_kind != 0) { 1226 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument 1227 member_reg = r19; // known to be free at this point 1228 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind); 1229 } else if (iid == vmIntrinsics::_invokeBasic) { 1230 has_receiver = true; 1231 } else { 1232 fatal("unexpected intrinsic id %d", iid); 1233 } 1234 1235 if (member_reg != noreg) { 1236 // Load the member_arg into register, if necessary. 1237 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs); 1238 VMReg r = regs[member_arg_pos].first(); 1239 if (r->is_stack()) { 1240 __ ldr(member_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size)); 1241 } else { 1242 // no data motion is needed 1243 member_reg = r->as_Register(); 1244 } 1245 } 1246 1247 if (has_receiver) { 1248 // Make sure the receiver is loaded into a register. 1249 assert(method->size_of_parameters() > 0, "oob"); 1250 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object"); 1251 VMReg r = regs[0].first(); 1252 assert(r->is_valid(), "bad receiver arg"); 1253 if (r->is_stack()) { 1254 // Porting note: This assumes that compiled calling conventions always 1255 // pass the receiver oop in a register. If this is not true on some 1256 // platform, pick a temp and load the receiver from stack. 1257 fatal("receiver always in a register"); 1258 receiver_reg = r2; // known to be free at this point 1259 __ ldr(receiver_reg, Address(sp, r->reg2stack() * VMRegImpl::stack_slot_size)); 1260 } else { 1261 // no data motion is needed 1262 receiver_reg = r->as_Register(); 1263 } 1264 } 1265 1266 // Figure out which address we are really jumping to: 1267 MethodHandles::generate_method_handle_dispatch(masm, iid, 1268 receiver_reg, member_reg, /*for_compiler_entry:*/ true); 1269 } 1270 1271 // --------------------------------------------------------------------------- 1272 // Generate a native wrapper for a given method. The method takes arguments 1273 // in the Java compiled code convention, marshals them to the native 1274 // convention (handlizes oops, etc), transitions to native, makes the call, 1275 // returns to java state (possibly blocking), unhandlizes any result and 1276 // returns. 1277 // 1278 // Critical native functions are a shorthand for the use of 1279 // GetPrimtiveArrayCritical and disallow the use of any other JNI 1280 // functions. The wrapper is expected to unpack the arguments before 1281 // passing them to the callee and perform checks before and after the 1282 // native call to ensure that they GCLocker 1283 // lock_critical/unlock_critical semantics are followed. Some other 1284 // parts of JNI setup are skipped like the tear down of the JNI handle 1285 // block and the check for pending exceptions it's impossible for them 1286 // to be thrown. 1287 // 1288 // They are roughly structured like this: 1289 // if (GCLocker::needs_gc()) 1290 // SharedRuntime::block_for_jni_critical(); 1291 // tranistion to thread_in_native 1292 // unpack arrray arguments and call native entry point 1293 // check for safepoint in progress 1294 // check if any thread suspend flags are set 1295 // call into JVM and possible unlock the JNI critical 1296 // if a GC was suppressed while in the critical native. 1297 // transition back to thread_in_Java 1298 // return to caller 1299 // 1300 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm, 1301 const methodHandle& method, 1302 int compile_id, 1303 BasicType* in_sig_bt, 1304 VMRegPair* in_regs, 1305 BasicType ret_type) { 1306 #ifdef BUILTIN_SIM 1307 if (NotifySimulator) { 1308 // Names are up to 65536 chars long. UTF8-coded strings are up to 1309 // 3 bytes per character. We concatenate three such strings. 1310 // Yes, I know this is ridiculous, but it's debug code and glibc 1311 // allocates large arrays very efficiently. 1312 size_t len = (65536 * 3) * 3; 1313 char *name = new char[len]; 1314 1315 strncpy(name, method()->method_holder()->name()->as_utf8(), len); 1316 strncat(name, ".", len); 1317 strncat(name, method()->name()->as_utf8(), len); 1318 strncat(name, method()->signature()->as_utf8(), len); 1319 AArch64Simulator::get_current(UseSimulatorCache, DisableBCCheck)->notifyCompile(name, __ pc()); 1320 delete[] name; 1321 } 1322 #endif 1323 1324 if (method->is_method_handle_intrinsic()) { 1325 vmIntrinsics::ID iid = method->intrinsic_id(); 1326 intptr_t start = (intptr_t)__ pc(); 1327 int vep_offset = ((intptr_t)__ pc()) - start; 1328 1329 // First instruction must be a nop as it may need to be patched on deoptimisation 1330 __ nop(); 1331 gen_special_dispatch(masm, 1332 method, 1333 in_sig_bt, 1334 in_regs); 1335 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period 1336 __ flush(); 1337 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually 1338 return nmethod::new_native_nmethod(method, 1339 compile_id, 1340 masm->code(), 1341 vep_offset, 1342 frame_complete, 1343 stack_slots / VMRegImpl::slots_per_word, 1344 in_ByteSize(-1), 1345 in_ByteSize(-1), 1346 (OopMapSet*)NULL); 1347 } 1348 bool is_critical_native = true; 1349 address native_func = method->critical_native_function(); 1350 if (native_func == NULL) { 1351 native_func = method->native_function(); 1352 is_critical_native = false; 1353 } 1354 assert(native_func != NULL, "must have function"); 1355 1356 // An OopMap for lock (and class if static) 1357 OopMapSet *oop_maps = new OopMapSet(); 1358 intptr_t start = (intptr_t)__ pc(); 1359 1360 // We have received a description of where all the java arg are located 1361 // on entry to the wrapper. We need to convert these args to where 1362 // the jni function will expect them. To figure out where they go 1363 // we convert the java signature to a C signature by inserting 1364 // the hidden arguments as arg[0] and possibly arg[1] (static method) 1365 1366 const int total_in_args = method->size_of_parameters(); 1367 int total_c_args = total_in_args; 1368 if (!is_critical_native) { 1369 total_c_args += 1; 1370 if (method->is_static()) { 1371 total_c_args++; 1372 } 1373 } else { 1374 for (int i = 0; i < total_in_args; i++) { 1375 if (in_sig_bt[i] == T_ARRAY) { 1376 total_c_args++; 1377 } 1378 } 1379 } 1380 1381 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args); 1382 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args); 1383 BasicType* in_elem_bt = NULL; 1384 1385 int argc = 0; 1386 if (!is_critical_native) { 1387 out_sig_bt[argc++] = T_ADDRESS; 1388 if (method->is_static()) { 1389 out_sig_bt[argc++] = T_OBJECT; 1390 } 1391 1392 for (int i = 0; i < total_in_args ; i++ ) { 1393 out_sig_bt[argc++] = in_sig_bt[i]; 1394 } 1395 } else { 1396 Thread* THREAD = Thread::current(); 1397 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args); 1398 SignatureStream ss(method->signature()); 1399 for (int i = 0; i < total_in_args ; i++ ) { 1400 if (in_sig_bt[i] == T_ARRAY) { 1401 // Arrays are passed as int, elem* pair 1402 out_sig_bt[argc++] = T_INT; 1403 out_sig_bt[argc++] = T_ADDRESS; 1404 Symbol* atype = ss.as_symbol(CHECK_NULL); 1405 const char* at = atype->as_C_string(); 1406 if (strlen(at) == 2) { 1407 assert(at[0] == '[', "must be"); 1408 switch (at[1]) { 1409 case 'B': in_elem_bt[i] = T_BYTE; break; 1410 case 'C': in_elem_bt[i] = T_CHAR; break; 1411 case 'D': in_elem_bt[i] = T_DOUBLE; break; 1412 case 'F': in_elem_bt[i] = T_FLOAT; break; 1413 case 'I': in_elem_bt[i] = T_INT; break; 1414 case 'J': in_elem_bt[i] = T_LONG; break; 1415 case 'S': in_elem_bt[i] = T_SHORT; break; 1416 case 'Z': in_elem_bt[i] = T_BOOLEAN; break; 1417 default: ShouldNotReachHere(); 1418 } 1419 } 1420 } else { 1421 out_sig_bt[argc++] = in_sig_bt[i]; 1422 in_elem_bt[i] = T_VOID; 1423 } 1424 if (in_sig_bt[i] != T_VOID) { 1425 assert(in_sig_bt[i] == ss.type(), "must match"); 1426 ss.next(); 1427 } 1428 } 1429 } 1430 1431 // Now figure out where the args must be stored and how much stack space 1432 // they require. 1433 int out_arg_slots; 1434 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args); 1435 1436 // Compute framesize for the wrapper. We need to handlize all oops in 1437 // incoming registers 1438 1439 // Calculate the total number of stack slots we will need. 1440 1441 // First count the abi requirement plus all of the outgoing args 1442 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots; 1443 1444 // Now the space for the inbound oop handle area 1445 int total_save_slots = 8 * VMRegImpl::slots_per_word; // 8 arguments passed in registers 1446 if (is_critical_native) { 1447 // Critical natives may have to call out so they need a save area 1448 // for register arguments. 1449 int double_slots = 0; 1450 int single_slots = 0; 1451 for ( int i = 0; i < total_in_args; i++) { 1452 if (in_regs[i].first()->is_Register()) { 1453 const Register reg = in_regs[i].first()->as_Register(); 1454 switch (in_sig_bt[i]) { 1455 case T_BOOLEAN: 1456 case T_BYTE: 1457 case T_SHORT: 1458 case T_CHAR: 1459 case T_INT: single_slots++; break; 1460 case T_ARRAY: // specific to LP64 (7145024) 1461 case T_LONG: double_slots++; break; 1462 default: ShouldNotReachHere(); 1463 } 1464 } else if (in_regs[i].first()->is_FloatRegister()) { 1465 ShouldNotReachHere(); 1466 } 1467 } 1468 total_save_slots = double_slots * 2 + single_slots; 1469 // align the save area 1470 if (double_slots != 0) { 1471 stack_slots = round_to(stack_slots, 2); 1472 } 1473 } 1474 1475 int oop_handle_offset = stack_slots; 1476 stack_slots += total_save_slots; 1477 1478 // Now any space we need for handlizing a klass if static method 1479 1480 int klass_slot_offset = 0; 1481 int klass_offset = -1; 1482 int lock_slot_offset = 0; 1483 bool is_static = false; 1484 1485 if (method->is_static()) { 1486 klass_slot_offset = stack_slots; 1487 stack_slots += VMRegImpl::slots_per_word; 1488 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size; 1489 is_static = true; 1490 } 1491 1492 // Plus a lock if needed 1493 1494 if (method->is_synchronized()) { 1495 lock_slot_offset = stack_slots; 1496 stack_slots += VMRegImpl::slots_per_word; 1497 } 1498 1499 // Now a place (+2) to save return values or temp during shuffling 1500 // + 4 for return address (which we own) and saved rfp 1501 stack_slots += 6; 1502 1503 // Ok The space we have allocated will look like: 1504 // 1505 // 1506 // FP-> | | 1507 // |---------------------| 1508 // | 2 slots for moves | 1509 // |---------------------| 1510 // | lock box (if sync) | 1511 // |---------------------| <- lock_slot_offset 1512 // | klass (if static) | 1513 // |---------------------| <- klass_slot_offset 1514 // | oopHandle area | 1515 // |---------------------| <- oop_handle_offset (8 java arg registers) 1516 // | outbound memory | 1517 // | based arguments | 1518 // | | 1519 // |---------------------| 1520 // | | 1521 // SP-> | out_preserved_slots | 1522 // 1523 // 1524 1525 1526 // Now compute actual number of stack words we need rounding to make 1527 // stack properly aligned. 1528 stack_slots = round_to(stack_slots, StackAlignmentInSlots); 1529 1530 int stack_size = stack_slots * VMRegImpl::stack_slot_size; 1531 1532 // First thing make an ic check to see if we should even be here 1533 1534 // We are free to use all registers as temps without saving them and 1535 // restoring them except rfp. rfp is the only callee save register 1536 // as far as the interpreter and the compiler(s) are concerned. 1537 1538 1539 const Register ic_reg = rscratch2; 1540 const Register receiver = j_rarg0; 1541 1542 Label hit; 1543 Label exception_pending; 1544 1545 assert_different_registers(ic_reg, receiver, rscratch1); 1546 __ verify_oop(receiver); 1547 __ cmp_klass(receiver, ic_reg, rscratch1); 1548 __ br(Assembler::EQ, hit); 1549 1550 __ far_jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub())); 1551 1552 // Verified entry point must be aligned 1553 __ align(8); 1554 1555 __ bind(hit); 1556 1557 int vep_offset = ((intptr_t)__ pc()) - start; 1558 1559 // If we have to make this method not-entrant we'll overwrite its 1560 // first instruction with a jump. For this action to be legal we 1561 // must ensure that this first instruction is a B, BL, NOP, BKPT, 1562 // SVC, HVC, or SMC. Make it a NOP. 1563 __ nop(); 1564 1565 // Generate stack overflow check 1566 if (UseStackBanging) { 1567 __ bang_stack_with_offset(JavaThread::stack_shadow_zone_size()); 1568 } else { 1569 Unimplemented(); 1570 } 1571 1572 // Generate a new frame for the wrapper. 1573 __ enter(); 1574 // -2 because return address is already present and so is saved rfp 1575 __ sub(sp, sp, stack_size - 2*wordSize); 1576 1577 // Frame is now completed as far as size and linkage. 1578 int frame_complete = ((intptr_t)__ pc()) - start; 1579 1580 // record entry into native wrapper code 1581 if (NotifySimulator) { 1582 __ notify(Assembler::method_entry); 1583 } 1584 1585 // We use r20 as the oop handle for the receiver/klass 1586 // It is callee save so it survives the call to native 1587 1588 const Register oop_handle_reg = r20; 1589 1590 if (is_critical_native) { 1591 check_needs_gc_for_critical_native(masm, stack_slots, total_c_args, total_in_args, 1592 oop_handle_offset, oop_maps, in_regs, in_sig_bt); 1593 } 1594 1595 // 1596 // We immediately shuffle the arguments so that any vm call we have to 1597 // make from here on out (sync slow path, jvmti, etc.) we will have 1598 // captured the oops from our caller and have a valid oopMap for 1599 // them. 1600 1601 // ----------------- 1602 // The Grand Shuffle 1603 1604 // The Java calling convention is either equal (linux) or denser (win64) than the 1605 // c calling convention. However the because of the jni_env argument the c calling 1606 // convention always has at least one more (and two for static) arguments than Java. 1607 // Therefore if we move the args from java -> c backwards then we will never have 1608 // a register->register conflict and we don't have to build a dependency graph 1609 // and figure out how to break any cycles. 1610 // 1611 1612 // Record esp-based slot for receiver on stack for non-static methods 1613 int receiver_offset = -1; 1614 1615 // This is a trick. We double the stack slots so we can claim 1616 // the oops in the caller's frame. Since we are sure to have 1617 // more args than the caller doubling is enough to make 1618 // sure we can capture all the incoming oop args from the 1619 // caller. 1620 // 1621 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/); 1622 1623 // Mark location of rfp (someday) 1624 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rfp)); 1625 1626 1627 int float_args = 0; 1628 int int_args = 0; 1629 1630 #ifdef ASSERT 1631 bool reg_destroyed[RegisterImpl::number_of_registers]; 1632 bool freg_destroyed[FloatRegisterImpl::number_of_registers]; 1633 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) { 1634 reg_destroyed[r] = false; 1635 } 1636 for ( int f = 0 ; f < FloatRegisterImpl::number_of_registers ; f++ ) { 1637 freg_destroyed[f] = false; 1638 } 1639 1640 #endif /* ASSERT */ 1641 1642 // This may iterate in two different directions depending on the 1643 // kind of native it is. The reason is that for regular JNI natives 1644 // the incoming and outgoing registers are offset upwards and for 1645 // critical natives they are offset down. 1646 GrowableArray<int> arg_order(2 * total_in_args); 1647 VMRegPair tmp_vmreg; 1648 tmp_vmreg.set1(r19->as_VMReg()); 1649 1650 if (!is_critical_native) { 1651 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) { 1652 arg_order.push(i); 1653 arg_order.push(c_arg); 1654 } 1655 } else { 1656 // Compute a valid move order, using tmp_vmreg to break any cycles 1657 ComputeMoveOrder cmo(total_in_args, in_regs, total_c_args, out_regs, in_sig_bt, arg_order, tmp_vmreg); 1658 } 1659 1660 int temploc = -1; 1661 for (int ai = 0; ai < arg_order.length(); ai += 2) { 1662 int i = arg_order.at(ai); 1663 int c_arg = arg_order.at(ai + 1); 1664 __ block_comment(err_msg("move %d -> %d", i, c_arg)); 1665 if (c_arg == -1) { 1666 assert(is_critical_native, "should only be required for critical natives"); 1667 // This arg needs to be moved to a temporary 1668 __ mov(tmp_vmreg.first()->as_Register(), in_regs[i].first()->as_Register()); 1669 in_regs[i] = tmp_vmreg; 1670 temploc = i; 1671 continue; 1672 } else if (i == -1) { 1673 assert(is_critical_native, "should only be required for critical natives"); 1674 // Read from the temporary location 1675 assert(temploc != -1, "must be valid"); 1676 i = temploc; 1677 temploc = -1; 1678 } 1679 #ifdef ASSERT 1680 if (in_regs[i].first()->is_Register()) { 1681 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!"); 1682 } else if (in_regs[i].first()->is_FloatRegister()) { 1683 assert(!freg_destroyed[in_regs[i].first()->as_FloatRegister()->encoding()], "destroyed reg!"); 1684 } 1685 if (out_regs[c_arg].first()->is_Register()) { 1686 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; 1687 } else if (out_regs[c_arg].first()->is_FloatRegister()) { 1688 freg_destroyed[out_regs[c_arg].first()->as_FloatRegister()->encoding()] = true; 1689 } 1690 #endif /* ASSERT */ 1691 switch (in_sig_bt[i]) { 1692 case T_ARRAY: 1693 if (is_critical_native) { 1694 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]); 1695 c_arg++; 1696 #ifdef ASSERT 1697 if (out_regs[c_arg].first()->is_Register()) { 1698 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true; 1699 } else if (out_regs[c_arg].first()->is_FloatRegister()) { 1700 freg_destroyed[out_regs[c_arg].first()->as_FloatRegister()->encoding()] = true; 1701 } 1702 #endif 1703 int_args++; 1704 break; 1705 } 1706 case T_OBJECT: 1707 assert(!is_critical_native, "no oop arguments"); 1708 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg], 1709 ((i == 0) && (!is_static)), 1710 &receiver_offset); 1711 int_args++; 1712 break; 1713 case T_VOID: 1714 break; 1715 1716 case T_FLOAT: 1717 float_move(masm, in_regs[i], out_regs[c_arg]); 1718 float_args++; 1719 break; 1720 1721 case T_DOUBLE: 1722 assert( i + 1 < total_in_args && 1723 in_sig_bt[i + 1] == T_VOID && 1724 out_sig_bt[c_arg+1] == T_VOID, "bad arg list"); 1725 double_move(masm, in_regs[i], out_regs[c_arg]); 1726 float_args++; 1727 break; 1728 1729 case T_LONG : 1730 long_move(masm, in_regs[i], out_regs[c_arg]); 1731 int_args++; 1732 break; 1733 1734 case T_ADDRESS: assert(false, "found T_ADDRESS in java args"); 1735 1736 default: 1737 move32_64(masm, in_regs[i], out_regs[c_arg]); 1738 int_args++; 1739 } 1740 } 1741 1742 // point c_arg at the first arg that is already loaded in case we 1743 // need to spill before we call out 1744 int c_arg = total_c_args - total_in_args; 1745 1746 // Pre-load a static method's oop into c_rarg1. 1747 if (method->is_static() && !is_critical_native) { 1748 1749 // load oop into a register 1750 __ movoop(c_rarg1, 1751 JNIHandles::make_local(method->method_holder()->java_mirror()), 1752 /*immediate*/true); 1753 1754 // Now handlize the static class mirror it's known not-null. 1755 __ str(c_rarg1, Address(sp, klass_offset)); 1756 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset)); 1757 1758 // Now get the handle 1759 __ lea(c_rarg1, Address(sp, klass_offset)); 1760 // and protect the arg if we must spill 1761 c_arg--; 1762 } 1763 1764 // Change state to native (we save the return address in the thread, since it might not 1765 // be pushed on the stack when we do a a stack traversal). It is enough that the pc() 1766 // points into the right code segment. It does not have to be the correct return pc. 1767 // We use the same pc/oopMap repeatedly when we call out 1768 1769 intptr_t the_pc = (intptr_t) __ pc(); 1770 oop_maps->add_gc_map(the_pc - start, map); 1771 1772 __ set_last_Java_frame(sp, noreg, (address)the_pc, rscratch1); 1773 1774 Label dtrace_method_entry, dtrace_method_entry_done; 1775 { 1776 unsigned long offset; 1777 __ adrp(rscratch1, ExternalAddress((address)&DTraceMethodProbes), offset); 1778 __ ldrb(rscratch1, Address(rscratch1, offset)); 1779 __ cbnzw(rscratch1, dtrace_method_entry); 1780 __ bind(dtrace_method_entry_done); 1781 } 1782 1783 // RedefineClasses() tracing support for obsolete method entry 1784 if (log_is_enabled(Trace, redefine, class, obsolete)) { 1785 // protect the args we've loaded 1786 save_args(masm, total_c_args, c_arg, out_regs); 1787 __ mov_metadata(c_rarg1, method()); 1788 __ call_VM_leaf( 1789 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry), 1790 rthread, c_rarg1); 1791 restore_args(masm, total_c_args, c_arg, out_regs); 1792 } 1793 1794 // Lock a synchronized method 1795 1796 // Register definitions used by locking and unlocking 1797 1798 const Register swap_reg = r0; 1799 const Register obj_reg = r19; // Will contain the oop 1800 const Register lock_reg = r13; // Address of compiler lock object (BasicLock) 1801 const Register old_hdr = r13; // value of old header at unlock time 1802 const Register tmp = lr; 1803 1804 Label slow_path_lock; 1805 Label lock_done; 1806 1807 if (method->is_synchronized()) { 1808 assert(!is_critical_native, "unhandled"); 1809 1810 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes(); 1811 1812 // Get the handle (the 2nd argument) 1813 __ mov(oop_handle_reg, c_rarg1); 1814 1815 // Get address of the box 1816 1817 __ lea(lock_reg, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size)); 1818 1819 // Load the oop from the handle 1820 __ ldr(obj_reg, Address(oop_handle_reg, 0)); 1821 1822 oopDesc::bs()->interpreter_write_barrier(masm, obj_reg); 1823 1824 if (UseBiasedLocking) { 1825 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, tmp, false, lock_done, &slow_path_lock); 1826 } 1827 1828 // Load (object->mark() | 1) into swap_reg r0 1829 __ shenandoah_store_addr_check(obj_reg); // Access mark word 1830 __ ldr(rscratch1, Address(obj_reg, 0)); 1831 __ orr(swap_reg, rscratch1, 1); 1832 1833 // Save (object->mark() | 1) into BasicLock's displaced header 1834 __ str(swap_reg, Address(lock_reg, mark_word_offset)); 1835 1836 // src -> dest iff dest == r0 else r0 <- dest 1837 { Label here; 1838 __ cmpxchgptr(r0, lock_reg, obj_reg, rscratch1, lock_done, /*fallthrough*/NULL); 1839 } 1840 1841 // Hmm should this move to the slow path code area??? 1842 1843 // Test if the oopMark is an obvious stack pointer, i.e., 1844 // 1) (mark & 3) == 0, and 1845 // 2) sp <= mark < mark + os::pagesize() 1846 // These 3 tests can be done by evaluating the following 1847 // expression: ((mark - sp) & (3 - os::vm_page_size())), 1848 // assuming both stack pointer and pagesize have their 1849 // least significant 2 bits clear. 1850 // NOTE: the oopMark is in swap_reg %r0 as the result of cmpxchg 1851 1852 __ sub(swap_reg, sp, swap_reg); 1853 __ neg(swap_reg, swap_reg); 1854 __ ands(swap_reg, swap_reg, 3 - os::vm_page_size()); 1855 1856 // Save the test result, for recursive case, the result is zero 1857 __ str(swap_reg, Address(lock_reg, mark_word_offset)); 1858 __ br(Assembler::NE, slow_path_lock); 1859 1860 // Slow path will re-enter here 1861 1862 __ bind(lock_done); 1863 } 1864 1865 1866 // Finally just about ready to make the JNI call 1867 1868 // get JNIEnv* which is first argument to native 1869 if (!is_critical_native) { 1870 __ lea(c_rarg0, Address(rthread, in_bytes(JavaThread::jni_environment_offset()))); 1871 } 1872 1873 // Now set thread in native 1874 __ mov(rscratch1, _thread_in_native); 1875 __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset())); 1876 __ stlrw(rscratch1, rscratch2); 1877 1878 { 1879 int return_type = 0; 1880 switch (ret_type) { 1881 case T_VOID: break; 1882 return_type = 0; break; 1883 case T_CHAR: 1884 case T_BYTE: 1885 case T_SHORT: 1886 case T_INT: 1887 case T_BOOLEAN: 1888 case T_LONG: 1889 return_type = 1; break; 1890 case T_ARRAY: 1891 case T_OBJECT: 1892 return_type = 1; break; 1893 case T_FLOAT: 1894 return_type = 2; break; 1895 case T_DOUBLE: 1896 return_type = 3; break; 1897 default: 1898 ShouldNotReachHere(); 1899 } 1900 rt_call(masm, native_func, 1901 int_args + 2, // AArch64 passes up to 8 args in int registers 1902 float_args, // and up to 8 float args 1903 return_type); 1904 } 1905 1906 // Unpack native results. 1907 switch (ret_type) { 1908 case T_BOOLEAN: __ ubfx(r0, r0, 0, 8); break; 1909 case T_CHAR : __ ubfx(r0, r0, 0, 16); break; 1910 case T_BYTE : __ sbfx(r0, r0, 0, 8); break; 1911 case T_SHORT : __ sbfx(r0, r0, 0, 16); break; 1912 case T_INT : __ sbfx(r0, r0, 0, 32); break; 1913 case T_DOUBLE : 1914 case T_FLOAT : 1915 // Result is in v0 we'll save as needed 1916 break; 1917 case T_ARRAY: // Really a handle 1918 case T_OBJECT: // Really a handle 1919 break; // can't de-handlize until after safepoint check 1920 case T_VOID: break; 1921 case T_LONG: break; 1922 default : ShouldNotReachHere(); 1923 } 1924 1925 // Switch thread to "native transition" state before reading the synchronization state. 1926 // This additional state is necessary because reading and testing the synchronization 1927 // state is not atomic w.r.t. GC, as this scenario demonstrates: 1928 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted. 1929 // VM thread changes sync state to synchronizing and suspends threads for GC. 1930 // Thread A is resumed to finish this native method, but doesn't block here since it 1931 // didn't see any synchronization is progress, and escapes. 1932 __ mov(rscratch1, _thread_in_native_trans); 1933 1934 if(os::is_MP()) { 1935 if (UseMembar) { 1936 __ strw(rscratch1, Address(rthread, JavaThread::thread_state_offset())); 1937 1938 // Force this write out before the read below 1939 __ dmb(Assembler::SY); 1940 } else { 1941 __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset())); 1942 __ stlrw(rscratch1, rscratch2); 1943 1944 // Write serialization page so VM thread can do a pseudo remote membar. 1945 // We use the current thread pointer to calculate a thread specific 1946 // offset to write to within the page. This minimizes bus traffic 1947 // due to cache line collision. 1948 __ serialize_memory(rthread, r2); 1949 } 1950 } 1951 1952 // check for safepoint operation in progress and/or pending suspend requests 1953 Label safepoint_in_progress, safepoint_in_progress_done; 1954 { 1955 assert(SafepointSynchronize::_not_synchronized == 0, "fix this code"); 1956 unsigned long offset; 1957 __ adrp(rscratch1, 1958 ExternalAddress((address)SafepointSynchronize::address_of_state()), 1959 offset); 1960 __ ldrw(rscratch1, Address(rscratch1, offset)); 1961 __ cbnzw(rscratch1, safepoint_in_progress); 1962 __ ldrw(rscratch1, Address(rthread, JavaThread::suspend_flags_offset())); 1963 __ cbnzw(rscratch1, safepoint_in_progress); 1964 __ bind(safepoint_in_progress_done); 1965 } 1966 1967 // change thread state 1968 Label after_transition; 1969 __ mov(rscratch1, _thread_in_Java); 1970 __ lea(rscratch2, Address(rthread, JavaThread::thread_state_offset())); 1971 __ stlrw(rscratch1, rscratch2); 1972 __ bind(after_transition); 1973 1974 Label reguard; 1975 Label reguard_done; 1976 __ ldrb(rscratch1, Address(rthread, JavaThread::stack_guard_state_offset())); 1977 __ cmpw(rscratch1, JavaThread::stack_guard_yellow_reserved_disabled); 1978 __ br(Assembler::EQ, reguard); 1979 __ bind(reguard_done); 1980 1981 // native result if any is live 1982 1983 // Unlock 1984 Label unlock_done; 1985 Label slow_path_unlock; 1986 if (method->is_synchronized()) { 1987 1988 // Get locked oop from the handle we passed to jni 1989 __ ldr(obj_reg, Address(oop_handle_reg, 0)); 1990 oopDesc::bs()->interpreter_write_barrier(masm, obj_reg); 1991 1992 Label done; 1993 1994 __ shenandoah_store_addr_check(obj_reg); 1995 1996 if (UseBiasedLocking) { 1997 __ biased_locking_exit(obj_reg, old_hdr, done); 1998 } 1999 2000 // Simple recursive lock? 2001 2002 __ ldr(rscratch1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size)); 2003 __ cbz(rscratch1, done); 2004 2005 // Must save r0 if if it is live now because cmpxchg must use it 2006 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { 2007 save_native_result(masm, ret_type, stack_slots); 2008 } 2009 2010 2011 // get address of the stack lock 2012 __ lea(r0, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size)); 2013 // get old displaced header 2014 __ ldr(old_hdr, Address(r0, 0)); 2015 2016 // Atomic swap old header if oop still contains the stack lock 2017 Label succeed; 2018 __ cmpxchgptr(r0, old_hdr, obj_reg, rscratch1, succeed, &slow_path_unlock); 2019 __ bind(succeed); 2020 2021 // slow path re-enters here 2022 __ bind(unlock_done); 2023 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) { 2024 restore_native_result(masm, ret_type, stack_slots); 2025 } 2026 2027 __ bind(done); 2028 } 2029 2030 Label dtrace_method_exit, dtrace_method_exit_done; 2031 { 2032 unsigned long offset; 2033 __ adrp(rscratch1, ExternalAddress((address)&DTraceMethodProbes), offset); 2034 __ ldrb(rscratch1, Address(rscratch1, offset)); 2035 __ cbnzw(rscratch1, dtrace_method_exit); 2036 __ bind(dtrace_method_exit_done); 2037 } 2038 2039 __ reset_last_Java_frame(false); 2040 2041 // Unpack oop result 2042 if (ret_type == T_OBJECT || ret_type == T_ARRAY) { 2043 Label L; 2044 __ cbz(r0, L); 2045 __ ldr(r0, Address(r0, 0)); 2046 __ bind(L); 2047 __ verify_oop(r0); 2048 } 2049 2050 if (!is_critical_native) { 2051 // reset handle block 2052 __ ldr(r2, Address(rthread, JavaThread::active_handles_offset())); 2053 __ str(zr, Address(r2, JNIHandleBlock::top_offset_in_bytes())); 2054 } 2055 2056 __ leave(); 2057 2058 if (!is_critical_native) { 2059 // Any exception pending? 2060 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 2061 __ cbnz(rscratch1, exception_pending); 2062 } 2063 2064 // record exit from native wrapper code 2065 if (NotifySimulator) { 2066 __ notify(Assembler::method_reentry); 2067 } 2068 2069 // We're done 2070 __ ret(lr); 2071 2072 // Unexpected paths are out of line and go here 2073 2074 if (!is_critical_native) { 2075 // forward the exception 2076 __ bind(exception_pending); 2077 2078 // and forward the exception 2079 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 2080 } 2081 2082 // Slow path locking & unlocking 2083 if (method->is_synchronized()) { 2084 2085 __ block_comment("Slow path lock {"); 2086 __ bind(slow_path_lock); 2087 2088 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM 2089 // args are (oop obj, BasicLock* lock, JavaThread* thread) 2090 2091 // protect the args we've loaded 2092 save_args(masm, total_c_args, c_arg, out_regs); 2093 2094 __ mov(c_rarg0, obj_reg); 2095 __ mov(c_rarg1, lock_reg); 2096 __ mov(c_rarg2, rthread); 2097 2098 // Not a leaf but we have last_Java_frame setup as we want 2099 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3); 2100 restore_args(masm, total_c_args, c_arg, out_regs); 2101 2102 #ifdef ASSERT 2103 { Label L; 2104 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 2105 __ cbz(rscratch1, L); 2106 __ stop("no pending exception allowed on exit from monitorenter"); 2107 __ bind(L); 2108 } 2109 #endif 2110 __ b(lock_done); 2111 2112 __ block_comment("} Slow path lock"); 2113 2114 __ block_comment("Slow path unlock {"); 2115 __ bind(slow_path_unlock); 2116 2117 // If we haven't already saved the native result we must save it now as xmm registers 2118 // are still exposed. 2119 2120 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { 2121 save_native_result(masm, ret_type, stack_slots); 2122 } 2123 2124 __ mov(c_rarg2, rthread); 2125 __ lea(c_rarg1, Address(sp, lock_slot_offset * VMRegImpl::stack_slot_size)); 2126 __ mov(c_rarg0, obj_reg); 2127 2128 // Save pending exception around call to VM (which contains an EXCEPTION_MARK) 2129 // NOTE that obj_reg == r19 currently 2130 __ ldr(r19, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 2131 __ str(zr, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 2132 2133 rt_call(masm, CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C), 3, 0, 1); 2134 2135 #ifdef ASSERT 2136 { 2137 Label L; 2138 __ ldr(rscratch1, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 2139 __ cbz(rscratch1, L); 2140 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C"); 2141 __ bind(L); 2142 } 2143 #endif /* ASSERT */ 2144 2145 __ str(r19, Address(rthread, in_bytes(Thread::pending_exception_offset()))); 2146 2147 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) { 2148 restore_native_result(masm, ret_type, stack_slots); 2149 } 2150 __ b(unlock_done); 2151 2152 __ block_comment("} Slow path unlock"); 2153 2154 } // synchronized 2155 2156 // SLOW PATH Reguard the stack if needed 2157 2158 __ bind(reguard); 2159 save_native_result(masm, ret_type, stack_slots); 2160 rt_call(masm, CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages), 0, 0, 0); 2161 restore_native_result(masm, ret_type, stack_slots); 2162 // and continue 2163 __ b(reguard_done); 2164 2165 // SLOW PATH safepoint 2166 { 2167 __ block_comment("safepoint {"); 2168 __ bind(safepoint_in_progress); 2169 2170 // Don't use call_VM as it will see a possible pending exception and forward it 2171 // and never return here preventing us from clearing _last_native_pc down below. 2172 // 2173 save_native_result(masm, ret_type, stack_slots); 2174 __ mov(c_rarg0, rthread); 2175 #ifndef PRODUCT 2176 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area"); 2177 #endif 2178 if (!is_critical_native) { 2179 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans))); 2180 } else { 2181 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition))); 2182 } 2183 __ blrt(rscratch1, 1, 0, 1); 2184 __ maybe_isb(); 2185 // Restore any method result value 2186 restore_native_result(masm, ret_type, stack_slots); 2187 2188 if (is_critical_native) { 2189 // The call above performed the transition to thread_in_Java so 2190 // skip the transition logic above. 2191 __ b(after_transition); 2192 } 2193 2194 __ b(safepoint_in_progress_done); 2195 __ block_comment("} safepoint"); 2196 } 2197 2198 // SLOW PATH dtrace support 2199 { 2200 __ block_comment("dtrace entry {"); 2201 __ bind(dtrace_method_entry); 2202 2203 // We have all of the arguments setup at this point. We must not touch any register 2204 // argument registers at this point (what if we save/restore them there are no oop? 2205 2206 save_args(masm, total_c_args, c_arg, out_regs); 2207 __ mov_metadata(c_rarg1, method()); 2208 __ call_VM_leaf( 2209 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry), 2210 rthread, c_rarg1); 2211 restore_args(masm, total_c_args, c_arg, out_regs); 2212 __ b(dtrace_method_entry_done); 2213 __ block_comment("} dtrace entry"); 2214 } 2215 2216 { 2217 __ block_comment("dtrace exit {"); 2218 __ bind(dtrace_method_exit); 2219 save_native_result(masm, ret_type, stack_slots); 2220 __ mov_metadata(c_rarg1, method()); 2221 __ call_VM_leaf( 2222 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit), 2223 rthread, c_rarg1); 2224 restore_native_result(masm, ret_type, stack_slots); 2225 __ b(dtrace_method_exit_done); 2226 __ block_comment("} dtrace exit"); 2227 } 2228 2229 2230 __ flush(); 2231 2232 nmethod *nm = nmethod::new_native_nmethod(method, 2233 compile_id, 2234 masm->code(), 2235 vep_offset, 2236 frame_complete, 2237 stack_slots / VMRegImpl::slots_per_word, 2238 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)), 2239 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size), 2240 oop_maps); 2241 2242 if (is_critical_native) { 2243 nm->set_lazy_critical_native(true); 2244 } 2245 2246 return nm; 2247 2248 } 2249 2250 // this function returns the adjust size (in number of words) to a c2i adapter 2251 // activation for use during deoptimization 2252 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) { 2253 assert(callee_locals >= callee_parameters, 2254 "test and remove; got more parms than locals"); 2255 if (callee_locals < callee_parameters) 2256 return 0; // No adjustment for negative locals 2257 int diff = (callee_locals - callee_parameters) * Interpreter::stackElementWords; 2258 // diff is counted in stack words 2259 return round_to(diff, 2); 2260 } 2261 2262 2263 //------------------------------generate_deopt_blob---------------------------- 2264 void SharedRuntime::generate_deopt_blob() { 2265 // Allocate space for the code 2266 ResourceMark rm; 2267 // Setup code generation tools 2268 int pad = 0; 2269 #if INCLUDE_JVMCI 2270 if (EnableJVMCI) { 2271 pad += 512; // Increase the buffer size when compiling for JVMCI 2272 } 2273 #endif 2274 CodeBuffer buffer("deopt_blob", 2048+pad, 1024); 2275 MacroAssembler* masm = new MacroAssembler(&buffer); 2276 int frame_size_in_words; 2277 OopMap* map = NULL; 2278 OopMapSet *oop_maps = new OopMapSet(); 2279 2280 #ifdef BUILTIN_SIM 2281 AArch64Simulator *simulator; 2282 if (NotifySimulator) { 2283 simulator = AArch64Simulator::get_current(UseSimulatorCache, DisableBCCheck); 2284 simulator->notifyCompile(const_cast<char*>("SharedRuntime::deopt_blob"), __ pc()); 2285 } 2286 #endif 2287 2288 // ------------- 2289 // This code enters when returning to a de-optimized nmethod. A return 2290 // address has been pushed on the the stack, and return values are in 2291 // registers. 2292 // If we are doing a normal deopt then we were called from the patched 2293 // nmethod from the point we returned to the nmethod. So the return 2294 // address on the stack is wrong by NativeCall::instruction_size 2295 // We will adjust the value so it looks like we have the original return 2296 // address on the stack (like when we eagerly deoptimized). 2297 // In the case of an exception pending when deoptimizing, we enter 2298 // with a return address on the stack that points after the call we patched 2299 // into the exception handler. We have the following register state from, 2300 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp). 2301 // r0: exception oop 2302 // r19: exception handler 2303 // r3: throwing pc 2304 // So in this case we simply jam r3 into the useless return address and 2305 // the stack looks just like we want. 2306 // 2307 // At this point we need to de-opt. We save the argument return 2308 // registers. We call the first C routine, fetch_unroll_info(). This 2309 // routine captures the return values and returns a structure which 2310 // describes the current frame size and the sizes of all replacement frames. 2311 // The current frame is compiled code and may contain many inlined 2312 // functions, each with their own JVM state. We pop the current frame, then 2313 // push all the new frames. Then we call the C routine unpack_frames() to 2314 // populate these frames. Finally unpack_frames() returns us the new target 2315 // address. Notice that callee-save registers are BLOWN here; they have 2316 // already been captured in the vframeArray at the time the return PC was 2317 // patched. 2318 address start = __ pc(); 2319 Label cont; 2320 2321 // Prolog for non exception case! 2322 2323 // Save everything in sight. 2324 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); 2325 2326 // Normal deoptimization. Save exec mode for unpack_frames. 2327 __ movw(rcpool, Deoptimization::Unpack_deopt); // callee-saved 2328 __ b(cont); 2329 2330 int reexecute_offset = __ pc() - start; 2331 #if defined(INCLUDE_JVMCI) && !defined(COMPILER1) 2332 if (EnableJVMCI && UseJVMCICompiler) { 2333 // JVMCI does not use this kind of deoptimization 2334 __ should_not_reach_here(); 2335 } 2336 #endif 2337 2338 // Reexecute case 2339 // return address is the pc describes what bci to do re-execute at 2340 2341 // No need to update map as each call to save_live_registers will produce identical oopmap 2342 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); 2343 2344 __ movw(rcpool, Deoptimization::Unpack_reexecute); // callee-saved 2345 __ b(cont); 2346 2347 #if INCLUDE_JVMCI 2348 Label after_fetch_unroll_info_call; 2349 int implicit_exception_uncommon_trap_offset = 0; 2350 int uncommon_trap_offset = 0; 2351 2352 if (EnableJVMCI) { 2353 implicit_exception_uncommon_trap_offset = __ pc() - start; 2354 2355 __ ldr(lr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset()))); 2356 __ str(zr, Address(rthread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset()))); 2357 2358 uncommon_trap_offset = __ pc() - start; 2359 2360 // Save everything in sight. 2361 RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); 2362 // fetch_unroll_info needs to call last_java_frame() 2363 Label retaddr; 2364 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1); 2365 2366 __ ldrw(c_rarg1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset()))); 2367 __ movw(rscratch1, -1); 2368 __ strw(rscratch1, Address(rthread, in_bytes(JavaThread::pending_deoptimization_offset()))); 2369 2370 __ movw(rcpool, (int32_t)Deoptimization::Unpack_reexecute); 2371 __ mov(c_rarg0, rthread); 2372 __ lea(rscratch1, 2373 RuntimeAddress(CAST_FROM_FN_PTR(address, 2374 Deoptimization::uncommon_trap))); 2375 __ blrt(rscratch1, 2, 0, MacroAssembler::ret_type_integral); 2376 __ bind(retaddr); 2377 oop_maps->add_gc_map( __ pc()-start, map->deep_copy()); 2378 2379 __ reset_last_Java_frame(false); 2380 2381 __ b(after_fetch_unroll_info_call); 2382 } // EnableJVMCI 2383 #endif // INCLUDE_JVMCI 2384 2385 int exception_offset = __ pc() - start; 2386 2387 // Prolog for exception case 2388 2389 // all registers are dead at this entry point, except for r0, and 2390 // r3 which contain the exception oop and exception pc 2391 // respectively. Set them in TLS and fall thru to the 2392 // unpack_with_exception_in_tls entry point. 2393 2394 __ str(r3, Address(rthread, JavaThread::exception_pc_offset())); 2395 __ str(r0, Address(rthread, JavaThread::exception_oop_offset())); 2396 2397 int exception_in_tls_offset = __ pc() - start; 2398 2399 // new implementation because exception oop is now passed in JavaThread 2400 2401 // Prolog for exception case 2402 // All registers must be preserved because they might be used by LinearScan 2403 // Exceptiop oop and throwing PC are passed in JavaThread 2404 // tos: stack at point of call to method that threw the exception (i.e. only 2405 // args are on the stack, no return address) 2406 2407 // The return address pushed by save_live_registers will be patched 2408 // later with the throwing pc. The correct value is not available 2409 // now because loading it from memory would destroy registers. 2410 2411 // NB: The SP at this point must be the SP of the method that is 2412 // being deoptimized. Deoptimization assumes that the frame created 2413 // here by save_live_registers is immediately below the method's SP. 2414 // This is a somewhat fragile mechanism. 2415 2416 // Save everything in sight. 2417 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); 2418 2419 // Now it is safe to overwrite any register 2420 2421 // Deopt during an exception. Save exec mode for unpack_frames. 2422 __ mov(rcpool, Deoptimization::Unpack_exception); // callee-saved 2423 2424 // load throwing pc from JavaThread and patch it as the return address 2425 // of the current frame. Then clear the field in JavaThread 2426 2427 __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset())); 2428 __ str(r3, Address(rfp, wordSize)); 2429 __ str(zr, Address(rthread, JavaThread::exception_pc_offset())); 2430 2431 #ifdef ASSERT 2432 // verify that there is really an exception oop in JavaThread 2433 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset())); 2434 __ verify_oop(r0); 2435 2436 // verify that there is no pending exception 2437 Label no_pending_exception; 2438 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset())); 2439 __ cbz(rscratch1, no_pending_exception); 2440 __ stop("must not have pending exception here"); 2441 __ bind(no_pending_exception); 2442 #endif 2443 2444 __ bind(cont); 2445 2446 // Call C code. Need thread and this frame, but NOT official VM entry 2447 // crud. We cannot block on this call, no GC can happen. 2448 // 2449 // UnrollBlock* fetch_unroll_info(JavaThread* thread) 2450 2451 // fetch_unroll_info needs to call last_java_frame(). 2452 2453 Label retaddr; 2454 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1); 2455 #ifdef ASSERT0 2456 { Label L; 2457 __ ldr(rscratch1, Address(rthread, 2458 JavaThread::last_Java_fp_offset())); 2459 __ cbz(rscratch1, L); 2460 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared"); 2461 __ bind(L); 2462 } 2463 #endif // ASSERT 2464 __ mov(c_rarg0, rthread); 2465 __ mov(c_rarg1, rcpool); 2466 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info))); 2467 __ blrt(rscratch1, 1, 0, 1); 2468 __ bind(retaddr); 2469 2470 // Need to have an oopmap that tells fetch_unroll_info where to 2471 // find any register it might need. 2472 oop_maps->add_gc_map(__ pc() - start, map); 2473 2474 __ reset_last_Java_frame(false); 2475 2476 #if INCLUDE_JVMCI 2477 if (EnableJVMCI) { 2478 __ bind(after_fetch_unroll_info_call); 2479 } 2480 #endif 2481 2482 // Load UnrollBlock* into r5 2483 __ mov(r5, r0); 2484 2485 __ ldrw(rcpool, Address(r5, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes())); 2486 Label noException; 2487 __ cmpw(rcpool, Deoptimization::Unpack_exception); // Was exception pending? 2488 __ br(Assembler::NE, noException); 2489 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset())); 2490 // QQQ this is useless it was NULL above 2491 __ ldr(r3, Address(rthread, JavaThread::exception_pc_offset())); 2492 __ str(zr, Address(rthread, JavaThread::exception_oop_offset())); 2493 __ str(zr, Address(rthread, JavaThread::exception_pc_offset())); 2494 2495 __ verify_oop(r0); 2496 2497 // Overwrite the result registers with the exception results. 2498 __ str(r0, Address(sp, RegisterSaver::r0_offset_in_bytes())); 2499 // I think this is useless 2500 // __ str(r3, Address(sp, RegisterSaver::r3_offset_in_bytes())); 2501 2502 __ bind(noException); 2503 2504 // Only register save data is on the stack. 2505 // Now restore the result registers. Everything else is either dead 2506 // or captured in the vframeArray. 2507 RegisterSaver::restore_result_registers(masm); 2508 2509 // All of the register save area has been popped of the stack. Only the 2510 // return address remains. 2511 2512 // Pop all the frames we must move/replace. 2513 // 2514 // Frame picture (youngest to oldest) 2515 // 1: self-frame (no frame link) 2516 // 2: deopting frame (no frame link) 2517 // 3: caller of deopting frame (could be compiled/interpreted). 2518 // 2519 // Note: by leaving the return address of self-frame on the stack 2520 // and using the size of frame 2 to adjust the stack 2521 // when we are done the return to frame 3 will still be on the stack. 2522 2523 // Pop deoptimized frame 2524 __ ldrw(r2, Address(r5, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes())); 2525 __ sub(r2, r2, 2 * wordSize); 2526 __ add(sp, sp, r2); 2527 __ ldp(rfp, lr, __ post(sp, 2 * wordSize)); 2528 // LR should now be the return address to the caller (3) 2529 2530 #ifdef ASSERT 2531 // Compilers generate code that bang the stack by as much as the 2532 // interpreter would need. So this stack banging should never 2533 // trigger a fault. Verify that it does not on non product builds. 2534 if (UseStackBanging) { 2535 __ ldrw(r19, Address(r5, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes())); 2536 __ bang_stack_size(r19, r2); 2537 } 2538 #endif 2539 // Load address of array of frame pcs into r2 2540 __ ldr(r2, Address(r5, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); 2541 2542 // Trash the old pc 2543 // __ addptr(sp, wordSize); FIXME ???? 2544 2545 // Load address of array of frame sizes into r4 2546 __ ldr(r4, Address(r5, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes())); 2547 2548 // Load counter into r3 2549 __ ldrw(r3, Address(r5, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes())); 2550 2551 // Now adjust the caller's stack to make up for the extra locals 2552 // but record the original sp so that we can save it in the skeletal interpreter 2553 // frame and the stack walking of interpreter_sender will get the unextended sp 2554 // value and not the "real" sp value. 2555 2556 const Register sender_sp = r6; 2557 2558 __ mov(sender_sp, sp); 2559 __ ldrw(r19, Address(r5, 2560 Deoptimization::UnrollBlock:: 2561 caller_adjustment_offset_in_bytes())); 2562 __ sub(sp, sp, r19); 2563 2564 // Push interpreter frames in a loop 2565 __ mov(rscratch1, 0xDEADDEADul); // Make a recognizable pattern 2566 __ mov(rscratch2, rscratch1); 2567 Label loop; 2568 __ bind(loop); 2569 __ ldr(r19, Address(__ post(r4, wordSize))); // Load frame size 2570 __ sub(r19, r19, 2*wordSize); // We'll push pc and fp by hand 2571 __ ldr(lr, Address(__ post(r2, wordSize))); // Load pc 2572 __ enter(); // Save old & set new fp 2573 __ sub(sp, sp, r19); // Prolog 2574 // This value is corrected by layout_activation_impl 2575 __ str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize)); 2576 __ str(sender_sp, Address(rfp, frame::interpreter_frame_sender_sp_offset * wordSize)); // Make it walkable 2577 __ mov(sender_sp, sp); // Pass sender_sp to next frame 2578 __ sub(r3, r3, 1); // Decrement counter 2579 __ cbnz(r3, loop); 2580 2581 // Re-push self-frame 2582 __ ldr(lr, Address(r2)); 2583 __ enter(); 2584 2585 // Allocate a full sized register save area. We subtract 2 because 2586 // enter() just pushed 2 words 2587 __ sub(sp, sp, (frame_size_in_words - 2) * wordSize); 2588 2589 // Restore frame locals after moving the frame 2590 __ strd(v0, Address(sp, RegisterSaver::v0_offset_in_bytes())); 2591 __ str(r0, Address(sp, RegisterSaver::r0_offset_in_bytes())); 2592 2593 // Call C code. Need thread but NOT official VM entry 2594 // crud. We cannot block on this call, no GC can happen. Call should 2595 // restore return values to their stack-slots with the new SP. 2596 // 2597 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode) 2598 2599 // Use rfp because the frames look interpreted now 2600 // Don't need the precise return PC here, just precise enough to point into this code blob. 2601 address the_pc = __ pc(); 2602 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1); 2603 2604 __ mov(c_rarg0, rthread); 2605 __ movw(c_rarg1, rcpool); // second arg: exec_mode 2606 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); 2607 __ blrt(rscratch1, 2, 0, 0); 2608 2609 // Set an oopmap for the call site 2610 // Use the same PC we used for the last java frame 2611 oop_maps->add_gc_map(the_pc - start, 2612 new OopMap( frame_size_in_words, 0 )); 2613 2614 // Clear fp AND pc 2615 __ reset_last_Java_frame(true); 2616 2617 // Collect return values 2618 __ ldrd(v0, Address(sp, RegisterSaver::v0_offset_in_bytes())); 2619 __ ldr(r0, Address(sp, RegisterSaver::r0_offset_in_bytes())); 2620 // I think this is useless (throwing pc?) 2621 // __ ldr(r3, Address(sp, RegisterSaver::r3_offset_in_bytes())); 2622 2623 // Pop self-frame. 2624 __ leave(); // Epilog 2625 2626 // Jump to interpreter 2627 __ ret(lr); 2628 2629 // Make sure all code is generated 2630 masm->flush(); 2631 2632 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words); 2633 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset); 2634 #if INCLUDE_JVMCI 2635 if (EnableJVMCI) { 2636 _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset); 2637 _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset); 2638 } 2639 #endif 2640 #ifdef BUILTIN_SIM 2641 if (NotifySimulator) { 2642 unsigned char *base = _deopt_blob->code_begin(); 2643 simulator->notifyRelocate(start, base - start); 2644 } 2645 #endif 2646 } 2647 2648 uint SharedRuntime::out_preserve_stack_slots() { 2649 return 0; 2650 } 2651 2652 #if defined(COMPILER2) || INCLUDE_JVMCI 2653 //------------------------------generate_uncommon_trap_blob-------------------- 2654 void SharedRuntime::generate_uncommon_trap_blob() { 2655 // Allocate space for the code 2656 ResourceMark rm; 2657 // Setup code generation tools 2658 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024); 2659 MacroAssembler* masm = new MacroAssembler(&buffer); 2660 2661 #ifdef BUILTIN_SIM 2662 AArch64Simulator *simulator; 2663 if (NotifySimulator) { 2664 simulator = AArch64Simulator::get_current(UseSimulatorCache, DisableBCCheck); 2665 simulator->notifyCompile(const_cast<char*>("SharedRuntime:uncommon_trap_blob"), __ pc()); 2666 } 2667 #endif 2668 2669 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); 2670 2671 address start = __ pc(); 2672 2673 // Push self-frame. We get here with a return address in LR 2674 // and sp should be 16 byte aligned 2675 // push rfp and retaddr by hand 2676 __ stp(rfp, lr, Address(__ pre(sp, -2 * wordSize))); 2677 // we don't expect an arg reg save area 2678 #ifndef PRODUCT 2679 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area"); 2680 #endif 2681 // compiler left unloaded_class_index in j_rarg0 move to where the 2682 // runtime expects it. 2683 if (c_rarg1 != j_rarg0) { 2684 __ movw(c_rarg1, j_rarg0); 2685 } 2686 2687 // we need to set the past SP to the stack pointer of the stub frame 2688 // and the pc to the address where this runtime call will return 2689 // although actually any pc in this code blob will do). 2690 Label retaddr; 2691 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1); 2692 2693 // Call C code. Need thread but NOT official VM entry 2694 // crud. We cannot block on this call, no GC can happen. Call should 2695 // capture callee-saved registers as well as return values. 2696 // Thread is in rdi already. 2697 // 2698 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index); 2699 // 2700 // n.b. 2 gp args, 0 fp args, integral return type 2701 2702 __ mov(c_rarg0, rthread); 2703 __ movw(c_rarg2, (unsigned)Deoptimization::Unpack_uncommon_trap); 2704 __ lea(rscratch1, 2705 RuntimeAddress(CAST_FROM_FN_PTR(address, 2706 Deoptimization::uncommon_trap))); 2707 __ blrt(rscratch1, 2, 0, MacroAssembler::ret_type_integral); 2708 __ bind(retaddr); 2709 2710 // Set an oopmap for the call site 2711 OopMapSet* oop_maps = new OopMapSet(); 2712 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0); 2713 2714 // location of rfp is known implicitly by the frame sender code 2715 2716 oop_maps->add_gc_map(__ pc() - start, map); 2717 2718 __ reset_last_Java_frame(false); 2719 2720 // move UnrollBlock* into r4 2721 __ mov(r4, r0); 2722 2723 #ifdef ASSERT 2724 { Label L; 2725 __ ldrw(rscratch1, Address(r4, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes())); 2726 __ cmpw(rscratch1, (unsigned)Deoptimization::Unpack_uncommon_trap); 2727 __ br(Assembler::EQ, L); 2728 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared"); 2729 __ bind(L); 2730 } 2731 #endif 2732 2733 // Pop all the frames we must move/replace. 2734 // 2735 // Frame picture (youngest to oldest) 2736 // 1: self-frame (no frame link) 2737 // 2: deopting frame (no frame link) 2738 // 3: caller of deopting frame (could be compiled/interpreted). 2739 2740 // Pop self-frame. We have no frame, and must rely only on r0 and sp. 2741 __ add(sp, sp, (SimpleRuntimeFrame::framesize) << LogBytesPerInt); // Epilog! 2742 2743 // Pop deoptimized frame (int) 2744 __ ldrw(r2, Address(r4, 2745 Deoptimization::UnrollBlock:: 2746 size_of_deoptimized_frame_offset_in_bytes())); 2747 __ sub(r2, r2, 2 * wordSize); 2748 __ add(sp, sp, r2); 2749 __ ldp(rfp, lr, __ post(sp, 2 * wordSize)); 2750 // LR should now be the return address to the caller (3) frame 2751 2752 #ifdef ASSERT 2753 // Compilers generate code that bang the stack by as much as the 2754 // interpreter would need. So this stack banging should never 2755 // trigger a fault. Verify that it does not on non product builds. 2756 if (UseStackBanging) { 2757 __ ldrw(r1, Address(r4, 2758 Deoptimization::UnrollBlock:: 2759 total_frame_sizes_offset_in_bytes())); 2760 __ bang_stack_size(r1, r2); 2761 } 2762 #endif 2763 2764 // Load address of array of frame pcs into r2 (address*) 2765 __ ldr(r2, Address(r4, 2766 Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes())); 2767 2768 // Load address of array of frame sizes into r5 (intptr_t*) 2769 __ ldr(r5, Address(r4, 2770 Deoptimization::UnrollBlock:: 2771 frame_sizes_offset_in_bytes())); 2772 2773 // Counter 2774 __ ldrw(r3, Address(r4, 2775 Deoptimization::UnrollBlock:: 2776 number_of_frames_offset_in_bytes())); // (int) 2777 2778 // Now adjust the caller's stack to make up for the extra locals but 2779 // record the original sp so that we can save it in the skeletal 2780 // interpreter frame and the stack walking of interpreter_sender 2781 // will get the unextended sp value and not the "real" sp value. 2782 2783 const Register sender_sp = r8; 2784 2785 __ mov(sender_sp, sp); 2786 __ ldrw(r1, Address(r4, 2787 Deoptimization::UnrollBlock:: 2788 caller_adjustment_offset_in_bytes())); // (int) 2789 __ sub(sp, sp, r1); 2790 2791 // Push interpreter frames in a loop 2792 Label loop; 2793 __ bind(loop); 2794 __ ldr(r1, Address(r5, 0)); // Load frame size 2795 __ sub(r1, r1, 2 * wordSize); // We'll push pc and rfp by hand 2796 __ ldr(lr, Address(r2, 0)); // Save return address 2797 __ enter(); // and old rfp & set new rfp 2798 __ sub(sp, sp, r1); // Prolog 2799 __ str(sender_sp, Address(rfp, frame::interpreter_frame_sender_sp_offset * wordSize)); // Make it walkable 2800 // This value is corrected by layout_activation_impl 2801 __ str(zr, Address(rfp, frame::interpreter_frame_last_sp_offset * wordSize)); 2802 __ mov(sender_sp, sp); // Pass sender_sp to next frame 2803 __ add(r5, r5, wordSize); // Bump array pointer (sizes) 2804 __ add(r2, r2, wordSize); // Bump array pointer (pcs) 2805 __ subsw(r3, r3, 1); // Decrement counter 2806 __ br(Assembler::GT, loop); 2807 __ ldr(lr, Address(r2, 0)); // save final return address 2808 // Re-push self-frame 2809 __ enter(); // & old rfp & set new rfp 2810 2811 // Use rfp because the frames look interpreted now 2812 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP. 2813 // Don't need the precise return PC here, just precise enough to point into this code blob. 2814 address the_pc = __ pc(); 2815 __ set_last_Java_frame(sp, rfp, the_pc, rscratch1); 2816 2817 // Call C code. Need thread but NOT official VM entry 2818 // crud. We cannot block on this call, no GC can happen. Call should 2819 // restore return values to their stack-slots with the new SP. 2820 // Thread is in rdi already. 2821 // 2822 // BasicType unpack_frames(JavaThread* thread, int exec_mode); 2823 // 2824 // n.b. 2 gp args, 0 fp args, integral return type 2825 2826 // sp should already be aligned 2827 __ mov(c_rarg0, rthread); 2828 __ movw(c_rarg1, (unsigned)Deoptimization::Unpack_uncommon_trap); 2829 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames))); 2830 __ blrt(rscratch1, 2, 0, MacroAssembler::ret_type_integral); 2831 2832 // Set an oopmap for the call site 2833 // Use the same PC we used for the last java frame 2834 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); 2835 2836 // Clear fp AND pc 2837 __ reset_last_Java_frame(true); 2838 2839 // Pop self-frame. 2840 __ leave(); // Epilog 2841 2842 // Jump to interpreter 2843 __ ret(lr); 2844 2845 // Make sure all code is generated 2846 masm->flush(); 2847 2848 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, 2849 SimpleRuntimeFrame::framesize >> 1); 2850 2851 #ifdef BUILTIN_SIM 2852 if (NotifySimulator) { 2853 unsigned char *base = _deopt_blob->code_begin(); 2854 simulator->notifyRelocate(start, base - start); 2855 } 2856 #endif 2857 } 2858 #endif // COMPILER2 2859 2860 2861 //------------------------------generate_handler_blob------ 2862 // 2863 // Generate a special Compile2Runtime blob that saves all registers, 2864 // and setup oopmap. 2865 // 2866 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) { 2867 ResourceMark rm; 2868 OopMapSet *oop_maps = new OopMapSet(); 2869 OopMap* map; 2870 2871 // Allocate space for the code. Setup code generation tools. 2872 CodeBuffer buffer("handler_blob", 2048, 1024); 2873 MacroAssembler* masm = new MacroAssembler(&buffer); 2874 2875 address start = __ pc(); 2876 address call_pc = NULL; 2877 int frame_size_in_words; 2878 bool cause_return = (poll_type == POLL_AT_RETURN); 2879 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP); 2880 2881 // Save registers, fpu state, and flags 2882 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words, save_vectors); 2883 2884 // The following is basically a call_VM. However, we need the precise 2885 // address of the call in order to generate an oopmap. Hence, we do all the 2886 // work outselves. 2887 2888 Label retaddr; 2889 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1); 2890 2891 // The return address must always be correct so that frame constructor never 2892 // sees an invalid pc. 2893 2894 if (!cause_return) { 2895 // overwrite the return address pushed by save_live_registers 2896 __ ldr(c_rarg0, Address(rthread, JavaThread::saved_exception_pc_offset())); 2897 __ str(c_rarg0, Address(rfp, wordSize)); 2898 } 2899 2900 // Do the call 2901 __ mov(c_rarg0, rthread); 2902 __ lea(rscratch1, RuntimeAddress(call_ptr)); 2903 __ blrt(rscratch1, 1, 0, 1); 2904 __ bind(retaddr); 2905 2906 // Set an oopmap for the call site. This oopmap will map all 2907 // oop-registers and debug-info registers as callee-saved. This 2908 // will allow deoptimization at this safepoint to find all possible 2909 // debug-info recordings, as well as let GC find all oops. 2910 2911 oop_maps->add_gc_map( __ pc() - start, map); 2912 2913 Label noException; 2914 2915 __ reset_last_Java_frame(false); 2916 2917 __ maybe_isb(); 2918 __ membar(Assembler::LoadLoad | Assembler::LoadStore); 2919 2920 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset())); 2921 __ cbz(rscratch1, noException); 2922 2923 // Exception pending 2924 2925 RegisterSaver::restore_live_registers(masm); 2926 2927 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 2928 2929 // No exception case 2930 __ bind(noException); 2931 2932 // Normal exit, restore registers and exit. 2933 RegisterSaver::restore_live_registers(masm, save_vectors); 2934 2935 __ ret(lr); 2936 2937 // Make sure all code is generated 2938 masm->flush(); 2939 2940 // Fill-out other meta info 2941 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words); 2942 } 2943 2944 // 2945 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss 2946 // 2947 // Generate a stub that calls into vm to find out the proper destination 2948 // of a java call. All the argument registers are live at this point 2949 // but since this is generic code we don't know what they are and the caller 2950 // must do any gc of the args. 2951 // 2952 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) { 2953 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before"); 2954 2955 // allocate space for the code 2956 ResourceMark rm; 2957 2958 CodeBuffer buffer(name, 1000, 512); 2959 MacroAssembler* masm = new MacroAssembler(&buffer); 2960 2961 int frame_size_in_words; 2962 2963 OopMapSet *oop_maps = new OopMapSet(); 2964 OopMap* map = NULL; 2965 2966 int start = __ offset(); 2967 2968 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words); 2969 2970 int frame_complete = __ offset(); 2971 2972 { 2973 Label retaddr; 2974 __ set_last_Java_frame(sp, noreg, retaddr, rscratch1); 2975 2976 __ mov(c_rarg0, rthread); 2977 __ lea(rscratch1, RuntimeAddress(destination)); 2978 2979 __ blrt(rscratch1, 1, 0, 1); 2980 __ bind(retaddr); 2981 } 2982 2983 // Set an oopmap for the call site. 2984 // We need this not only for callee-saved registers, but also for volatile 2985 // registers that the compiler might be keeping live across a safepoint. 2986 2987 oop_maps->add_gc_map( __ offset() - start, map); 2988 2989 __ maybe_isb(); 2990 2991 // r0 contains the address we are going to jump to assuming no exception got installed 2992 2993 // clear last_Java_sp 2994 __ reset_last_Java_frame(false); 2995 // check for pending exceptions 2996 Label pending; 2997 __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset())); 2998 __ cbnz(rscratch1, pending); 2999 3000 // get the returned Method* 3001 __ get_vm_result_2(rmethod, rthread); 3002 __ str(rmethod, Address(sp, RegisterSaver::reg_offset_in_bytes(rmethod))); 3003 3004 // r0 is where we want to jump, overwrite rscratch1 which is saved and scratch 3005 __ str(r0, Address(sp, RegisterSaver::rscratch1_offset_in_bytes())); 3006 RegisterSaver::restore_live_registers(masm); 3007 3008 // We are back the the original state on entry and ready to go. 3009 3010 __ br(rscratch1); 3011 3012 // Pending exception after the safepoint 3013 3014 __ bind(pending); 3015 3016 RegisterSaver::restore_live_registers(masm); 3017 3018 // exception pending => remove activation and forward to exception handler 3019 3020 __ str(zr, Address(rthread, JavaThread::vm_result_offset())); 3021 3022 __ ldr(r0, Address(rthread, Thread::pending_exception_offset())); 3023 __ far_jump(RuntimeAddress(StubRoutines::forward_exception_entry())); 3024 3025 // ------------- 3026 // make sure all code is generated 3027 masm->flush(); 3028 3029 // return the blob 3030 // frame_size_words or bytes?? 3031 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true); 3032 } 3033 3034 3035 #if defined(COMPILER2) || INCLUDE_JVMCI 3036 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame 3037 // 3038 //------------------------------generate_exception_blob--------------------------- 3039 // creates exception blob at the end 3040 // Using exception blob, this code is jumped from a compiled method. 3041 // (see emit_exception_handler in x86_64.ad file) 3042 // 3043 // Given an exception pc at a call we call into the runtime for the 3044 // handler in this method. This handler might merely restore state 3045 // (i.e. callee save registers) unwind the frame and jump to the 3046 // exception handler for the nmethod if there is no Java level handler 3047 // for the nmethod. 3048 // 3049 // This code is entered with a jmp. 3050 // 3051 // Arguments: 3052 // r0: exception oop 3053 // r3: exception pc 3054 // 3055 // Results: 3056 // r0: exception oop 3057 // r3: exception pc in caller or ??? 3058 // destination: exception handler of caller 3059 // 3060 // Note: the exception pc MUST be at a call (precise debug information) 3061 // Registers r0, r3, r2, r4, r5, r8-r11 are not callee saved. 3062 // 3063 3064 void OptoRuntime::generate_exception_blob() { 3065 assert(!OptoRuntime::is_callee_saved_register(R3_num), ""); 3066 assert(!OptoRuntime::is_callee_saved_register(R0_num), ""); 3067 assert(!OptoRuntime::is_callee_saved_register(R2_num), ""); 3068 3069 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned"); 3070 3071 // Allocate space for the code 3072 ResourceMark rm; 3073 // Setup code generation tools 3074 CodeBuffer buffer("exception_blob", 2048, 1024); 3075 MacroAssembler* masm = new MacroAssembler(&buffer); 3076 3077 // TODO check various assumptions made here 3078 // 3079 // make sure we do so before running this 3080 3081 address start = __ pc(); 3082 3083 // push rfp and retaddr by hand 3084 // Exception pc is 'return address' for stack walker 3085 __ stp(rfp, lr, Address(__ pre(sp, -2 * wordSize))); 3086 // there are no callee save registers and we don't expect an 3087 // arg reg save area 3088 #ifndef PRODUCT 3089 assert(frame::arg_reg_save_area_bytes == 0, "not expecting frame reg save area"); 3090 #endif 3091 // Store exception in Thread object. We cannot pass any arguments to the 3092 // handle_exception call, since we do not want to make any assumption 3093 // about the size of the frame where the exception happened in. 3094 __ str(r0, Address(rthread, JavaThread::exception_oop_offset())); 3095 __ str(r3, Address(rthread, JavaThread::exception_pc_offset())); 3096 3097 // This call does all the hard work. It checks if an exception handler 3098 // exists in the method. 3099 // If so, it returns the handler address. 3100 // If not, it prepares for stack-unwinding, restoring the callee-save 3101 // registers of the frame being removed. 3102 // 3103 // address OptoRuntime::handle_exception_C(JavaThread* thread) 3104 // 3105 // n.b. 1 gp arg, 0 fp args, integral return type 3106 3107 // the stack should always be aligned 3108 address the_pc = __ pc(); 3109 __ set_last_Java_frame(sp, noreg, the_pc, rscratch1); 3110 __ mov(c_rarg0, rthread); 3111 __ lea(rscratch1, RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C))); 3112 __ blrt(rscratch1, 1, 0, MacroAssembler::ret_type_integral); 3113 __ maybe_isb(); 3114 3115 // Set an oopmap for the call site. This oopmap will only be used if we 3116 // are unwinding the stack. Hence, all locations will be dead. 3117 // Callee-saved registers will be the same as the frame above (i.e., 3118 // handle_exception_stub), since they were restored when we got the 3119 // exception. 3120 3121 OopMapSet* oop_maps = new OopMapSet(); 3122 3123 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0)); 3124 3125 __ reset_last_Java_frame(false); 3126 3127 // Restore callee-saved registers 3128 3129 // rfp is an implicitly saved callee saved register (i.e. the calling 3130 // convention will save restore it in prolog/epilog) Other than that 3131 // there are no callee save registers now that adapter frames are gone. 3132 // and we dont' expect an arg reg save area 3133 __ ldp(rfp, r3, Address(__ post(sp, 2 * wordSize))); 3134 3135 // r0: exception handler 3136 3137 // We have a handler in r0 (could be deopt blob). 3138 __ mov(r8, r0); 3139 3140 // Get the exception oop 3141 __ ldr(r0, Address(rthread, JavaThread::exception_oop_offset())); 3142 // Get the exception pc in case we are deoptimized 3143 __ ldr(r4, Address(rthread, JavaThread::exception_pc_offset())); 3144 #ifdef ASSERT 3145 __ str(zr, Address(rthread, JavaThread::exception_handler_pc_offset())); 3146 __ str(zr, Address(rthread, JavaThread::exception_pc_offset())); 3147 #endif 3148 // Clear the exception oop so GC no longer processes it as a root. 3149 __ str(zr, Address(rthread, JavaThread::exception_oop_offset())); 3150 3151 // r0: exception oop 3152 // r8: exception handler 3153 // r4: exception pc 3154 // Jump to handler 3155 3156 __ br(r8); 3157 3158 // Make sure all code is generated 3159 masm->flush(); 3160 3161 // Set exception blob 3162 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1); 3163 } 3164 #endif // COMPILER2