1397 }
1398 
1399 void LIR_Assembler::emit_opShenandoahWriteBarrier(LIR_OpShenandoahWriteBarrier* op) {
1400   Label done;
1401   Register obj = op->in_opr()->as_register();
1402   Register res = op->result_opr()->as_register();
1403   Register tmp1 = op->tmp1_opr()->as_register();
1404   Register tmp2 = op->tmp2_opr()->as_register();
1405   assert_different_registers(res, tmp1, tmp2);
1406 
1407   if (res != obj) {
1408     __ mov(res, obj);
1409   }
1410 
1411   // Check for null.
1412   if (op->need_null_check()) {
1413     __ testptr(res, res);
1414     __ jcc(Assembler::zero, done);
1415   }
1416 
1417   // Check for evacuation-in-progress
1418   Address evacuation_in_progress = Address(r15_thread, in_bytes(JavaThread::evacuation_in_progress_offset()));
1419   __ cmpb(evacuation_in_progress, 0);
1420 
1421   // The read-barrier.
1422   __ movptr(res, Address(res, BrooksPointer::byte_offset()));
1423 
1424   __ jcc(Assembler::equal, done);
1425 
1426   // Check for object in collection set.
1427   __ movptr(tmp1, res);
1428   __ shrptr(tmp1, ShenandoahHeapRegion::RegionSizeShift);
1429   __ movptr(tmp2, (intptr_t) ShenandoahHeap::in_cset_fast_test_addr());
1430   __ movbool(tmp2, Address(tmp2, tmp1, Address::times_1));
1431   __ testb(tmp2, 0x1);
1432   __ jcc(Assembler::zero, done);
1433 
1434   if (res != rax) {
1435     __ xchgptr(res, rax); // Move obj into rax and save rax into obj.
1436   }
1437 
1438   __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::shenandoah_write_barrier_slow_id)));
1439 
1440   if (res != rax) {
1441     __ xchgptr(rax, res); // Swap back obj with rax.
1442   }
1443 
1444   __ bind(done);
1445 
1446 }
1447 
1448 void LIR_Assembler::emit_opConvert(LIR_OpConvert* op) {
1449   LIR_Opr src  = op->in_opr();
1450   LIR_Opr dest = op->result_opr();
1451 
1452   switch (op->bytecode()) {
1453     case Bytecodes::_i2l:
1454 #ifdef _LP64
1455       __ movl2ptr(dest->as_register_lo(), src->as_register());
1456 #else
1457       move_regs(src->as_register(), dest->as_register_lo());
1458       move_regs(src->as_register(), dest->as_register_hi());
1459       __ sarl(dest->as_register_hi(), 31);
1460 #endif // LP64
1461       break;
1462 

1397 }
1398 
1399 void LIR_Assembler::emit_opShenandoahWriteBarrier(LIR_OpShenandoahWriteBarrier* op) {
1400   Label done;
1401   Register obj = op->in_opr()->as_register();
1402   Register res = op->result_opr()->as_register();
1403   Register tmp1 = op->tmp1_opr()->as_register();
1404   Register tmp2 = op->tmp2_opr()->as_register();
1405   assert_different_registers(res, tmp1, tmp2);
1406 
1407   if (res != obj) {
1408     __ mov(res, obj);
1409   }
1410 
1411   // Check for null.
1412   if (op->need_null_check()) {
1413     __ testptr(res, res);
1414     __ jcc(Assembler::zero, done);
1415   }
1416 
1417   __ shenandoah_write_barrier(res);

























1418 
1419   __ bind(done);
1420 
1421 }
1422 
1423 void LIR_Assembler::emit_opConvert(LIR_OpConvert* op) {
1424   LIR_Opr src  = op->in_opr();
1425   LIR_Opr dest = op->result_opr();
1426 
1427   switch (op->bytecode()) {
1428     case Bytecodes::_i2l:
1429 #ifdef _LP64
1430       __ movl2ptr(dest->as_register_lo(), src->as_register());
1431 #else
1432       move_regs(src->as_register(), dest->as_register_lo());
1433       move_regs(src->as_register(), dest->as_register_hi());
1434       __ sarl(dest->as_register_hi(), 31);
1435 #endif // LP64
1436       break;
1437