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test/hotspot/jtreg/compiler/c2/aarch64/TestVolatiles.java
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@@ -37,11 +37,13 @@
* TestUnsafeVolatileGAS}
* and <testtype> in {G1,
* CMS,
* CMSCondMark,
* Serial,
- * Parallel}
+ * Parallel,
+ * Shenandoah,
+ * ShenandoahTraversal}
*/
package compiler.c2.aarch64;
@@ -98,10 +100,23 @@
argcount = 10;
procArgs = new String[argcount];
procArgs[argcount - 3] = "-XX:+UseConcMarkSweepGC";
procArgs[argcount - 2] = "-XX:+UseCondCardMark";
break;
+ case "Shenandoah":
+ argcount = 10;
+ procArgs = new String[argcount];
+ procArgs[argcount - 3] = "-XX:+UnlockExperimentalVMOptions";
+ procArgs[argcount - 2] = "-XX:+UseShenandoahGC";
+ break;
+ case "ShenandoahTraversal":
+ argcount = 11;
+ procArgs = new String[argcount];
+ procArgs[argcount - 4] = "-XX:+UnlockExperimentalVMOptions";
+ procArgs[argcount - 3] = "-XX:+UseShenandoahGC";
+ procArgs[argcount - 2] = "-XX:ShenandoahGCHeuristics=traversal";
+ break;
default:
throw new RuntimeException("unexpected test type " + testType);
}
// fill in arguments common to all cases
@@ -353,10 +368,21 @@
"strb",
"membar_volatile \\(elided\\)",
"ret"
};
break;
+ case "Shenandoah":
+ case "ShenandoahTraversal":
+ // Shenandoah generates normal object graphs for
+ // volatile stores
+ matches = new String[] {
+ "membar_release \\(elided\\)",
+ useCompressedOops ? "stlrw?" : "stlr",
+ "membar_volatile \\(elided\\)",
+ "ret"
+ };
+ break;
}
} else {
switch (testType) {
default:
// this is the basic sequence of instructions
@@ -416,10 +442,24 @@
"membar_volatile",
"dmb ish",
"ret"
};
break;
+
+ case "Shenandoah":
+ case "ShenandoahTraversal":
+ // Shenandoah generates normal object graphs for
+ // volatile stores
+ matches = new String[] {
+ "membar_release",
+ "dmb ish",
+ useCompressedOops ? "strw?" : "str",
+ "membar_volatile",
+ "dmb ish",
+ "ret"
+ };
+ break;
}
}
checkCompile(iter, "testObj", matches, output, true);
}
@@ -518,10 +558,21 @@
"strb",
"membar_acquire \\(elided\\)",
"ret"
};
break;
+ case "Shenandoah":
+ case "ShenandoahTraversal":
+ // For volatile CAS, Shenanodoah generates normal
+ // graphs with a shenandoah-specific cmpxchg
+ matches = new String[] {
+ "membar_release \\(elided\\)",
+ useCompressedOops ? "cmpxchgw?_acq_shenandoah" : "cmpxchg_acq_shenandoah",
+ "membar_acquire \\(elided\\)",
+ "ret"
+ };
+ break;
}
} else {
switch (testType) {
default:
// this is the basic sequence of instructions
@@ -581,10 +632,23 @@
"membar_acquire",
"dmb ish",
"ret"
};
break;
+ case "Shenandoah":
+ case "ShenandoahTraversal":
+ // For volatile CAS, Shenanodoah generates normal
+ // graphs with a shenandoah-specific cmpxchg
+ matches = new String[] {
+ "membar_release",
+ "dmb ish",
+ useCompressedOops ? "cmpxchgw?_shenandoah" : "cmpxchg_shenandoah",
+ "membar_acquire",
+ "dmb ish",
+ "ret"
+ };
+ break;
}
}
checkCompile(iter, "testObj", matches, output, true);
}
@@ -699,10 +763,21 @@
"strb",
"membar_acquire \\(elided\\)",
"ret"
};
break;
+ case "Shenandoah":
+ case "ShenandoahTraversal":
+ // For volatile CAS, Shenanodoah generates normal
+ // graphs with a shenandoah-specific cmpxchg
+ matches = new String[] {
+ "membar_release \\(elided\\)",
+ useCompressedOops ? "cmpxchgw?_acq_shenandoah" : "cmpxchg_acq_shenandoah",
+ "membar_acquire \\(elided\\)",
+ "ret"
+ };
+ break;
}
} else {
switch (testType) {
default:
// this is the basic sequence of instructions
@@ -762,10 +837,23 @@
"membar_acquire",
"dmb ish",
"ret"
};
break;
+ case "Shenandoah":
+ case "ShenandoahTraversal":
+ // For volatile CAS, Shenanodoah generates normal
+ // graphs with a shenandoah-specific cmpxchg
+ matches = new String[] {
+ "membar_release",
+ "dmb ish",
+ useCompressedOops ? "cmpxchgw?_shenandoah" : "cmpxchg_shenandoah",
+ "membar_acquire",
+ "dmb ish",
+ "ret"
+ };
+ break;
}
}
checkCompile(iter, "testObj", matches, output, true);
}
@@ -860,10 +948,19 @@
"strb",
"membar_acquire \\(elided\\)",
"ret"
};
break;
+ case "Shenandoah":
+ case "ShenandoahTraversal":
+ matches = new String[] {
+ "membar_release \\(elided\\)",
+ useCompressedOops ? "atomic_xchgw?_acq" : "atomic_xchg_acq",
+ "membar_acquire \\(elided\\)",
+ "ret"
+ };
+ break;
}
} else {
switch (testType) {
default:
// this is the basic sequence of instructions
@@ -923,10 +1020,21 @@
"membar_acquire",
"dmb ish",
"ret"
};
break;
+ case "Shenandoah":
+ case "ShenandoahTraversal":
+ matches = new String[] {
+ "membar_release",
+ "dmb ish",
+ useCompressedOops ? "atomic_xchgw? " : "atomic_xchg ",
+ "membar_acquire",
+ "dmb ish",
+ "ret"
+ };
+ break;
}
}
checkCompile(iter, "testObj", matches, output, true);
}
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