6386   ins_encode %{
6387     __ movl($dst$$Register, $src$$Register);
6388   %}
6389   ins_pipe(ialu_reg_reg); // XXX
6390 %}
6391 
6392 // Convert compressed oop into int for vectors alignment masking
6393 // in case of 32bit oops (heap < 4Gb).
6394 instruct convN2I(rRegI dst, rRegN src)
6395 %{
6396   predicate(Universe::narrow_oop_shift() == 0);
6397   match(Set dst (ConvL2I (CastP2X (DecodeN src))));
6398 
6399   format %{ "movl    $dst, $src\t# compressed ptr -> int" %}
6400   ins_encode %{
6401     __ movl($dst$$Register, $src$$Register);
6402   %}
6403   ins_pipe(ialu_reg_reg); // XXX
6404 %}
6405 



































6406 // Convert oop pointer into compressed form
6407 instruct encodeHeapOop(rRegN dst, rRegP src, rFlagsReg cr) %{
6408   predicate(n->bottom_type()->make_ptr()->ptr() != TypePtr::NotNull);
6409   match(Set dst (EncodeP src));
6410   effect(KILL cr);
6411   format %{ "encode_heap_oop $dst,$src" %}
6412   ins_encode %{
6413     Register s = $src$$Register;
6414     Register d = $dst$$Register;
6415     if (s != d) {
6416       __ movq(d, s);
6417     }
6418     __ encode_heap_oop(d);
6419   %}
6420   ins_pipe(ialu_reg_long);
6421 %}
6422 
6423 instruct encodeHeapOop_not_null(rRegN dst, rRegP src, rFlagsReg cr) %{
6424   predicate(n->bottom_type()->make_ptr()->ptr() == TypePtr::NotNull);
6425   match(Set dst (EncodeP src));

6386   ins_encode %{
6387     __ movl($dst$$Register, $src$$Register);
6388   %}
6389   ins_pipe(ialu_reg_reg); // XXX
6390 %}
6391 
6392 // Convert compressed oop into int for vectors alignment masking
6393 // in case of 32bit oops (heap < 4Gb).
6394 instruct convN2I(rRegI dst, rRegN src)
6395 %{
6396   predicate(Universe::narrow_oop_shift() == 0);
6397   match(Set dst (ConvL2I (CastP2X (DecodeN src))));
6398 
6399   format %{ "movl    $dst, $src\t# compressed ptr -> int" %}
6400   ins_encode %{
6401     __ movl($dst$$Register, $src$$Register);
6402   %}
6403   ins_pipe(ialu_reg_reg); // XXX
6404 %}
6405 
6406 instruct shenandoahRB(rRegP dst, rRegP src, rFlagsReg cr) %{
6407   match(Set dst (ShenandoahReadBarrier src));
6408   effect(DEF dst, USE src);
6409   ins_cost(125); // XXX
6410   format %{ "shenandoah_rb $dst,$src" %}
6411   ins_encode %{
6412     Register s = $src$$Register;
6413     Register d = $dst$$Register;
6414     __ movptr(d, Address(s, -8));
6415   %}
6416   ins_pipe(ialu_reg_mem);
6417 %}
6418 
6419 instruct shenandoahWB(rax_RegP dst, rdi_RegP src, rFlagsReg cr) %{
6420   match(Set dst (ShenandoahWriteBarrier src));
6421   effect(DEF dst, USE_KILL src, KILL cr);
6422   ins_cost(300); // XXX
6423   format %{ "shenandoah_wb $dst,$src" %}
6424   ins_encode %{
6425     Label done;
6426     Register s = $src$$Register;
6427     Register d = $dst$$Register;
6428     assert(s == rdi, "need rdi");
6429     assert(d == rax, "result in rax");
6430     Address evacuation_in_progress = Address(r15_thread, in_bytes(JavaThread::evacuation_in_progress_offset()));
6431     __ movptr(d, Address(s, -8));
6432     __ cmpb(evacuation_in_progress, 0);
6433     __ movptr(d, Address(s, -8));
6434     __ jcc(Assembler::equal, done);
6435     __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, StubRoutines::x86::shenandoah_wb())));
6436     __ bind(done);
6437   %}
6438   ins_pipe(pipe_slow);
6439 %}
6440 
6441 // Convert oop pointer into compressed form
6442 instruct encodeHeapOop(rRegN dst, rRegP src, rFlagsReg cr) %{
6443   predicate(n->bottom_type()->make_ptr()->ptr() != TypePtr::NotNull);
6444   match(Set dst (EncodeP src));
6445   effect(KILL cr);
6446   format %{ "encode_heap_oop $dst,$src" %}
6447   ins_encode %{
6448     Register s = $src$$Register;
6449     Register d = $dst$$Register;
6450     if (s != d) {
6451       __ movq(d, s);
6452     }
6453     __ encode_heap_oop(d);
6454   %}
6455   ins_pipe(ialu_reg_long);
6456 %}
6457 
6458 instruct encodeHeapOop_not_null(rRegN dst, rRegP src, rFlagsReg cr) %{
6459   predicate(n->bottom_type()->make_ptr()->ptr() == TypePtr::NotNull);
6460   match(Set dst (EncodeP src));