666 must_spill++;
667 interfering_lrg._must_spill = 1;
668 interfering_lrg.set_reg(OptoReg::Name(LRG::SPILL_REG));
669 }
670 l = elements.next();
671 }
672 }
673
674 /*
675 * Start loop at 1 (skip control edge) for most Nodes. SCMemProj's might be the
676 * sole use of a StoreLConditional. While StoreLConditionals set memory (the
677 * SCMemProj use) they also def flags; if that flag def is unused the allocator
678 * sees a flag-setting instruction with no use of the flags and assumes it's
679 * dead. This keeps the (useless) flag-setting behavior alive while also
680 * keeping the (useful) memory update effect.
681 */
682 void PhaseChaitin::add_input_to_liveout(Block* b, Node* n, IndexSet* liveout, double cost, Pressure& int_pressure, Pressure& float_pressure) {
683 JVMState* jvms = n->jvms();
684 uint debug_start = jvms ? jvms->debug_start() : 999999;
685
686 for (uint k = ((n->Opcode() == Op_SCMemProj) ? 0:1); k < n->req(); k++) {
687 Node* def = n->in(k);
688 uint lid = _lrg_map.live_range_id(def);
689 if (!lid) {
690 continue;
691 }
692 LRG& lrg = lrgs(lid);
693
694 // No use-side cost for spilling debug info
695 if (k < debug_start) {
696 // A USE costs twice block frequency (once for the Load, once
697 // for a Load-delay). Rematerialized uses only cost once.
698 lrg._cost += (def->rematerialize() ? b->_freq : (b->_freq * 2));
699 }
700
701 if (liveout->insert(lid)) {
702 // Newly live things assumed live from here to top of block
703 lrg._area += cost;
704 raise_pressure(b, lrg, int_pressure, float_pressure);
705 assert(int_pressure.current_pressure() == count_int_pressure(liveout), "the int pressure is incorrect");
706 assert(float_pressure.current_pressure() == count_float_pressure(liveout), "the float pressure is incorrect");
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666 must_spill++;
667 interfering_lrg._must_spill = 1;
668 interfering_lrg.set_reg(OptoReg::Name(LRG::SPILL_REG));
669 }
670 l = elements.next();
671 }
672 }
673
674 /*
675 * Start loop at 1 (skip control edge) for most Nodes. SCMemProj's might be the
676 * sole use of a StoreLConditional. While StoreLConditionals set memory (the
677 * SCMemProj use) they also def flags; if that flag def is unused the allocator
678 * sees a flag-setting instruction with no use of the flags and assumes it's
679 * dead. This keeps the (useless) flag-setting behavior alive while also
680 * keeping the (useful) memory update effect.
681 */
682 void PhaseChaitin::add_input_to_liveout(Block* b, Node* n, IndexSet* liveout, double cost, Pressure& int_pressure, Pressure& float_pressure) {
683 JVMState* jvms = n->jvms();
684 uint debug_start = jvms ? jvms->debug_start() : 999999;
685
686 for (uint k = ((n->Opcode() == Op_SCMemProj || n->Opcode() == Op_ShenandoahWBMemProj) ? 0:1); k < n->req(); k++) {
687 Node* def = n->in(k);
688 uint lid = _lrg_map.live_range_id(def);
689 if (!lid) {
690 continue;
691 }
692 LRG& lrg = lrgs(lid);
693
694 // No use-side cost for spilling debug info
695 if (k < debug_start) {
696 // A USE costs twice block frequency (once for the Load, once
697 // for a Load-delay). Rematerialized uses only cost once.
698 lrg._cost += (def->rematerialize() ? b->_freq : (b->_freq * 2));
699 }
700
701 if (liveout->insert(lid)) {
702 // Newly live things assumed live from here to top of block
703 lrg._area += cost;
704 raise_pressure(b, lrg, int_pressure, float_pressure);
705 assert(int_pressure.current_pressure() == count_int_pressure(liveout), "the int pressure is incorrect");
706 assert(float_pressure.current_pressure() == count_float_pressure(liveout), "the float pressure is incorrect");
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