1 /* 2 * Copyright (c) 2018, Red Hat, Inc. All rights reserved. 3 * 4 * This code is free software; you can redistribute it and/or modify it 5 * under the terms of the GNU General Public License version 2 only, as 6 * published by the Free Software Foundation. 7 * 8 * This code is distributed in the hope that it will be useful, but WITHOUT 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 11 * version 2 for more details (a copy is included in the LICENSE file that 12 * accompanied this code). 13 * 14 * You should have received a copy of the GNU General Public License version 15 * 2 along with this work; if not, write to the Free Software Foundation, 16 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 17 * 18 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 19 * or visit www.oracle.com if you need additional information or have any 20 * questions. 21 * 22 */ 23 24 #ifndef CPU_AARCH64_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_AARCH64_HPP 25 #define CPU_AARCH64_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_AARCH64_HPP 26 27 #include "asm/macroAssembler.hpp" 28 #include "memory/allocation.hpp" 29 #ifdef COMPILER1 30 class LIR_Assembler; 31 class ShenandoahLoadReferenceBarrierStub; 32 class StubAssembler; 33 class StubCodeGenerator; 34 #endif 35 36 class ShenandoahBarrierSetAssembler : public CHeapObj<mtGC> { 37 private: 38 39 void resolve_forward_pointer(MacroAssembler* masm, Register dst, Register tmp = noreg); 40 void resolve_forward_pointer_not_null(MacroAssembler* masm, Register dst, Register tmp = noreg); 41 42 void load_reference_barrier_not_null(MacroAssembler* masm, Register dst); 43 44 public: 45 static ShenandoahBarrierSetAssembler* bsasm(); 46 47 #ifdef COMPILER1 48 void gen_load_reference_barrier_stub(LIR_Assembler* ce, ShenandoahLoadReferenceBarrierStub* stub); 49 #endif 50 51 void load_reference_barrier(MacroAssembler* masm, Register dst); 52 53 virtual void cmpxchg_oop(MacroAssembler* masm, 54 Register addr, Register expected, Register new_val, 55 bool acquire, bool release, bool weak, bool is_cae, 56 Register result); 57 }; 58 59 #endif // CPU_AARCH64_GC_SHENANDOAH_SHENANDOAHBARRIERSETASSEMBLER_AARCH64_HPP