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src/cpu/x86/vm/templateTable_x86_32.cpp

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rev 11463 : Backport Traversal GC


  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "asm/macroAssembler.hpp"
  27 #include "interpreter/interpreter.hpp"
  28 #include "interpreter/interpreterRuntime.hpp"
  29 #include "interpreter/templateTable.hpp"
  30 #include "memory/universe.inline.hpp"
  31 #include "oops/methodData.hpp"
  32 #include "oops/objArrayKlass.hpp"
  33 #include "oops/oop.inline.hpp"
  34 #include "prims/methodHandles.hpp"
  35 #include "runtime/sharedRuntime.hpp"
  36 #include "runtime/stubRoutines.hpp"
  37 #include "runtime/synchronizer.hpp"
  38 #include "utilities/macros.hpp"



  39 
  40 #ifndef CC_INTERP
  41 #define __ _masm->
  42 
  43 //----------------------------------------------------------------------------------------------------
  44 // Platform-dependent initialization
  45 
  46 void TemplateTable::pd_initialize() {
  47   // No i486 specific initialization
  48 }
  49 
  50 //----------------------------------------------------------------------------------------------------
  51 // Address computation
  52 
  53 // local variables
  54 static inline Address iaddress(int n)            {
  55   return Address(rdi, Interpreter::local_offset_in_bytes(n));
  56 }
  57 
  58 static inline Address laddress(int n)            { return iaddress(n + 1); }


 112   return Assembler::zero;
 113 }
 114 
 115 
 116 //----------------------------------------------------------------------------------------------------
 117 // Miscelaneous helper routines
 118 
 119 // Store an oop (or NULL) at the address described by obj.
 120 // If val == noreg this means store a NULL
 121 
 122 static void do_oop_store(InterpreterMacroAssembler* _masm,
 123                          Address obj,
 124                          Register val,
 125                          BarrierSet::Name barrier,
 126                          bool precise) {
 127   assert(val == noreg || val == rax, "parameter is just for looks");
 128   switch (barrier) {
 129 #if INCLUDE_ALL_GCS
 130     case BarrierSet::G1SATBCT:
 131     case BarrierSet::G1SATBCTLogging:
 132     case BarrierSet::ShenandoahBarrierSet:
 133       {
 134         // flatten object address if needed
 135         // We do it regardless of precise because we need the registers
 136         if (obj.index() == noreg && obj.disp() == 0) {
 137           if (obj.base() != rdx) {
 138             __ movl(rdx, obj.base());
 139           }
 140         } else {
 141           __ leal(rdx, obj);
 142         }
 143         __ get_thread(rcx);
 144         __ save_bcp();
 145         __ g1_write_barrier_pre(rdx /* obj */,
 146                                 rbx /* pre_val */,
 147                                 rcx /* thread */,
 148                                 rsi /* tmp */,
 149                                 val != noreg /* tosca_live */,
 150                                 false /* expand_call */);
 151 
 152         // Do the actual store
 153         // noreg means NULL
 154         if (val == noreg) {
 155           __ movptr(Address(rdx, 0), NULL_WORD);
 156           // No post barrier for NULL
 157         } else {
 158           __ movl(Address(rdx, 0), val);
 159           __ g1_write_barrier_post(rdx /* store_adr */,
 160                                    val /* new_val */,
 161                                    rcx /* thread */,
 162                                    rbx /* tmp */,
 163                                    rsi /* tmp2 */);



































 164         }
 165         __ restore_bcp();
 166 
 167       }
 168       break;
 169 #endif // INCLUDE_ALL_GCS
 170     case BarrierSet::CardTableModRef:
 171     case BarrierSet::CardTableExtension:
 172       {
 173         if (val == noreg) {
 174           __ movptr(obj, NULL_WORD);
 175         } else {
 176           __ movl(obj, val);
 177           // flatten object address if needed
 178           if (!precise || (obj.index() == noreg && obj.disp() == 0)) {
 179             __ store_check(obj.base());
 180           } else {
 181             __ leal(rdx, obj);
 182             __ store_check(rdx);
 183           }




  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "asm/macroAssembler.hpp"
  27 #include "interpreter/interpreter.hpp"
  28 #include "interpreter/interpreterRuntime.hpp"
  29 #include "interpreter/templateTable.hpp"
  30 #include "memory/universe.inline.hpp"
  31 #include "oops/methodData.hpp"
  32 #include "oops/objArrayKlass.hpp"
  33 #include "oops/oop.inline.hpp"
  34 #include "prims/methodHandles.hpp"
  35 #include "runtime/sharedRuntime.hpp"
  36 #include "runtime/stubRoutines.hpp"
  37 #include "runtime/synchronizer.hpp"
  38 #include "utilities/macros.hpp"
  39 #if INCLUDE_ALL_GCS
  40 #include "shenandoahBarrierSetAssembler_x86.hpp"
  41 #endif
  42 
  43 #ifndef CC_INTERP
  44 #define __ _masm->
  45 
  46 //----------------------------------------------------------------------------------------------------
  47 // Platform-dependent initialization
  48 
  49 void TemplateTable::pd_initialize() {
  50   // No i486 specific initialization
  51 }
  52 
  53 //----------------------------------------------------------------------------------------------------
  54 // Address computation
  55 
  56 // local variables
  57 static inline Address iaddress(int n)            {
  58   return Address(rdi, Interpreter::local_offset_in_bytes(n));
  59 }
  60 
  61 static inline Address laddress(int n)            { return iaddress(n + 1); }


 115   return Assembler::zero;
 116 }
 117 
 118 
 119 //----------------------------------------------------------------------------------------------------
 120 // Miscelaneous helper routines
 121 
 122 // Store an oop (or NULL) at the address described by obj.
 123 // If val == noreg this means store a NULL
 124 
 125 static void do_oop_store(InterpreterMacroAssembler* _masm,
 126                          Address obj,
 127                          Register val,
 128                          BarrierSet::Name barrier,
 129                          bool precise) {
 130   assert(val == noreg || val == rax, "parameter is just for looks");
 131   switch (barrier) {
 132 #if INCLUDE_ALL_GCS
 133     case BarrierSet::G1SATBCT:
 134     case BarrierSet::G1SATBCTLogging:

 135       {
 136         // flatten object address if needed
 137         // We do it regardless of precise because we need the registers
 138         if (obj.index() == noreg && obj.disp() == 0) {
 139           if (obj.base() != rdx) {
 140             __ movl(rdx, obj.base());
 141           }
 142         } else {
 143           __ leal(rdx, obj);
 144         }
 145         __ get_thread(rcx);
 146         __ save_bcp();
 147         __ g1_write_barrier_pre(rdx /* obj */,
 148                                 rbx /* pre_val */,
 149                                 rcx /* thread */,
 150                                 rsi /* tmp */,
 151                                 val != noreg /* tosca_live */,
 152                                 false /* expand_call */);
 153 
 154         // Do the actual store
 155         // noreg means NULL
 156         if (val == noreg) {
 157           __ movptr(Address(rdx, 0), NULL_WORD);
 158           // No post barrier for NULL
 159         } else {
 160           __ movl(Address(rdx, 0), val);
 161           __ g1_write_barrier_post(rdx /* store_adr */,
 162                                    val /* new_val */,
 163                                    rcx /* thread */,
 164                                    rbx /* tmp */,
 165                                    rsi /* tmp2 */);
 166         }
 167         __ restore_bcp();
 168 
 169       }
 170       break;
 171     case BarrierSet::ShenandoahBarrierSet:
 172       {
 173         // flatten object address if needed
 174         // We do it regardless of precise because we need the registers
 175         if (obj.index() == noreg && obj.disp() == 0) {
 176           if (obj.base() != rdx) {
 177             __ movl(rdx, obj.base());
 178           }
 179         } else {
 180           __ leal(rdx, obj);
 181         }
 182         __ get_thread(rcx);
 183         __ save_bcp();
 184         if (ShenandoahSATBBarrier) {
 185           __ g1_write_barrier_pre(rdx /* obj */,
 186                                   rbx /* pre_val */,
 187                                   rcx /* thread */,
 188                                   rsi /* tmp */,
 189                                   val != noreg /* tosca_live */,
 190                                   false /* expand_call */);
 191         }
 192 
 193         // Do the actual store
 194         // noreg means NULL
 195         if (val == noreg) {
 196           __ movptr(Address(rdx, 0), NULL_WORD);
 197           // No post barrier for NULL
 198         } else {
 199           ShenandoahBarrierSetAssembler::bsasm()->storeval_barrier(_masm, val, rsi);
 200           __ movl(Address(rdx, 0), val);
 201         }
 202         __ restore_bcp();
 203 
 204       }
 205       break;
 206 #endif // INCLUDE_ALL_GCS
 207     case BarrierSet::CardTableModRef:
 208     case BarrierSet::CardTableExtension:
 209       {
 210         if (val == noreg) {
 211           __ movptr(obj, NULL_WORD);
 212         } else {
 213           __ movl(obj, val);
 214           // flatten object address if needed
 215           if (!precise || (obj.index() == noreg && obj.disp() == 0)) {
 216             __ store_check(obj.base());
 217           } else {
 218             __ leal(rdx, obj);
 219             __ store_check(rdx);
 220           }


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