1 /*
   2  * Copyright (c) 2018, Red Hat, Inc. All rights reserved.
   3  *
   4  * This code is free software; you can redistribute it and/or modify it
   5  * under the terms of the GNU General Public License version 2 only, as
   6  * published by the Free Software Foundation.
   7  *
   8  * This code is distributed in the hope that it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  11  * version 2 for more details (a copy is included in the LICENSE file that
  12  * accompanied this code).
  13  *
  14  * You should have received a copy of the GNU General Public License version
  15  * 2 along with this work; if not, write to the Free Software Foundation,
  16  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  17  *
  18  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  19  * or visit www.oracle.com if you need additional information or have any
  20  * questions.
  21  *
  22  */
  23 
  24 #include "precompiled.hpp"
  25 #include "c1/c1_LIRGenerator.hpp"
  26 #include "c1/c1_IR.hpp"
  27 #include "gc_implementation/g1/satbQueue.hpp"
  28 #include "gc_implementation/shenandoah/shenandoahForwarding.hpp"
  29 #include "gc_implementation/shenandoah/shenandoahHeap.hpp"
  30 #include "gc_implementation/shenandoah/shenandoahHeapRegion.hpp"
  31 #include "gc_implementation/shenandoah/shenandoahBarrierSetC1.hpp"
  32 
  33 #ifdef TARGET_ARCH_aarch64
  34 #include "shenandoahBarrierSetAssembler_aarch64.hpp"
  35 #endif
  36 #ifdef TARGET_ARCH_x86
  37 #include "shenandoahBarrierSetAssembler_x86.hpp"
  38 #endif
  39 
  40 #ifndef PATCHED_ADDR
  41 #define PATCHED_ADDR  (max_jint)
  42 #endif
  43 
  44 #ifdef ASSERT
  45 #define __ gen->lir(__FILE__, __LINE__)->
  46 #else
  47 #define __ gen->lir()->
  48 #endif
  49 
  50 void ShenandoahLoadReferenceBarrierStub::emit_code(LIR_Assembler* ce) {
  51   ShenandoahBarrierSetAssembler* bs = ShenandoahBarrierSetAssembler::bsasm();
  52   bs->gen_load_reference_barrier_stub(ce, this);
  53 }
  54 
  55 ShenandoahBarrierSetC1* ShenandoahBarrierSetC1::bsc1() {
  56   return ShenandoahBarrierSet::barrier_set()->bsc1();
  57 }
  58 
  59 LIR_Opr ShenandoahBarrierSetC1::load_reference_barrier(LIRGenerator* gen, LIR_Opr obj, CodeEmitInfo* info, bool need_null_check) {
  60   if (ShenandoahLoadRefBarrier) {
  61     return load_reference_barrier_impl(gen, obj, info, need_null_check);
  62   } else {
  63     return obj;
  64   }
  65 }
  66 
  67 LIR_Opr ShenandoahBarrierSetC1::load_reference_barrier_impl(LIRGenerator* gen, LIR_Opr obj, CodeEmitInfo* info, bool need_null_check) {
  68   assert(ShenandoahLoadRefBarrier, "Should be enabled");
  69   obj = ensure_in_register(gen, obj);
  70   assert(obj->is_register(), "must be a register at this point");
  71   LIR_Opr result = gen->new_register(T_OBJECT);
  72   __ move(obj, result);
  73 
  74   LIR_Opr thrd = gen->getThreadPointer();
  75   LIR_Address* active_flag_addr =
  76     new LIR_Address(thrd,
  77                     in_bytes(JavaThread::gc_state_offset()),
  78                     T_BYTE);
  79   // Read and check the gc-state-flag.
  80   LIR_Opr flag_val = gen->new_register(T_INT);
  81   __ load(active_flag_addr, flag_val);
  82   LIR_Opr mask = LIR_OprFact::intConst(ShenandoahHeap::HAS_FORWARDED |
  83                                        ShenandoahHeap::EVACUATION);
  84   LIR_Opr mask_reg = gen->new_register(T_INT);
  85   __ move(mask, mask_reg);
  86 
  87   if (TwoOperandLIRForm) {
  88     __ logical_and(flag_val, mask_reg, flag_val);
  89   } else {
  90     LIR_Opr masked_flag = gen->new_register(T_INT);
  91     __ logical_and(flag_val, mask_reg, masked_flag);
  92     flag_val = masked_flag;
  93   }
  94   __ cmp(lir_cond_notEqual, flag_val, LIR_OprFact::intConst(0));
  95 
  96   CodeStub* slow = new ShenandoahLoadReferenceBarrierStub(obj, result, info ? new CodeEmitInfo(info) : NULL, need_null_check);
  97   __ branch(lir_cond_notEqual, T_INT, slow);
  98   __ branch_destination(slow->continuation());
  99 
 100   return result;
 101 }
 102 
 103 LIR_Opr ShenandoahBarrierSetC1::ensure_in_register(LIRGenerator* gen, LIR_Opr obj) {
 104   if (!obj->is_register()) {
 105     LIR_Opr obj_reg = gen->new_register(T_OBJECT);
 106     if (obj->is_constant()) {
 107       __ move(obj, obj_reg);
 108     } else {
 109       __ leal(obj, obj_reg);
 110     }
 111     obj = obj_reg;
 112   }
 113   return obj;
 114 }