1 /*
2 * Copyright (c) 1998, 2018, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/macroAssembler.inline.hpp"
27 #include "memory/allocation.inline.hpp"
28 #include "opto/ad.hpp"
29 #include "opto/block.hpp"
30 #include "opto/c2compiler.hpp"
31 #include "opto/callnode.hpp"
32 #include "opto/cfgnode.hpp"
33 #include "opto/machnode.hpp"
34 #include "opto/runtime.hpp"
35 #include "opto/chaitin.hpp"
36 #include "runtime/sharedRuntime.hpp"
37
38 // Optimization - Graph Style
39
40 // Check whether val is not-null-decoded compressed oop,
41 // i.e. will grab into the base of the heap if it represents NULL.
42 static bool accesses_heap_base_zone(Node *val) {
43 if (Universe::narrow_oop_base() != NULL) { // Implies UseCompressedOops.
44 if (val && val->is_Mach()) {
45 if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) {
46 // This assumes all Decodes with TypePtr::NotNull are matched to nodes that
47 // decode NULL to point to the heap base (Decode_NN).
48 if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) {
49 return true;
50 }
51 }
52 // Must recognize load operation with Decode matched in memory operand.
53 // We should not reach here exept for PPC/AIX, as os::zero_page_read_protected()
54 // returns true everywhere else. On PPC, no such memory operands
55 // exist, therefore we did not yet implement a check for such operands.
56 NOT_AIX(Unimplemented());
57 }
58 }
59 return false;
60 }
61
62 static bool needs_explicit_null_check_for_read(Node *val) {
63 // On some OSes (AIX) the page at address 0 is only write protected.
64 // If so, only Store operations will trap.
65 if (os::zero_page_read_protected()) {
66 return false; // Implicit null check will work.
67 }
68 // Also a read accessing the base of a heap-based compressed heap will trap.
69 if (accesses_heap_base_zone(val) && // Hits the base zone page.
70 Universe::narrow_oop_use_implicit_null_checks()) { // Base zone page is protected.
71 return false;
72 }
73
74 return true;
75 }
76
77 //------------------------------implicit_null_check----------------------------
78 // Detect implicit-null-check opportunities. Basically, find NULL checks
79 // with suitable memory ops nearby. Use the memory op to do the NULL check.
80 // I can generate a memory op if there is not one nearby.
81 // The proj is the control projection for the not-null case.
82 // The val is the pointer being checked for nullness or
83 // decodeHeapOop_not_null node if it did not fold into address.
84 void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) {
85 // Assume if null check need for 0 offset then always needed
86 // Intel solaris doesn't support any null checks yet and no
87 // mechanism exists (yet) to set the switches at an os_cpu level
88 if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return;
89
90 // Make sure the ptr-is-null path appears to be uncommon!
91 float f = block->end()->as_MachIf()->_prob;
92 if( proj->Opcode() == Op_IfTrue ) f = 1.0f - f;
93 if( f > PROB_UNLIKELY_MAG(4) ) return;
94
95 uint bidx = 0; // Capture index of value into memop
96 bool was_store; // Memory op is a store op
97
98 // Get the successor block for if the test ptr is non-null
99 Block* not_null_block; // this one goes with the proj
100 Block* null_block;
101 if (block->get_node(block->number_of_nodes()-1) == proj) {
102 null_block = block->_succs[0];
103 not_null_block = block->_succs[1];
104 } else {
105 assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other");
106 not_null_block = block->_succs[0];
107 null_block = block->_succs[1];
108 }
109 while (null_block->is_Empty() == Block::empty_with_goto) {
110 null_block = null_block->_succs[0];
111 }
112
113 // Search the exception block for an uncommon trap.
114 // (See Parse::do_if and Parse::do_ifnull for the reason
115 // we need an uncommon trap. Briefly, we need a way to
116 // detect failure of this optimization, as in 6366351.)
117 {
118 bool found_trap = false;
119 for (uint i1 = 0; i1 < null_block->number_of_nodes(); i1++) {
120 Node* nn = null_block->get_node(i1);
121 if (nn->is_MachCall() &&
122 nn->as_MachCall()->entry_point() == SharedRuntime::uncommon_trap_blob()->entry_point()) {
123 const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type();
124 if (trtype->isa_int() && trtype->is_int()->is_con()) {
125 jint tr_con = trtype->is_int()->get_con();
126 Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con);
127 Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con);
128 assert((int)reason < (int)BitsPerInt, "recode bit map");
129 if (is_set_nth_bit(allowed_reasons, (int) reason)
130 && action != Deoptimization::Action_none) {
131 // This uncommon trap is sure to recompile, eventually.
132 // When that happens, C->too_many_traps will prevent
133 // this transformation from happening again.
134 found_trap = true;
135 }
136 }
137 break;
138 }
139 }
140 if (!found_trap) {
141 // We did not find an uncommon trap.
142 return;
143 }
144 }
145
146 // Check for decodeHeapOop_not_null node which did not fold into address
147 bool is_decoden = ((intptr_t)val) & 1;
148 val = (Node*)(((intptr_t)val) & ~1);
149
150 assert(!is_decoden || (val->in(0) == NULL) && val->is_Mach() &&
151 (val->as_Mach()->ideal_Opcode() == Op_DecodeN), "sanity");
152
153 // Search the successor block for a load or store who's base value is also
154 // the tested value. There may be several.
155 Node_List *out = new Node_List(Thread::current()->resource_area());
156 MachNode *best = NULL; // Best found so far
157 for (DUIterator i = val->outs(); val->has_out(i); i++) {
158 Node *m = val->out(i);
159 if( !m->is_Mach() ) continue;
160 MachNode *mach = m->as_Mach();
161 was_store = false;
162 int iop = mach->ideal_Opcode();
163 switch( iop ) {
164 case Op_LoadB:
165 case Op_LoadUB:
166 case Op_LoadUS:
167 case Op_LoadD:
168 case Op_LoadF:
169 case Op_LoadI:
170 case Op_LoadL:
171 case Op_LoadP:
172 case Op_LoadBarrierSlowReg:
173 case Op_LoadBarrierWeakSlowReg:
174 case Op_LoadN:
175 case Op_LoadS:
176 case Op_LoadKlass:
177 case Op_LoadNKlass:
178 case Op_LoadRange:
179 case Op_LoadD_unaligned:
180 case Op_LoadL_unaligned:
181 case Op_ShenandoahReadBarrier:
182 case Op_ShenandoahWriteBarrier:
183 assert(mach->in(2) == val, "should be address");
184 break;
185 case Op_StoreB:
186 case Op_StoreC:
187 case Op_StoreCM:
188 case Op_StoreD:
189 case Op_StoreF:
190 case Op_StoreI:
191 case Op_StoreL:
192 case Op_StoreP:
193 case Op_StoreN:
194 case Op_StoreNKlass:
195 was_store = true; // Memory op is a store op
196 // Stores will have their address in slot 2 (memory in slot 1).
197 // If the value being nul-checked is in another slot, it means we
198 // are storing the checked value, which does NOT check the value!
199 if( mach->in(2) != val ) continue;
200 break; // Found a memory op?
201 case Op_StrComp:
202 case Op_StrEquals:
203 case Op_StrIndexOf:
204 case Op_StrIndexOfChar:
205 case Op_AryEq:
206 case Op_StrInflatedCopy:
207 case Op_StrCompressedCopy:
208 case Op_EncodeISOArray:
209 case Op_HasNegatives:
210 // Not a legit memory op for implicit null check regardless of
211 // embedded loads
212 continue;
213 default: // Also check for embedded loads
214 if( !mach->needs_anti_dependence_check() )
215 continue; // Not an memory op; skip it
216 if( must_clone[iop] ) {
217 // Do not move nodes which produce flags because
218 // RA will try to clone it to place near branch and
219 // it will cause recompilation, see clone_node().
220 continue;
221 }
222 {
223 // Check that value is used in memory address in
224 // instructions with embedded load (CmpP val1,(val2+off)).
225 Node* base;
226 Node* index;
227 const MachOper* oper = mach->memory_inputs(base, index);
228 if (oper == NULL || oper == (MachOper*)-1) {
229 continue; // Not an memory op; skip it
230 }
231 if (val == base ||
232 (val == index && val->bottom_type()->isa_narrowoop())) {
233 break; // Found it
234 } else {
235 continue; // Skip it
236 }
237 }
238 break;
239 }
240
241 // On some OSes (AIX) the page at address 0 is only write protected.
242 // If so, only Store operations will trap.
243 // But a read accessing the base of a heap-based compressed heap will trap.
244 if (!was_store && needs_explicit_null_check_for_read(val)) {
245 continue;
246 }
247
248 // Check that node's control edge is not-null block's head or dominates it,
249 // otherwise we can't hoist it because there are other control dependencies.
250 Node* ctrl = mach->in(0);
251 if (ctrl != NULL && !(ctrl == not_null_block->head() ||
252 get_block_for_node(ctrl)->dominates(not_null_block))) {
253 continue;
254 }
255
256 // check if the offset is not too high for implicit exception
257 {
258 intptr_t offset = 0;
259 const TypePtr *adr_type = NULL; // Do not need this return value here
260 const Node* base = mach->get_base_and_disp(offset, adr_type);
261 if (base == NULL || base == NodeSentinel) {
262 // Narrow oop address doesn't have base, only index.
263 // Give up if offset is beyond page size or if heap base is not protected.
264 if (val->bottom_type()->isa_narrowoop() &&
265 (MacroAssembler::needs_explicit_null_check(offset) ||
266 !Universe::narrow_oop_use_implicit_null_checks()))
267 continue;
268 // cannot reason about it; is probably not implicit null exception
269 } else {
270 const TypePtr* tptr;
271 if (UseCompressedOops && (Universe::narrow_oop_shift() == 0 ||
272 Universe::narrow_klass_shift() == 0)) {
273 // 32-bits narrow oop can be the base of address expressions
274 tptr = base->get_ptr_type();
275 } else {
276 // only regular oops are expected here
277 tptr = base->bottom_type()->is_ptr();
278 }
279 // Give up if offset is not a compile-time constant.
280 if (offset == Type::OffsetBot || tptr->_offset == Type::OffsetBot)
281 continue;
282 offset += tptr->_offset; // correct if base is offseted
283 // Give up if reference is beyond page size.
284 if (MacroAssembler::needs_explicit_null_check(offset))
285 continue;
286 // Give up if base is a decode node and the heap base is not protected.
287 if (base->is_Mach() && base->as_Mach()->ideal_Opcode() == Op_DecodeN &&
288 !Universe::narrow_oop_use_implicit_null_checks())
289 continue;
290 }
291 }
292
293 // Check ctrl input to see if the null-check dominates the memory op
294 Block *cb = get_block_for_node(mach);
295 cb = cb->_idom; // Always hoist at least 1 block
296 if( !was_store ) { // Stores can be hoisted only one block
297 while( cb->_dom_depth > (block->_dom_depth + 1))
298 cb = cb->_idom; // Hoist loads as far as we want
299 // The non-null-block should dominate the memory op, too. Live
300 // range spilling will insert a spill in the non-null-block if it is
301 // needs to spill the memory op for an implicit null check.
302 if (cb->_dom_depth == (block->_dom_depth + 1)) {
303 if (cb != not_null_block) continue;
304 cb = cb->_idom;
305 }
306 }
307 if( cb != block ) continue;
308
309 // Found a memory user; see if it can be hoisted to check-block
310 uint vidx = 0; // Capture index of value into memop
311 uint j;
312 for( j = mach->req()-1; j > 0; j-- ) {
313 if( mach->in(j) == val ) {
314 vidx = j;
315 // Ignore DecodeN val which could be hoisted to where needed.
316 if( is_decoden ) continue;
317 }
318 // Block of memory-op input
319 Block *inb = get_block_for_node(mach->in(j));
320 Block *b = block; // Start from nul check
321 while( b != inb && b->_dom_depth > inb->_dom_depth )
322 b = b->_idom; // search upwards for input
323 // See if input dominates null check
324 if( b != inb )
325 break;
326 }
327 if( j > 0 )
328 continue;
329 Block *mb = get_block_for_node(mach);
330 // Hoisting stores requires more checks for the anti-dependence case.
331 // Give up hoisting if we have to move the store past any load.
332 if( was_store ) {
333 Block *b = mb; // Start searching here for a local load
334 // mach use (faulting) trying to hoist
335 // n might be blocker to hoisting
336 while( b != block ) {
337 uint k;
338 for( k = 1; k < b->number_of_nodes(); k++ ) {
339 Node *n = b->get_node(k);
340 if( n->needs_anti_dependence_check() &&
341 n->in(LoadNode::Memory) == mach->in(StoreNode::Memory) )
342 break; // Found anti-dependent load
343 }
344 if( k < b->number_of_nodes() )
345 break; // Found anti-dependent load
346 // Make sure control does not do a merge (would have to check allpaths)
347 if( b->num_preds() != 2 ) break;
348 b = get_block_for_node(b->pred(1)); // Move up to predecessor block
349 }
350 if( b != block ) continue;
351 }
352
353 // Make sure this memory op is not already being used for a NullCheck
354 Node *e = mb->end();
355 if( e->is_MachNullCheck() && e->in(1) == mach )
356 continue; // Already being used as a NULL check
357
358 // Found a candidate! Pick one with least dom depth - the highest
359 // in the dom tree should be closest to the null check.
360 if (best == NULL || get_block_for_node(mach)->_dom_depth < get_block_for_node(best)->_dom_depth) {
361 best = mach;
362 bidx = vidx;
363 }
364 }
365 // No candidate!
366 if (best == NULL) {
367 return;
368 }
369
370 // ---- Found an implicit null check
371 #ifndef PRODUCT
372 extern int implicit_null_checks;
373 implicit_null_checks++;
374 #endif
375
376 if( is_decoden ) {
377 // Check if we need to hoist decodeHeapOop_not_null first.
378 Block *valb = get_block_for_node(val);
379 if( block != valb && block->_dom_depth < valb->_dom_depth ) {
380 // Hoist it up to the end of the test block.
381 valb->find_remove(val);
382 block->add_inst(val);
383 map_node_to_block(val, block);
384 // DecodeN on x86 may kill flags. Check for flag-killing projections
385 // that also need to be hoisted.
386 for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) {
387 Node* n = val->fast_out(j);
388 if( n->is_MachProj() ) {
389 get_block_for_node(n)->find_remove(n);
390 block->add_inst(n);
391 map_node_to_block(n, block);
392 }
393 }
394 }
395 }
396 // Hoist the memory candidate up to the end of the test block.
397 Block *old_block = get_block_for_node(best);
398 old_block->find_remove(best);
399 block->add_inst(best);
400 map_node_to_block(best, block);
401
402 // Move the control dependence if it is pinned to not-null block.
403 // Don't change it in other cases: NULL or dominating control.
404 if (best->in(0) == not_null_block->head()) {
405 // Set it to control edge of null check.
406 best->set_req(0, proj->in(0)->in(0));
407 }
408
409 // Check for flag-killing projections that also need to be hoisted
410 // Should be DU safe because no edge updates.
411 for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) {
412 Node* n = best->fast_out(j);
413 if( n->is_MachProj() || n->Opcode() == Op_ShenandoahWBMemProj) {
414 get_block_for_node(n)->find_remove(n);
415 block->add_inst(n);
416 map_node_to_block(n, block);
417 }
418 }
419
420 // proj==Op_True --> ne test; proj==Op_False --> eq test.
421 // One of two graph shapes got matched:
422 // (IfTrue (If (Bool NE (CmpP ptr NULL))))
423 // (IfFalse (If (Bool EQ (CmpP ptr NULL))))
424 // NULL checks are always branch-if-eq. If we see a IfTrue projection
425 // then we are replacing a 'ne' test with a 'eq' NULL check test.
426 // We need to flip the projections to keep the same semantics.
427 if( proj->Opcode() == Op_IfTrue ) {
428 // Swap order of projections in basic block to swap branch targets
429 Node *tmp1 = block->get_node(block->end_idx()+1);
430 Node *tmp2 = block->get_node(block->end_idx()+2);
431 block->map_node(tmp2, block->end_idx()+1);
432 block->map_node(tmp1, block->end_idx()+2);
433 Node *tmp = new Node(C->top()); // Use not NULL input
434 tmp1->replace_by(tmp);
435 tmp2->replace_by(tmp1);
436 tmp->replace_by(tmp2);
437 tmp->destruct();
438 }
439
440 // Remove the existing null check; use a new implicit null check instead.
441 // Since schedule-local needs precise def-use info, we need to correct
442 // it as well.
443 Node *old_tst = proj->in(0);
444 MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx);
445 block->map_node(nul_chk, block->end_idx());
446 map_node_to_block(nul_chk, block);
447 // Redirect users of old_test to nul_chk
448 for (DUIterator_Last i2min, i2 = old_tst->last_outs(i2min); i2 >= i2min; --i2)
449 old_tst->last_out(i2)->set_req(0, nul_chk);
450 // Clean-up any dead code
451 for (uint i3 = 0; i3 < old_tst->req(); i3++) {
452 Node* in = old_tst->in(i3);
453 old_tst->set_req(i3, NULL);
454 if (in->outcnt() == 0) {
455 // Remove dead input node
456 in->disconnect_inputs(NULL, C);
457 block->find_remove(in);
458 }
459 }
460
461 latency_from_uses(nul_chk);
462 latency_from_uses(best);
463
464 // insert anti-dependences to defs in this block
465 if (! best->needs_anti_dependence_check()) {
466 for (uint k = 1; k < block->number_of_nodes(); k++) {
467 Node *n = block->get_node(k);
468 if (n->needs_anti_dependence_check() &&
469 n->in(LoadNode::Memory) == best->in(StoreNode::Memory)) {
470 // Found anti-dependent load
471 insert_anti_dependences(block, n);
472 }
473 }
474 }
475 }
476
477
478 //------------------------------select-----------------------------------------
479 // Select a nice fellow from the worklist to schedule next. If there is only
480 // one choice, then use it. Projections take top priority for correctness
481 // reasons - if I see a projection, then it is next. There are a number of
482 // other special cases, for instructions that consume condition codes, et al.
483 // These are chosen immediately. Some instructions are required to immediately
484 // precede the last instruction in the block, and these are taken last. Of the
485 // remaining cases (most), choose the instruction with the greatest latency
486 // (that is, the most number of pseudo-cycles required to the end of the
487 // routine). If there is a tie, choose the instruction with the most inputs.
488 Node* PhaseCFG::select(
489 Block* block,
490 Node_List &worklist,
491 GrowableArray<int> &ready_cnt,
492 VectorSet &next_call,
493 uint sched_slot,
494 intptr_t* recalc_pressure_nodes) {
495
496 // If only a single entry on the stack, use it
497 uint cnt = worklist.size();
498 if (cnt == 1) {
499 Node *n = worklist[0];
500 worklist.map(0,worklist.pop());
501 return n;
502 }
503
504 uint choice = 0; // Bigger is most important
505 uint latency = 0; // Bigger is scheduled first
506 uint score = 0; // Bigger is better
507 int idx = -1; // Index in worklist
508 int cand_cnt = 0; // Candidate count
509 bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false;
510
511 for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist
512 // Order in worklist is used to break ties.
513 // See caller for how this is used to delay scheduling
514 // of induction variable increments to after the other
515 // uses of the phi are scheduled.
516 Node *n = worklist[i]; // Get Node on worklist
517
518 int iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : 0;
519 if( n->is_Proj() || // Projections always win
520 n->Opcode()== Op_Con || // So does constant 'Top'
521 iop == Op_CreateEx || // Create-exception must start block
522 iop == Op_CheckCastPP
523 ) {
524 worklist.map(i,worklist.pop());
525 return n;
526 }
527
528 // Final call in a block must be adjacent to 'catch'
529 Node *e = block->end();
530 if( e->is_Catch() && e->in(0)->in(0) == n )
531 continue;
532
533 // Memory op for an implicit null check has to be at the end of the block
534 if( e->is_MachNullCheck() && e->in(1) == n )
535 continue;
536
537 // Schedule IV increment last.
538 if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Op_CountedLoopEnd) {
539 // Cmp might be matched into CountedLoopEnd node.
540 Node *cmp = (e->in(1)->ideal_reg() == Op_RegFlags) ? e->in(1) : e;
541 if (cmp->req() > 1 && cmp->in(1) == n && n->is_iteratively_computed()) {
542 continue;
543 }
544 }
545
546 uint n_choice = 2;
547
548 // See if this instruction is consumed by a branch. If so, then (as the
549 // branch is the last instruction in the basic block) force it to the
550 // end of the basic block
551 if ( must_clone[iop] ) {
552 // See if any use is a branch
553 bool found_machif = false;
554
555 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
556 Node* use = n->fast_out(j);
557
558 // The use is a conditional branch, make them adjacent
559 if (use->is_MachIf() && get_block_for_node(use) == block) {
560 found_machif = true;
561 break;
562 }
563
564 // More than this instruction pending for successor to be ready,
565 // don't choose this if other opportunities are ready
566 if (ready_cnt.at(use->_idx) > 1)
567 n_choice = 1;
568 }
569
570 // loop terminated, prefer not to use this instruction
571 if (found_machif)
572 continue;
573 }
574
575 // See if this has a predecessor that is "must_clone", i.e. sets the
576 // condition code. If so, choose this first
577 for (uint j = 0; j < n->req() ; j++) {
578 Node *inn = n->in(j);
579 if (inn) {
580 if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) {
581 n_choice = 3;
582 break;
583 }
584 }
585 }
586
587 // MachTemps should be scheduled last so they are near their uses
588 if (n->is_MachTemp()) {
589 n_choice = 1;
590 }
591
592 uint n_latency = get_latency_for_node(n);
593 uint n_score = n->req(); // Many inputs get high score to break ties
594
595 if (OptoRegScheduling && block_size_threshold_ok) {
596 if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) {
597 _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit());
598 _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit());
599 // simulate the notion that we just picked this node to schedule
600 n->add_flag(Node::Flag_is_scheduled);
601 // now caculate its effect upon the graph if we did
602 adjust_register_pressure(n, block, recalc_pressure_nodes, false);
603 // return its state for finalize in case somebody else wins
604 n->remove_flag(Node::Flag_is_scheduled);
605 // now save the two final pressure components of register pressure, limiting pressure calcs to short size
606 short int_pressure = (short)_regalloc->_scratch_int_pressure.current_pressure();
607 short float_pressure = (short)_regalloc->_scratch_float_pressure.current_pressure();
608 recalc_pressure_nodes[n->_idx] = int_pressure;
609 recalc_pressure_nodes[n->_idx] |= (float_pressure << 16);
610 }
611
612 if (_scheduling_for_pressure) {
613 latency = n_latency;
614 if (n_choice != 3) {
615 // Now evaluate each register pressure component based on threshold in the score.
616 // In general the defining register type will dominate the score, ergo we will not see register pressure grow on both banks
617 // on a single instruction, but we might see it shrink on both banks.
618 // For each use of register that has a register class that is over the high pressure limit, we build n_score up for
619 // live ranges that terminate on this instruction.
620 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
621 short int_pressure = (short)recalc_pressure_nodes[n->_idx];
622 n_score = (int_pressure < 0) ? ((score + n_score) - int_pressure) : (int_pressure > 0) ? 1 : n_score;
623 }
624 if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
625 short float_pressure = (short)(recalc_pressure_nodes[n->_idx] >> 16);
626 n_score = (float_pressure < 0) ? ((score + n_score) - float_pressure) : (float_pressure > 0) ? 1 : n_score;
627 }
628 } else {
629 // make sure we choose these candidates
630 score = 0;
631 }
632 }
633 }
634
635 // Keep best latency found
636 cand_cnt++;
637 if (choice < n_choice ||
638 (choice == n_choice &&
639 ((StressLCM && Compile::randomized_select(cand_cnt)) ||
640 (!StressLCM &&
641 (latency < n_latency ||
642 (latency == n_latency &&
643 (score < n_score))))))) {
644 choice = n_choice;
645 latency = n_latency;
646 score = n_score;
647 idx = i; // Also keep index in worklist
648 }
649 } // End of for all ready nodes in worklist
650
651 assert(idx >= 0, "index should be set");
652 Node *n = worklist[(uint)idx]; // Get the winner
653
654 worklist.map((uint)idx, worklist.pop()); // Compress worklist
655 return n;
656 }
657
658 //-------------------------adjust_register_pressure----------------------------
659 void PhaseCFG::adjust_register_pressure(Node* n, Block* block, intptr_t* recalc_pressure_nodes, bool finalize_mode) {
660 PhaseLive* liveinfo = _regalloc->get_live();
661 IndexSet* liveout = liveinfo->live(block);
662 // first adjust the register pressure for the sources
663 for (uint i = 1; i < n->req(); i++) {
664 bool lrg_ends = false;
665 Node *src_n = n->in(i);
666 if (src_n == NULL) continue;
667 if (!src_n->is_Mach()) continue;
668 uint src = _regalloc->_lrg_map.find(src_n);
669 if (src == 0) continue;
670 LRG& lrg_src = _regalloc->lrgs(src);
671 // detect if the live range ends or not
672 if (liveout->member(src) == false) {
673 lrg_ends = true;
674 for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) {
675 Node* m = src_n->fast_out(j); // Get user
676 if (m == n) continue;
677 if (!m->is_Mach()) continue;
678 MachNode *mach = m->as_Mach();
679 bool src_matches = false;
680 int iop = mach->ideal_Opcode();
681
682 switch (iop) {
683 case Op_StoreB:
684 case Op_StoreC:
685 case Op_StoreCM:
686 case Op_StoreD:
687 case Op_StoreF:
688 case Op_StoreI:
689 case Op_StoreL:
690 case Op_StoreP:
691 case Op_StoreN:
692 case Op_StoreVector:
693 case Op_StoreNKlass:
694 for (uint k = 1; k < m->req(); k++) {
695 Node *in = m->in(k);
696 if (in == src_n) {
697 src_matches = true;
698 break;
699 }
700 }
701 break;
702
703 default:
704 src_matches = true;
705 break;
706 }
707
708 // If we have a store as our use, ignore the non source operands
709 if (src_matches == false) continue;
710
711 // Mark every unscheduled use which is not n with a recalculation
712 if ((get_block_for_node(m) == block) && (!m->is_scheduled())) {
713 if (finalize_mode && !m->is_Phi()) {
714 recalc_pressure_nodes[m->_idx] = 0x7fff7fff;
715 }
716 lrg_ends = false;
717 }
718 }
719 }
720 // if none, this live range ends and we can adjust register pressure
721 if (lrg_ends) {
722 if (finalize_mode) {
723 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
724 } else {
725 _regalloc->lower_pressure(block, 0, lrg_src, NULL, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
726 }
727 }
728 }
729
730 // now add the register pressure from the dest and evaluate which heuristic we should use:
731 // 1.) The default, latency scheduling
732 // 2.) Register pressure scheduling based on the high pressure limit threshold for int or float register stacks
733 uint dst = _regalloc->_lrg_map.find(n);
734 if (dst != 0) {
735 LRG& lrg_dst = _regalloc->lrgs(dst);
736 if (finalize_mode) {
737 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
738 // check to see if we fall over the register pressure cliff here
739 if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
740 _scheduling_for_pressure = true;
741 } else if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
742 _scheduling_for_pressure = true;
743 } else {
744 // restore latency scheduling mode
745 _scheduling_for_pressure = false;
746 }
747 } else {
748 _regalloc->raise_pressure(block, lrg_dst, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
749 }
750 }
751 }
752
753 //------------------------------set_next_call----------------------------------
754 void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) {
755 if( next_call.test_set(n->_idx) ) return;
756 for( uint i=0; i<n->len(); i++ ) {
757 Node *m = n->in(i);
758 if( !m ) continue; // must see all nodes in block that precede call
759 if (get_block_for_node(m) == block) {
760 set_next_call(block, m, next_call);
761 }
762 }
763 }
764
765 //------------------------------needed_for_next_call---------------------------
766 // Set the flag 'next_call' for each Node that is needed for the next call to
767 // be scheduled. This flag lets me bias scheduling so Nodes needed for the
768 // next subroutine call get priority - basically it moves things NOT needed
769 // for the next call till after the call. This prevents me from trying to
770 // carry lots of stuff live across a call.
771 void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) {
772 // Find the next control-defining Node in this block
773 Node* call = NULL;
774 for (DUIterator_Fast imax, i = this_call->fast_outs(imax); i < imax; i++) {
775 Node* m = this_call->fast_out(i);
776 if (get_block_for_node(m) == block && // Local-block user
777 m != this_call && // Not self-start node
778 m->is_MachCall()) {
779 call = m;
780 break;
781 }
782 }
783 if (call == NULL) return; // No next call (e.g., block end is near)
784 // Set next-call for all inputs to this call
785 set_next_call(block, call, next_call);
786 }
787
788 //------------------------------add_call_kills-------------------------------------
789 // helper function that adds caller save registers to MachProjNode
790 static void add_call_kills(MachProjNode *proj, RegMask& regs, const char* save_policy, bool exclude_soe, bool exclude_fp) {
791 // Fill in the kill mask for the call
792 for( OptoReg::Name r = OptoReg::Name(0); r < _last_Mach_Reg; r=OptoReg::add(r,1) ) {
793 if (exclude_fp && (register_save_type[r] == Op_RegF || register_save_type[r] == Op_RegD)) {
794 continue;
795 }
796 if( !regs.Member(r) ) { // Not already defined by the call
797 // Save-on-call register?
798 if ((save_policy[r] == 'C') ||
799 (save_policy[r] == 'A') ||
800 ((save_policy[r] == 'E') && exclude_soe)) {
801 proj->_rout.Insert(r);
802 }
803 }
804 }
805 }
806
807
808 //------------------------------sched_call-------------------------------------
809 uint PhaseCFG::sched_call(Block* block, uint node_cnt, Node_List& worklist, GrowableArray<int>& ready_cnt, MachCallNode* mcall, VectorSet& next_call) {
810 RegMask regs;
811
812 // Schedule all the users of the call right now. All the users are
813 // projection Nodes, so they must be scheduled next to the call.
814 // Collect all the defined registers.
815 for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) {
816 Node* n = mcall->fast_out(i);
817 assert( n->is_MachProj(), "" );
818 int n_cnt = ready_cnt.at(n->_idx)-1;
819 ready_cnt.at_put(n->_idx, n_cnt);
820 assert( n_cnt == 0, "" );
821 // Schedule next to call
822 block->map_node(n, node_cnt++);
823 // Collect defined registers
824 regs.OR(n->out_RegMask());
825 // Check for scheduling the next control-definer
826 if( n->bottom_type() == Type::CONTROL )
827 // Warm up next pile of heuristic bits
828 needed_for_next_call(block, n, next_call);
829
830 // Children of projections are now all ready
831 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
832 Node* m = n->fast_out(j); // Get user
833 if(get_block_for_node(m) != block) {
834 continue;
835 }
836 if( m->is_Phi() ) continue;
837 int m_cnt = ready_cnt.at(m->_idx) - 1;
838 ready_cnt.at_put(m->_idx, m_cnt);
839 if( m_cnt == 0 )
840 worklist.push(m);
841 }
842
843 }
844
845 // Act as if the call defines the Frame Pointer.
846 // Certainly the FP is alive and well after the call.
847 regs.Insert(_matcher.c_frame_pointer());
848
849 // Set all registers killed and not already defined by the call.
850 uint r_cnt = mcall->tf()->range()->cnt();
851 int op = mcall->ideal_Opcode();
852 MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj );
853 map_node_to_block(proj, block);
854 block->insert_node(proj, node_cnt++);
855
856 // Select the right register save policy.
857 const char *save_policy = NULL;
858 switch (op) {
859 case Op_CallRuntime:
860 case Op_CallLeaf:
861 case Op_CallLeafNoFP:
862 // Calling C code so use C calling convention
863 save_policy = _matcher._c_reg_save_policy;
864 break;
865
866 case Op_CallStaticJava:
867 case Op_CallDynamicJava:
868 // Calling Java code so use Java calling convention
869 save_policy = _matcher._register_save_policy;
870 break;
871
872 default:
873 ShouldNotReachHere();
874 }
875
876 // When using CallRuntime mark SOE registers as killed by the call
877 // so values that could show up in the RegisterMap aren't live in a
878 // callee saved register since the register wouldn't know where to
879 // find them. CallLeaf and CallLeafNoFP are ok because they can't
880 // have debug info on them. Strictly speaking this only needs to be
881 // done for oops since idealreg2debugmask takes care of debug info
882 // references but there no way to handle oops differently than other
883 // pointers as far as the kill mask goes.
884 bool exclude_soe = op == Op_CallRuntime;
885
886 // If the call is a MethodHandle invoke, we need to exclude the
887 // register which is used to save the SP value over MH invokes from
888 // the mask. Otherwise this register could be used for
889 // deoptimization information.
890 if (op == Op_CallStaticJava) {
891 MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall;
892 if (mcallstaticjava->_method_handle_invoke)
893 proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask());
894 }
895
896 if (UseShenandoahGC && mcall->entry_point() == StubRoutines::shenandoah_wb_C()) {
897 assert(op == Op_CallLeafNoFP, "shenandoah_wb_C should be called with Op_CallLeafNoFP");
898 add_call_kills(proj, regs, save_policy, exclude_soe, true);
899 } else {
900 add_call_kills(proj, regs, save_policy, exclude_soe, false);
901 }
902
903 return node_cnt;
904 }
905
906 void PhaseCFG::push_ready_nodes(Node* n, Node* m, Block* block, GrowableArray<int>& ready_cnt, Node_List& worklist, uint max_idx, int c) {
907 if (get_block_for_node(m) != block) {
908 return;
909 }
910 if (m->is_Phi()) {
911 return;
912 }
913 if (m->_idx >= max_idx) { // new node, skip it
914 assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types");
915 return;
916 }
917 int m_cnt = ready_cnt.at(m->_idx) - c;
918 ready_cnt.at_put(m->_idx, m_cnt);
919 if (m_cnt == 0) {
920 worklist.push(m);
921 }
922 }
923
924 //------------------------------schedule_local---------------------------------
925 // Topological sort within a block. Someday become a real scheduler.
926 bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) {
927 // Already "sorted" are the block start Node (as the first entry), and
928 // the block-ending Node and any trailing control projections. We leave
929 // these alone. PhiNodes and ParmNodes are made to follow the block start
930 // Node. Everything else gets topo-sorted.
931
932 #ifndef PRODUCT
933 if (trace_opto_pipelining()) {
934 tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order);
935 for (uint i = 0;i < block->number_of_nodes(); i++) {
936 tty->print("# ");
937 block->get_node(i)->fast_dump();
938 }
939 tty->print_cr("#");
940 }
941 #endif
942
943 // RootNode is already sorted
944 if (block->number_of_nodes() == 1) {
945 return true;
946 }
947
948 bool block_size_threshold_ok = (block->number_of_nodes() > 10) ? true : false;
949
950 // We track the uses of local definitions as input dependences so that
951 // we know when a given instruction is avialable to be scheduled.
952 uint i;
953 if (OptoRegScheduling && block_size_threshold_ok) {
954 for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc
955 Node *n = block->get_node(i);
956 n->remove_flag(Node::Flag_is_scheduled);
957 if (!n->is_Phi()) {
958 recalc_pressure_nodes[n->_idx] = 0x7fff7fff;
959 }
960 }
961 } else {
962 #ifdef ASSERT
963 for (i = 1; i < block->number_of_nodes(); i++) {
964 Node *n = block->get_node(i);
965 assert(!n->is_scheduled(), "shouldn't be scheduled yet");
966 }
967 #endif
968 }
969
970 // Move PhiNodes and ParmNodes from 1 to cnt up to the start
971 uint node_cnt = block->end_idx();
972 uint phi_cnt = 1;
973 for( i = 1; i<node_cnt; i++ ) { // Scan for Phi
974 Node *n = block->get_node(i);
975 if( n->is_Phi() || // Found a PhiNode or ParmNode
976 (n->is_Proj() && n->in(0) == block->head()) ) {
977 // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt
978 block->map_node(block->get_node(phi_cnt), i);
979 block->map_node(n, phi_cnt++); // swap Phi/Parm up front
980 // mark n as scheduled
981 n->add_flag(Node::Flag_is_scheduled);
982 } else { // All others
983 // Count block-local inputs to 'n'
984 uint cnt = n->len(); // Input count
985 uint local = 0;
986 for( uint j=0; j<cnt; j++ ) {
987 Node *m = n->in(j);
988 if( m && get_block_for_node(m) == block && !m->is_top() )
989 local++; // One more block-local input
990 }
991 ready_cnt.at_put(n->_idx, local); // Count em up
992
993 #ifdef ASSERT
994 if( UseConcMarkSweepGC || UseG1GC ) {
995 if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_StoreCM ) {
996 // Check the precedence edges
997 for (uint prec = n->req(); prec < n->len(); prec++) {
998 Node* oop_store = n->in(prec);
999 if (oop_store != NULL) {
1000 assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark");
1001 }
1002 }
1003 }
1004 }
1005 #endif
1006
1007 // A few node types require changing a required edge to a precedence edge
1008 // before allocation.
1009 if( n->is_Mach() && n->req() > TypeFunc::Parms &&
1010 (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire ||
1011 n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) {
1012 // MemBarAcquire could be created without Precedent edge.
1013 // del_req() replaces the specified edge with the last input edge
1014 // and then removes the last edge. If the specified edge > number of
1015 // edges the last edge will be moved outside of the input edges array
1016 // and the edge will be lost. This is why this code should be
1017 // executed only when Precedent (== TypeFunc::Parms) edge is present.
1018 Node *x = n->in(TypeFunc::Parms);
1019 if (x != NULL && get_block_for_node(x) == block && n->find_prec_edge(x) != -1) {
1020 // Old edge to node within same block will get removed, but no precedence
1021 // edge will get added because it already exists. Update ready count.
1022 int cnt = ready_cnt.at(n->_idx);
1023 assert(cnt > 1, "MemBar node %d must not get ready here", n->_idx);
1024 ready_cnt.at_put(n->_idx, cnt-1);
1025 }
1026 n->del_req(TypeFunc::Parms);
1027 n->add_prec(x);
1028 }
1029 }
1030 }
1031 for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count
1032 ready_cnt.at_put(block->get_node(i2)->_idx, 0);
1033
1034 // All the prescheduled guys do not hold back internal nodes
1035 uint i3;
1036 for (i3 = 0; i3 < phi_cnt; i3++) { // For all pre-scheduled
1037 Node *n = block->get_node(i3); // Get pre-scheduled
1038 for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
1039 Node* m = n->fast_out(j);
1040 if (get_block_for_node(m) == block) { // Local-block user
1041 int m_cnt = ready_cnt.at(m->_idx)-1;
1042 // mark m as scheduled
1043 if (m_cnt < 0) {
1044 m->add_flag(Node::Flag_is_scheduled);
1045 }
1046 ready_cnt.at_put(m->_idx, m_cnt); // Fix ready count
1047 }
1048 }
1049 }
1050
1051 Node_List delay;
1052 // Make a worklist
1053 Node_List worklist;
1054 for(uint i4=i3; i4<node_cnt; i4++ ) { // Put ready guys on worklist
1055 Node *m = block->get_node(i4);
1056 if( !ready_cnt.at(m->_idx) ) { // Zero ready count?
1057 if (m->is_iteratively_computed()) {
1058 // Push induction variable increments last to allow other uses
1059 // of the phi to be scheduled first. The select() method breaks
1060 // ties in scheduling by worklist order.
1061 delay.push(m);
1062 } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) {
1063 // Force the CreateEx to the top of the list so it's processed
1064 // first and ends up at the start of the block.
1065 worklist.insert(0, m);
1066 } else {
1067 worklist.push(m); // Then on to worklist!
1068 }
1069 }
1070 }
1071 while (delay.size()) {
1072 Node* d = delay.pop();
1073 worklist.push(d);
1074 }
1075
1076 if (OptoRegScheduling && block_size_threshold_ok) {
1077 // To stage register pressure calculations we need to examine the live set variables
1078 // breaking them up by register class to compartmentalize the calculations.
1079 uint float_pressure = Matcher::float_pressure(FLOATPRESSURE);
1080 _regalloc->_sched_int_pressure.init(INTPRESSURE);
1081 _regalloc->_sched_float_pressure.init(float_pressure);
1082 _regalloc->_scratch_int_pressure.init(INTPRESSURE);
1083 _regalloc->_scratch_float_pressure.init(float_pressure);
1084
1085 _regalloc->compute_entry_block_pressure(block);
1086 }
1087
1088 // Warm up the 'next_call' heuristic bits
1089 needed_for_next_call(block, block->head(), next_call);
1090
1091 #ifndef PRODUCT
1092 if (trace_opto_pipelining()) {
1093 for (uint j=0; j< block->number_of_nodes(); j++) {
1094 Node *n = block->get_node(j);
1095 int idx = n->_idx;
1096 tty->print("# ready cnt:%3d ", ready_cnt.at(idx));
1097 tty->print("latency:%3d ", get_latency_for_node(n));
1098 tty->print("%4d: %s\n", idx, n->Name());
1099 }
1100 }
1101 #endif
1102
1103 uint max_idx = (uint)ready_cnt.length();
1104 // Pull from worklist and schedule
1105 while( worklist.size() ) { // Worklist is not ready
1106
1107 #ifndef PRODUCT
1108 if (trace_opto_pipelining()) {
1109 tty->print("# ready list:");
1110 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1111 Node *n = worklist[i]; // Get Node on worklist
1112 tty->print(" %d", n->_idx);
1113 }
1114 tty->cr();
1115 }
1116 #endif
1117
1118 // Select and pop a ready guy from worklist
1119 Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt, recalc_pressure_nodes);
1120 block->map_node(n, phi_cnt++); // Schedule him next
1121
1122 n->add_flag(Node::Flag_is_scheduled);
1123
1124 if (OptoRegScheduling && block_size_threshold_ok) {
1125 // Now adjust the resister pressure with the node we selected
1126 if (!n->is_Phi()) {
1127 adjust_register_pressure(n, block, recalc_pressure_nodes, true);
1128 }
1129 }
1130
1131 #ifndef PRODUCT
1132 if (trace_opto_pipelining()) {
1133 tty->print("# select %d: %s", n->_idx, n->Name());
1134 tty->print(", latency:%d", get_latency_for_node(n));
1135 n->dump();
1136 if (Verbose) {
1137 tty->print("# ready list:");
1138 for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1139 Node *n = worklist[i]; // Get Node on worklist
1140 tty->print(" %d", n->_idx);
1141 }
1142 tty->cr();
1143 }
1144 }
1145
1146 #endif
1147 if( n->is_MachCall() ) {
1148 MachCallNode *mcall = n->as_MachCall();
1149 phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call);
1150 continue;
1151 }
1152
1153 if (n->is_Mach() && n->as_Mach()->has_call()) {
1154 RegMask regs;
1155 regs.Insert(_matcher.c_frame_pointer());
1156 regs.OR(n->out_RegMask());
1157
1158 MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj );
1159 map_node_to_block(proj, block);
1160 block->insert_node(proj, phi_cnt++);
1161
1162 add_call_kills(proj, regs, _matcher._c_reg_save_policy, false, false);
1163 }
1164
1165 // Children are now all ready
1166 for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) {
1167 Node* m = n->fast_out(i5); // Get user
1168 push_ready_nodes(n, m, block, ready_cnt, worklist, max_idx, 1);
1169 }
1170
1171 #if INCLUDE_SHENANDOAHGC
1172 replace_uses_with_shenandoah_barrier(n, block, worklist, ready_cnt, max_idx, phi_cnt);
1173 #endif
1174 }
1175
1176 if( phi_cnt != block->end_idx() ) {
1177 // did not schedule all. Retry, Bailout, or Die
1178 if (C->subsume_loads() == true && !C->failing()) {
1179 // Retry with subsume_loads == false
1180 // If this is the first failure, the sentinel string will "stick"
1181 // to the Compile object, and the C2Compiler will see it and retry.
1182 C->record_failure(C2Compiler::retry_no_subsuming_loads());
1183 } else {
1184 assert(false, "graph should be schedulable");
1185 }
1186 // assert( phi_cnt == end_idx(), "did not schedule all" );
1187 return false;
1188 }
1189
1190 if (OptoRegScheduling && block_size_threshold_ok) {
1191 _regalloc->compute_exit_block_pressure(block);
1192 block->_reg_pressure = _regalloc->_sched_int_pressure.final_pressure();
1193 block->_freg_pressure = _regalloc->_sched_float_pressure.final_pressure();
1194 }
1195
1196 #ifndef PRODUCT
1197 if (trace_opto_pipelining()) {
1198 tty->print_cr("#");
1199 tty->print_cr("# after schedule_local");
1200 for (uint i = 0;i < block->number_of_nodes();i++) {
1201 tty->print("# ");
1202 block->get_node(i)->fast_dump();
1203 }
1204 tty->print_cr("# ");
1205
1206 if (OptoRegScheduling && block_size_threshold_ok) {
1207 tty->print_cr("# pressure info : %d", block->_pre_order);
1208 _regalloc->print_pressure_info(_regalloc->_sched_int_pressure, "int register info");
1209 _regalloc->print_pressure_info(_regalloc->_sched_float_pressure, "float register info");
1210 }
1211 tty->cr();
1212 }
1213 #endif
1214
1215 return true;
1216 }
1217
1218 //--------------------------catch_cleanup_fix_all_inputs-----------------------
1219 static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) {
1220 for (uint l = 0; l < use->len(); l++) {
1221 if (use->in(l) == old_def) {
1222 if (l < use->req()) {
1223 use->set_req(l, new_def);
1224 } else {
1225 use->rm_prec(l);
1226 use->add_prec(new_def);
1227 l--;
1228 }
1229 }
1230 }
1231 }
1232
1233 //------------------------------catch_cleanup_find_cloned_def------------------
1234 Node* PhaseCFG::catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1235 assert( use_blk != def_blk, "Inter-block cleanup only");
1236
1237 // The use is some block below the Catch. Find and return the clone of the def
1238 // that dominates the use. If there is no clone in a dominating block, then
1239 // create a phi for the def in a dominating block.
1240
1241 // Find which successor block dominates this use. The successor
1242 // blocks must all be single-entry (from the Catch only; I will have
1243 // split blocks to make this so), hence they all dominate.
1244 while( use_blk->_dom_depth > def_blk->_dom_depth+1 )
1245 use_blk = use_blk->_idom;
1246
1247 // Find the successor
1248 Node *fixup = NULL;
1249
1250 uint j;
1251 for( j = 0; j < def_blk->_num_succs; j++ )
1252 if( use_blk == def_blk->_succs[j] )
1253 break;
1254
1255 if( j == def_blk->_num_succs ) {
1256 // Block at same level in dom-tree is not a successor. It needs a
1257 // PhiNode, the PhiNode uses from the def and IT's uses need fixup.
1258 Node_Array inputs = new Node_List(Thread::current()->resource_area());
1259 for(uint k = 1; k < use_blk->num_preds(); k++) {
1260 Block* block = get_block_for_node(use_blk->pred(k));
1261 inputs.map(k, catch_cleanup_find_cloned_def(block, def, def_blk, n_clone_idx));
1262 }
1263
1264 // Check to see if the use_blk already has an identical phi inserted.
1265 // If it exists, it will be at the first position since all uses of a
1266 // def are processed together.
1267 Node *phi = use_blk->get_node(1);
1268 if( phi->is_Phi() ) {
1269 fixup = phi;
1270 for (uint k = 1; k < use_blk->num_preds(); k++) {
1271 if (phi->in(k) != inputs[k]) {
1272 // Not a match
1273 fixup = NULL;
1274 break;
1275 }
1276 }
1277 }
1278
1279 // If an existing PhiNode was not found, make a new one.
1280 if (fixup == NULL) {
1281 Node *new_phi = PhiNode::make(use_blk->head(), def);
1282 use_blk->insert_node(new_phi, 1);
1283 map_node_to_block(new_phi, use_blk);
1284 for (uint k = 1; k < use_blk->num_preds(); k++) {
1285 new_phi->set_req(k, inputs[k]);
1286 }
1287 fixup = new_phi;
1288 }
1289
1290 } else {
1291 // Found the use just below the Catch. Make it use the clone.
1292 fixup = use_blk->get_node(n_clone_idx);
1293 }
1294
1295 return fixup;
1296 }
1297
1298 //--------------------------catch_cleanup_intra_block--------------------------
1299 // Fix all input edges in use that reference "def". The use is in the same
1300 // block as the def and both have been cloned in each successor block.
1301 static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg, int n_clone_idx) {
1302
1303 // Both the use and def have been cloned. For each successor block,
1304 // get the clone of the use, and make its input the clone of the def
1305 // found in that block.
1306
1307 uint use_idx = blk->find_node(use);
1308 uint offset_idx = use_idx - beg;
1309 for( uint k = 0; k < blk->_num_succs; k++ ) {
1310 // Get clone in each successor block
1311 Block *sb = blk->_succs[k];
1312 Node *clone = sb->get_node(offset_idx+1);
1313 assert( clone->Opcode() == use->Opcode(), "" );
1314
1315 // Make use-clone reference the def-clone
1316 catch_cleanup_fix_all_inputs(clone, def, sb->get_node(n_clone_idx));
1317 }
1318 }
1319
1320 //------------------------------catch_cleanup_inter_block---------------------
1321 // Fix all input edges in use that reference "def". The use is in a different
1322 // block than the def.
1323 void PhaseCFG::catch_cleanup_inter_block(Node *use, Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1324 if( !use_blk ) return; // Can happen if the use is a precedence edge
1325
1326 Node *new_def = catch_cleanup_find_cloned_def(use_blk, def, def_blk, n_clone_idx);
1327 catch_cleanup_fix_all_inputs(use, def, new_def);
1328 }
1329
1330 //------------------------------call_catch_cleanup-----------------------------
1331 // If we inserted any instructions between a Call and his CatchNode,
1332 // clone the instructions on all paths below the Catch.
1333 void PhaseCFG::call_catch_cleanup(Block* block) {
1334
1335 // End of region to clone
1336 uint end = block->end_idx();
1337 if( !block->get_node(end)->is_Catch() ) return;
1338 // Start of region to clone
1339 uint beg = end;
1340 while(!block->get_node(beg-1)->is_MachProj() ||
1341 !block->get_node(beg-1)->in(0)->is_MachCall() ) {
1342 beg--;
1343 assert(beg > 0,"Catch cleanup walking beyond block boundary");
1344 }
1345 // Range of inserted instructions is [beg, end)
1346 if( beg == end ) return;
1347
1348 // Clone along all Catch output paths. Clone area between the 'beg' and
1349 // 'end' indices.
1350 for( uint i = 0; i < block->_num_succs; i++ ) {
1351 Block *sb = block->_succs[i];
1352 // Clone the entire area; ignoring the edge fixup for now.
1353 for( uint j = end; j > beg; j-- ) {
1354 Node *clone = block->get_node(j-1)->clone();
1355 sb->insert_node(clone, 1);
1356 map_node_to_block(clone, sb);
1357 if (clone->needs_anti_dependence_check()) {
1358 insert_anti_dependences(sb, clone);
1359 }
1360 }
1361 }
1362
1363
1364 // Fixup edges. Check the def-use info per cloned Node
1365 for(uint i2 = beg; i2 < end; i2++ ) {
1366 uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block
1367 Node *n = block->get_node(i2); // Node that got cloned
1368 // Need DU safe iterator because of edge manipulation in calls.
1369 Unique_Node_List *out = new Unique_Node_List(Thread::current()->resource_area());
1370 for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) {
1371 out->push(n->fast_out(j1));
1372 }
1373 uint max = out->size();
1374 for (uint j = 0; j < max; j++) {// For all users
1375 Node *use = out->pop();
1376 Block *buse = get_block_for_node(use);
1377 if( use->is_Phi() ) {
1378 for( uint k = 1; k < use->req(); k++ )
1379 if( use->in(k) == n ) {
1380 Block* b = get_block_for_node(buse->pred(k));
1381 Node *fixup = catch_cleanup_find_cloned_def(b, n, block, n_clone_idx);
1382 use->set_req(k, fixup);
1383 }
1384 } else {
1385 if (block == buse) {
1386 catch_cleanup_intra_block(use, n, block, beg, n_clone_idx);
1387 } else {
1388 catch_cleanup_inter_block(use, buse, n, block, n_clone_idx);
1389 }
1390 }
1391 } // End for all users
1392
1393 } // End of for all Nodes in cloned area
1394
1395 // Remove the now-dead cloned ops
1396 for(uint i3 = beg; i3 < end; i3++ ) {
1397 block->get_node(beg)->disconnect_inputs(NULL, C);
1398 block->remove_node(beg);
1399 }
1400
1401 // If the successor blocks have a CreateEx node, move it back to the top
1402 for(uint i4 = 0; i4 < block->_num_succs; i4++ ) {
1403 Block *sb = block->_succs[i4];
1404 uint new_cnt = end - beg;
1405 // Remove any newly created, but dead, nodes.
1406 for( uint j = new_cnt; j > 0; j-- ) {
1407 Node *n = sb->get_node(j);
1408 if (n->outcnt() == 0 &&
1409 (!n->is_Proj() || n->as_Proj()->in(0)->outcnt() == 1) ){
1410 n->disconnect_inputs(NULL, C);
1411 sb->remove_node(j);
1412 new_cnt--;
1413 }
1414 }
1415 // If any newly created nodes remain, move the CreateEx node to the top
1416 if (new_cnt > 0) {
1417 Node *cex = sb->get_node(1+new_cnt);
1418 if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) {
1419 sb->remove_node(1+new_cnt);
1420 sb->insert_node(cex, 1);
1421 }
1422 }
1423 }
1424 }