src/cpu/sparc/vm/sparc.ad

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rev 3419 : 7023898: Intrinsify AtomicLongFieldUpdater.getAndIncrement()
Summary: use shorter instruction sequences for atomic add and atomic exchange when possible.
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*** 1836,1845 **** --- 1836,1851 ---- case Op_CountTrailingZerosL: case Op_PopCountI: case Op_PopCountL: if (!UsePopCountInstruction) return false; + case Op_CompareAndSwapL: + #ifdef _LP64 + case Op_CompareAndSwapP: + #endif + if (!VM_Version::supports_cx8()) + return false; break; } return true; // Per default match rules are supported. }
*** 7212,7221 **** --- 7218,7228 ---- %} // No flag versions for CompareAndSwap{P,I,L} because matcher can't match them instruct compareAndSwapL_bool(iRegP mem_ptr, iRegL oldval, iRegL newval, iRegI res, o7RegI tmp1, flagsReg ccr ) %{ + predicate(VM_Version::supports_cx8()); match(Set res (CompareAndSwapL mem_ptr (Binary oldval newval))); effect( USE mem_ptr, KILL ccr, KILL tmp1); format %{ "MOV $newval,O7\n\t" "CASXA [$mem_ptr],$oldval,O7\t! If $oldval==[$mem_ptr] Then store O7 into [$mem_ptr], set O7=[$mem_ptr] in any case\n\t"
*** 7243,7252 **** --- 7250,7262 ---- enc_iflags_ne_to_boolean(res) ); ins_pipe( long_memory_op ); %} instruct compareAndSwapP_bool(iRegP mem_ptr, iRegP oldval, iRegP newval, iRegI res, o7RegI tmp1, flagsReg ccr ) %{ + #ifdef _LP64 + predicate(VM_Version::supports_cx8()); + #endif match(Set res (CompareAndSwapP mem_ptr (Binary oldval newval))); effect( USE mem_ptr, KILL ccr, KILL tmp1); format %{ "MOV $newval,O7\n\t" "CASA_PTR [$mem_ptr],$oldval,O7\t! If $oldval==[$mem_ptr] Then store O7 into [$mem_ptr], set O7=[$mem_ptr] in any case\n\t"
*** 7277,7286 **** --- 7287,7328 ---- ins_encode( enc_casi(mem_ptr, oldval, newval), enc_iflags_ne_to_boolean(res) ); ins_pipe( long_memory_op ); %} + instruct xchgI( memory mem, iRegI newval) %{ + match(Set newval (GetAndSetI mem newval)); + format %{ "SWAP [$mem],$newval" %} + size(4); + ins_encode %{ + __ swap($mem$$Address, $newval$$Register); + %} + ins_pipe( long_memory_op ); + %} + + #ifndef _LP64 + instruct xchgP( memory mem, iRegP newval) %{ + match(Set newval (GetAndSetP mem newval)); + format %{ "SWAP [$mem],$newval" %} + size(4); + ins_encode %{ + __ swap($mem$$Address, $newval$$Register); + %} + ins_pipe( long_memory_op ); + %} + #endif + + instruct xchgN( memory mem, iRegN newval) %{ + match(Set newval (GetAndSetN mem newval)); + format %{ "SWAP [$mem],$newval" %} + size(4); + ins_encode %{ + __ swap($mem$$Address, $newval$$Register); + %} + ins_pipe( long_memory_op ); + %} + //--------------------- // Subtraction Instructions // Register Subtraction instruct subI_reg_reg(iRegI dst, iRegI src1, iRegI src2) %{ match(Set dst (SubI src1 src2));