232
233 void align_backward_branch_target();
234 void align_call(LIR_Code code);
235
236 void negate(LIR_Opr left, LIR_Opr dest);
237 void leal(LIR_Opr left, LIR_Opr dest);
238
239 void rt_call(LIR_Opr result, address dest, const LIR_OprList* args, LIR_Opr tmp, CodeEmitInfo* info);
240
241 void membar();
242 void membar_acquire();
243 void membar_release();
244 void membar_loadload();
245 void membar_storestore();
246 void membar_loadstore();
247 void membar_storeload();
248 void get_thread(LIR_Opr result);
249
250 void verify_oop_map(CodeEmitInfo* info);
251
252 #ifdef TARGET_ARCH_x86
253 # include "c1_LIRAssembler_x86.hpp"
254 #endif
255 #ifdef TARGET_ARCH_sparc
256 # include "c1_LIRAssembler_sparc.hpp"
257 #endif
258 #ifdef TARGET_ARCH_arm
259 # include "c1_LIRAssembler_arm.hpp"
260 #endif
261 #ifdef TARGET_ARCH_ppc
262 # include "c1_LIRAssembler_ppc.hpp"
263 #endif
264
265 };
266
267 #endif // SHARE_VM_C1_C1_LIRASSEMBLER_HPP
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232
233 void align_backward_branch_target();
234 void align_call(LIR_Code code);
235
236 void negate(LIR_Opr left, LIR_Opr dest);
237 void leal(LIR_Opr left, LIR_Opr dest);
238
239 void rt_call(LIR_Opr result, address dest, const LIR_OprList* args, LIR_Opr tmp, CodeEmitInfo* info);
240
241 void membar();
242 void membar_acquire();
243 void membar_release();
244 void membar_loadload();
245 void membar_storestore();
246 void membar_loadstore();
247 void membar_storeload();
248 void get_thread(LIR_Opr result);
249
250 void verify_oop_map(CodeEmitInfo* info);
251
252 void atomic_op(LIR_Code code, LIR_Opr src, LIR_Opr data, LIR_Opr dest, LIR_Opr tmp);
253
254 #ifdef TARGET_ARCH_x86
255 # include "c1_LIRAssembler_x86.hpp"
256 #endif
257 #ifdef TARGET_ARCH_sparc
258 # include "c1_LIRAssembler_sparc.hpp"
259 #endif
260 #ifdef TARGET_ARCH_arm
261 # include "c1_LIRAssembler_arm.hpp"
262 #endif
263 #ifdef TARGET_ARCH_ppc
264 # include "c1_LIRAssembler_ppc.hpp"
265 #endif
266
267 };
268
269 #endif // SHARE_VM_C1_C1_LIRASSEMBLER_HPP
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