src/cpu/sparc/vm/relocInfo_sparc.cpp

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rev 3688 : 7054512: Compress class pointers after perm gen removal
Summary: support of compress class pointers in the compilers.
Reviewed-by:


  80     {
  81     guarantee(Assembler::inv_immed(inst), "must have a simm13 field");
  82     int simm13 = Assembler::low10((intptr_t)x) + o;
  83     guarantee(Assembler::is_simm13(simm13), "offset can't overflow simm13");
  84     inst &= ~Assembler::simm(    -1, 13);
  85     inst |=  Assembler::simm(simm13, 13);
  86     if (verify_only) {
  87       assert(ip->long_at(0) == inst, "instructions must match");
  88     } else {
  89       ip->set_long_at(0, inst);
  90     }
  91     }
  92     break;
  93 
  94   case Assembler::branch_op:
  95     {
  96 #ifdef _LP64
  97     jint inst2;
  98     guarantee(Assembler::inv_op2(inst)==Assembler::sethi_op2, "must be sethi");
  99     if (format() != 0) {
 100       assert(type() == relocInfo::oop_type, "only narrow oops case");
 101       jint np = oopDesc::encode_heap_oop((oop)x);
 102       inst &= ~Assembler::hi22(-1);
 103       inst |=  Assembler::hi22((intptr_t)np);
 104       if (verify_only) {
 105         assert(ip->long_at(0) == inst, "instructions must match");
 106       } else {
 107         ip->set_long_at(0, inst);
 108       }
 109       inst2 = ip->long_at( NativeInstruction::nop_instruction_size );
 110       guarantee(Assembler::inv_op(inst2)==Assembler::arith_op, "arith op");
 111       if (verify_only) {
 112         assert(ip->long_at(NativeInstruction::nop_instruction_size) == NativeInstruction::set_data32_simm13( inst2, (intptr_t)np),
 113                "instructions must match");
 114       } else {
 115         ip->set_long_at(NativeInstruction::nop_instruction_size, NativeInstruction::set_data32_simm13( inst2, (intptr_t)np));
 116       }
 117       break;
 118     }
 119     if (verify_only) {
 120       ip->verify_data64_sethi( ip->addr_at(0), (intptr_t)x );
 121     } else {




  80     {
  81     guarantee(Assembler::inv_immed(inst), "must have a simm13 field");
  82     int simm13 = Assembler::low10((intptr_t)x) + o;
  83     guarantee(Assembler::is_simm13(simm13), "offset can't overflow simm13");
  84     inst &= ~Assembler::simm(    -1, 13);
  85     inst |=  Assembler::simm(simm13, 13);
  86     if (verify_only) {
  87       assert(ip->long_at(0) == inst, "instructions must match");
  88     } else {
  89       ip->set_long_at(0, inst);
  90     }
  91     }
  92     break;
  93 
  94   case Assembler::branch_op:
  95     {
  96 #ifdef _LP64
  97     jint inst2;
  98     guarantee(Assembler::inv_op2(inst)==Assembler::sethi_op2, "must be sethi");
  99     if (format() != 0) {
 100       assert(type() == relocInfo::oop_type || type() == relocInfo::metadata_type, "only narrow oops or klasses case");
 101       jint np = type() == relocInfo::oop_type ? oopDesc::encode_heap_oop((oop)x) : oopDesc::encode_klass((Klass*)x);
 102       inst &= ~Assembler::hi22(-1);
 103       inst |=  Assembler::hi22((intptr_t)np);
 104       if (verify_only) {
 105         assert(ip->long_at(0) == inst, "instructions must match");
 106       } else {
 107         ip->set_long_at(0, inst);
 108       }
 109       inst2 = ip->long_at( NativeInstruction::nop_instruction_size );
 110       guarantee(Assembler::inv_op(inst2)==Assembler::arith_op, "arith op");
 111       if (verify_only) {
 112         assert(ip->long_at(NativeInstruction::nop_instruction_size) == NativeInstruction::set_data32_simm13( inst2, (intptr_t)np),
 113                "instructions must match");
 114       } else {
 115         ip->set_long_at(NativeInstruction::nop_instruction_size, NativeInstruction::set_data32_simm13( inst2, (intptr_t)np));
 116       }
 117       break;
 118     }
 119     if (verify_only) {
 120       ip->verify_data64_sethi( ip->addr_at(0), (intptr_t)x );
 121     } else {