1 /*
2 * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef SHARE_VM_OPTO_MACHNODE_HPP
26 #define SHARE_VM_OPTO_MACHNODE_HPP
27
28 #include "opto/callnode.hpp"
29 #include "opto/matcher.hpp"
30 #include "opto/multnode.hpp"
31 #include "opto/node.hpp"
32 #include "opto/regmask.hpp"
33
34 class BufferBlob;
35 class CodeBuffer;
36 class JVMState;
37 class MachCallDynamicJavaNode;
38 class MachCallJavaNode;
39 class MachCallLeafNode;
40 class MachCallNode;
41 class MachCallRuntimeNode;
42 class MachCallStaticJavaNode;
43 class MachEpilogNode;
44 class MachIfNode;
45 class MachNullCheckNode;
46 class MachOper;
47 class MachProjNode;
48 class MachPrologNode;
49 class MachReturnNode;
50 class MachSafePointNode;
51 class MachSpillCopyNode;
52 class Matcher;
53 class PhaseRegAlloc;
54 class RegMask;
55 class State;
56
57 //---------------------------MachOper------------------------------------------
58 class MachOper : public ResourceObj {
59 public:
60 // Allocate right next to the MachNodes in the same arena
61 void *operator new( size_t x, Compile* C ) { return C->node_arena()->Amalloc_D(x); }
62
63 // Opcode
64 virtual uint opcode() const = 0;
65
66 // Number of input edges.
67 // Generally at least 1
68 virtual uint num_edges() const { return 1; }
69 // Array of Register masks
70 virtual const RegMask *in_RegMask(int index) const;
71
72 // Methods to output the encoding of the operand
73
74 // Negate conditional branches. Error for non-branch Nodes
75 virtual void negate();
76
77 // Return the value requested
78 // result register lookup, corresponding to int_format
79 virtual int reg(PhaseRegAlloc *ra_, const Node *node) const;
80 // input register lookup, corresponding to ext_format
81 virtual int reg(PhaseRegAlloc *ra_, const Node *node, int idx) const;
82
83 // helpers for MacroAssembler generation from ADLC
84 Register as_Register(PhaseRegAlloc *ra_, const Node *node) const {
85 return ::as_Register(reg(ra_, node));
86 }
87 Register as_Register(PhaseRegAlloc *ra_, const Node *node, int idx) const {
88 return ::as_Register(reg(ra_, node, idx));
89 }
90 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node) const {
91 return ::as_FloatRegister(reg(ra_, node));
92 }
93 FloatRegister as_FloatRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
94 return ::as_FloatRegister(reg(ra_, node, idx));
95 }
96
97 #if defined(IA32) || defined(AMD64)
98 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node) const {
99 return ::as_XMMRegister(reg(ra_, node));
100 }
101 XMMRegister as_XMMRegister(PhaseRegAlloc *ra_, const Node *node, int idx) const {
102 return ::as_XMMRegister(reg(ra_, node, idx));
103 }
104 #endif
105
106 virtual intptr_t constant() const;
107 virtual bool constant_is_oop() const;
108 virtual jdouble constantD() const;
109 virtual jfloat constantF() const;
110 virtual jlong constantL() const;
111 virtual TypeOopPtr *oop() const;
112 virtual int ccode() const;
113 // A zero, default, indicates this value is not needed.
114 // May need to lookup the base register, as done in int_ and ext_format
115 virtual int base (PhaseRegAlloc *ra_, const Node *node, int idx) const;
116 virtual int index(PhaseRegAlloc *ra_, const Node *node, int idx) const;
117 virtual int scale() const;
118 // Parameters needed to support MEMORY_INTERFACE access to stackSlot
119 virtual int disp (PhaseRegAlloc *ra_, const Node *node, int idx) const;
120 // Check for PC-Relative displacement
121 virtual bool disp_is_oop() const;
122 virtual int constant_disp() const; // usu. 0, may return Type::OffsetBot
123 virtual int base_position() const; // base edge position, or -1
124 virtual int index_position() const; // index edge position, or -1
125
126 // Access the TypeKlassPtr of operands with a base==RegI and disp==RegP
127 // Only returns non-null value for i486.ad's indOffset32X
128 virtual const TypePtr *disp_as_type() const { return NULL; }
129
130 // Return the label
131 virtual Label *label() const;
132
133 // Return the method's address
134 virtual intptr_t method() const;
135
136 // Hash and compare over operands are currently identical
137 virtual uint hash() const;
138 virtual uint cmp( const MachOper &oper ) const;
139
140 // Virtual clone, since I do not know how big the MachOper is.
141 virtual MachOper *clone(Compile* C) const = 0;
142
143 // Return ideal Type from simple operands. Fail for complex operands.
144 virtual const Type *type() const;
145
146 // Set an integer offset if we have one, or error otherwise
147 virtual void set_con( jint c0 ) { ShouldNotReachHere(); }
148
149 #ifndef PRODUCT
150 // Return name of operand
151 virtual const char *Name() const { return "???";}
152
153 // Methods to output the text version of the operand
154 virtual void int_format(PhaseRegAlloc *,const MachNode *node, outputStream *st) const = 0;
155 virtual void ext_format(PhaseRegAlloc *,const MachNode *node,int idx, outputStream *st) const=0;
156
157 virtual void dump_spec(outputStream *st) const; // Print per-operand info
158 #endif
159 };
160
161 //------------------------------MachNode---------------------------------------
162 // Base type for all machine specific nodes. All node classes generated by the
163 // ADLC inherit from this class.
164 class MachNode : public Node {
165 public:
166 MachNode() : Node((uint)0), _num_opnds(0), _opnds(NULL) {
167 init_class_id(Class_Mach);
168 }
169 // Required boilerplate
170 virtual uint size_of() const { return sizeof(MachNode); }
171 virtual int Opcode() const; // Always equal to MachNode
172 virtual uint rule() const = 0; // Machine-specific opcode
173 // Number of inputs which come before the first operand.
174 // Generally at least 1, to skip the Control input
175 virtual uint oper_input_base() const { return 1; }
176
177 // Copy inputs and operands to new node of instruction.
178 // Called from cisc_version() and short_branch_version().
179 // !!!! The method's body is defined in ad_<arch>.cpp file.
180 void fill_new_machnode(MachNode *n, Compile* C) const;
181
182 // Return an equivalent instruction using memory for cisc_operand position
183 virtual MachNode *cisc_version(int offset, Compile* C);
184 // Modify this instruction's register mask to use stack version for cisc_operand
185 virtual void use_cisc_RegMask();
186
187 // Support for short branches
188 bool may_be_short_branch() const { return (flags() & Flag_may_be_short_branch) != 0; }
189
190 // Avoid back to back some instructions on some CPUs.
191 bool avoid_back_to_back() const { return (flags() & Flag_avoid_back_to_back) != 0; }
192
193 // instruction implemented with a call
194 bool has_call() const { return (flags() & Flag_has_call) != 0; }
195
196 // First index in _in[] corresponding to operand, or -1 if there is none
197 int operand_index(uint operand) const;
198
199 // Register class input is expected in
200 virtual const RegMask &in_RegMask(uint) const;
201
202 // cisc-spillable instructions redefine for use by in_RegMask
203 virtual const RegMask *cisc_RegMask() const { return NULL; }
204
205 // If this instruction is a 2-address instruction, then return the
206 // index of the input which must match the output. Not nessecary
207 // for instructions which bind the input and output register to the
208 // same singleton regiser (e.g., Intel IDIV which binds AX to be
209 // both an input and an output). It is nessecary when the input and
210 // output have choices - but they must use the same choice.
211 virtual uint two_adr( ) const { return 0; }
212
213 // Array of complex operand pointers. Each corresponds to zero or
214 // more leafs. Must be set by MachNode constructor to point to an
215 // internal array of MachOpers. The MachOper array is sized by
216 // specific MachNodes described in the ADL.
217 uint _num_opnds;
218 MachOper **_opnds;
219 uint num_opnds() const { return _num_opnds; }
220
221 // Emit bytes into cbuf
222 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
223 // Size of instruction in bytes
224 virtual uint size(PhaseRegAlloc *ra_) const;
225 // Helper function that computes size by emitting code
226 virtual uint emit_size(PhaseRegAlloc *ra_) const;
227
228 // Return the alignment required (in units of relocInfo::addr_unit())
229 // for this instruction (must be a power of 2)
230 virtual int alignment_required() const { return 1; }
231
232 // Return the padding (in bytes) to be emitted before this
233 // instruction to properly align it.
234 virtual int compute_padding(int current_offset) const { return 0; }
235
236 // Return number of relocatable values contained in this instruction
237 virtual int reloc() const { return 0; }
238
239 // Hash and compare over operands. Used to do GVN on machine Nodes.
240 virtual uint hash() const;
241 virtual uint cmp( const Node &n ) const;
242
243 // Expand method for MachNode, replaces nodes representing pseudo
244 // instructions with a set of nodes which represent real machine
245 // instructions and compute the same value.
246 virtual MachNode *Expand( State *, Node_List &proj_list, Node* mem ) { return this; }
247
248 // Bottom_type call; value comes from operand0
249 virtual const class Type *bottom_type() const { return _opnds[0]->type(); }
250 virtual uint ideal_reg() const { const Type *t = _opnds[0]->type(); return t == TypeInt::CC ? Op_RegFlags : Matcher::base2reg[t->base()]; }
251
252 // If this is a memory op, return the base pointer and fixed offset.
253 // If there are no such, return NULL. If there are multiple addresses
254 // or the address is indeterminate (rare cases) then return (Node*)-1,
255 // which serves as node bottom.
256 // If the offset is not statically determined, set it to Type::OffsetBot.
257 // This method is free to ignore stack slots if that helps.
258 #define TYPE_PTR_SENTINAL ((const TypePtr*)-1)
259 // Passing TYPE_PTR_SENTINAL as adr_type asks for computation of the adr_type if possible
260 const Node* get_base_and_disp(intptr_t &offset, const TypePtr* &adr_type) const;
261
262 // Helper for get_base_and_disp: find the base and index input nodes.
263 // Returns the MachOper as determined by memory_operand(), for use, if
264 // needed by the caller. If (MachOper *)-1 is returned, base and index
265 // are set to NodeSentinel. If (MachOper *) NULL is returned, base and
266 // index are set to NULL.
267 const MachOper* memory_inputs(Node* &base, Node* &index) const;
268
269 // Helper for memory_inputs: Which operand carries the necessary info?
270 // By default, returns NULL, which means there is no such operand.
271 // If it returns (MachOper*)-1, this means there are multiple memories.
272 virtual const MachOper* memory_operand() const { return NULL; }
273
274 // Call "get_base_and_disp" to decide which category of memory is used here.
275 virtual const class TypePtr *adr_type() const;
276
277 // Apply peephole rule(s) to this instruction
278 virtual MachNode *peephole( Block *block, int block_index, PhaseRegAlloc *ra_, int &deleted, Compile* C );
279
280 // Top-level ideal Opcode matched
281 virtual int ideal_Opcode() const { return Op_Node; }
282
283 // Adds the label for the case
284 virtual void add_case_label( int switch_val, Label* blockLabel);
285
286 // Set the absolute address for methods
287 virtual void method_set( intptr_t addr );
288
289 // Should we clone rather than spill this instruction?
290 bool rematerialize() const;
291
292 // Get the pipeline info
293 static const Pipeline *pipeline_class();
294 virtual const Pipeline *pipeline() const;
295
296 #ifndef PRODUCT
297 virtual const char *Name() const = 0; // Machine-specific name
298 virtual void dump_spec(outputStream *st) const; // Print per-node info
299 void dump_format(PhaseRegAlloc *ra, outputStream *st) const; // access to virtual
300 #endif
301 };
302
303 //------------------------------MachIdealNode----------------------------
304 // Machine specific versions of nodes that must be defined by user.
305 // These are not converted by matcher from ideal nodes to machine nodes
306 // but are inserted into the code by the compiler.
307 class MachIdealNode : public MachNode {
308 public:
309 MachIdealNode( ) {}
310
311 // Define the following defaults for non-matched machine nodes
312 virtual uint oper_input_base() const { return 0; }
313 virtual uint rule() const { return 9999999; }
314 virtual const class Type *bottom_type() const { return _opnds == NULL ? Type::CONTROL : MachNode::bottom_type(); }
315 };
316
317 //------------------------------MachTypeNode----------------------------
318 // Machine Nodes that need to retain a known Type.
319 class MachTypeNode : public MachNode {
320 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
321 public:
322 const Type *_bottom_type;
323
324 virtual const class Type *bottom_type() const { return _bottom_type; }
325 #ifndef PRODUCT
326 virtual void dump_spec(outputStream *st) const;
327 #endif
328 };
329
330 //------------------------------MachBreakpointNode----------------------------
331 // Machine breakpoint or interrupt Node
332 class MachBreakpointNode : public MachIdealNode {
333 public:
334 MachBreakpointNode( ) {}
335 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
336 virtual uint size(PhaseRegAlloc *ra_) const;
337
338 #ifndef PRODUCT
339 virtual const char *Name() const { return "Breakpoint"; }
340 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
341 #endif
342 };
343
344 //------------------------------MachConstantBaseNode--------------------------
345 // Machine node that represents the base address of the constant table.
346 class MachConstantBaseNode : public MachIdealNode {
347 public:
348 static const RegMask& _out_RegMask; // We need the out_RegMask statically in MachConstantNode::in_RegMask().
349
350 public:
351 MachConstantBaseNode() : MachIdealNode() {
352 init_class_id(Class_MachConstantBase);
353 }
354 virtual const class Type* bottom_type() const { return TypeRawPtr::NOTNULL; }
355 virtual uint ideal_reg() const { return Op_RegP; }
356 virtual uint oper_input_base() const { return 1; }
357
358 virtual void emit(CodeBuffer& cbuf, PhaseRegAlloc* ra_) const;
359 virtual uint size(PhaseRegAlloc* ra_) const;
360 virtual bool pinned() const { return UseRDPCForConstantTableBase; }
361
362 static const RegMask& static_out_RegMask() { return _out_RegMask; }
363 virtual const RegMask& out_RegMask() const { return static_out_RegMask(); }
364
365 #ifndef PRODUCT
366 virtual const char* Name() const { return "MachConstantBaseNode"; }
367 virtual void format(PhaseRegAlloc*, outputStream* st) const;
368 #endif
369 };
370
371 //------------------------------MachConstantNode-------------------------------
372 // Machine node that holds a constant which is stored in the constant table.
373 class MachConstantNode : public MachNode {
374 protected:
375 Compile::Constant _constant; // This node's constant.
376
377 public:
378 MachConstantNode() : MachNode() {
379 init_class_id(Class_MachConstant);
380 }
381
382 virtual void eval_constant(Compile* C) {
383 #ifdef ASSERT
384 tty->print("missing MachConstantNode eval_constant function: ");
385 dump();
386 #endif
387 ShouldNotCallThis();
388 }
389
390 virtual const RegMask &in_RegMask(uint idx) const {
391 if (idx == mach_constant_base_node_input())
392 return MachConstantBaseNode::static_out_RegMask();
393 return MachNode::in_RegMask(idx);
394 }
395
396 // Input edge of MachConstantBaseNode.
397 uint mach_constant_base_node_input() const { return req() - 1; }
398
399 int constant_offset();
400 int constant_offset() const { return ((MachConstantNode*) this)->constant_offset(); }
401 };
402
403 //------------------------------MachUEPNode-----------------------------------
404 // Machine Unvalidated Entry Point Node
405 class MachUEPNode : public MachIdealNode {
406 public:
407 MachUEPNode( ) {}
408 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
409 virtual uint size(PhaseRegAlloc *ra_) const;
410
411 #ifndef PRODUCT
412 virtual const char *Name() const { return "Unvalidated-Entry-Point"; }
413 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
414 #endif
415 };
416
417 //------------------------------MachPrologNode--------------------------------
418 // Machine function Prolog Node
419 class MachPrologNode : public MachIdealNode {
420 public:
421 MachPrologNode( ) {}
422 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
423 virtual uint size(PhaseRegAlloc *ra_) const;
424 virtual int reloc() const;
425
426 #ifndef PRODUCT
427 virtual const char *Name() const { return "Prolog"; }
428 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
429 #endif
430 };
431
432 //------------------------------MachEpilogNode--------------------------------
433 // Machine function Epilog Node
434 class MachEpilogNode : public MachIdealNode {
435 public:
436 MachEpilogNode(bool do_poll = false) : _do_polling(do_poll) {}
437 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
438 virtual uint size(PhaseRegAlloc *ra_) const;
439 virtual int reloc() const;
440 virtual const Pipeline *pipeline() const;
441
442 private:
443 bool _do_polling;
444
445 public:
446 bool do_polling() const { return _do_polling; }
447
448 // Offset of safepoint from the beginning of the node
449 int safepoint_offset() const;
450
451 #ifndef PRODUCT
452 virtual const char *Name() const { return "Epilog"; }
453 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
454 #endif
455 };
456
457 //------------------------------MachNopNode-----------------------------------
458 // Machine function Nop Node
459 class MachNopNode : public MachIdealNode {
460 private:
461 int _count;
462 public:
463 MachNopNode( ) : _count(1) {}
464 MachNopNode( int count ) : _count(count) {}
465 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
466 virtual uint size(PhaseRegAlloc *ra_) const;
467
468 virtual const class Type *bottom_type() const { return Type::CONTROL; }
469
470 virtual int ideal_Opcode() const { return Op_Con; } // bogus; see output.cpp
471 virtual const Pipeline *pipeline() const;
472 #ifndef PRODUCT
473 virtual const char *Name() const { return "Nop"; }
474 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
475 virtual void dump_spec(outputStream *st) const { } // No per-operand info
476 #endif
477 };
478
479 //------------------------------MachSpillCopyNode------------------------------
480 // Machine SpillCopy Node. Copies 1 or 2 words from any location to any
481 // location (stack or register).
482 class MachSpillCopyNode : public MachIdealNode {
483 const RegMask *_in; // RegMask for input
484 const RegMask *_out; // RegMask for output
485 const Type *_type;
486 public:
487 MachSpillCopyNode( Node *n, const RegMask &in, const RegMask &out ) :
488 MachIdealNode(), _in(&in), _out(&out), _type(n->bottom_type()) {
489 init_class_id(Class_MachSpillCopy);
490 init_flags(Flag_is_Copy);
491 add_req(NULL);
492 add_req(n);
493 }
494 virtual uint size_of() const { return sizeof(*this); }
495 void set_out_RegMask(const RegMask &out) { _out = &out; }
496 void set_in_RegMask(const RegMask &in) { _in = ∈ }
497 virtual const RegMask &out_RegMask() const { return *_out; }
498 virtual const RegMask &in_RegMask(uint) const { return *_in; }
499 virtual const class Type *bottom_type() const { return _type; }
500 virtual uint ideal_reg() const { return Matcher::base2reg[_type->base()]; }
501 virtual uint oper_input_base() const { return 1; }
502 uint implementation( CodeBuffer *cbuf, PhaseRegAlloc *ra_, bool do_size, outputStream* st ) const;
503
504 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
505 virtual uint size(PhaseRegAlloc *ra_) const;
506
507 #ifndef PRODUCT
508 virtual const char *Name() const { return "MachSpillCopy"; }
509 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
510 #endif
511 };
512
513 //------------------------------MachBranchNode--------------------------------
514 // Abstract machine branch Node
515 class MachBranchNode : public MachIdealNode {
516 public:
517 MachBranchNode() : MachIdealNode() {
518 init_class_id(Class_MachBranch);
519 }
520 virtual void label_set(Label* label, uint block_num) = 0;
521 virtual void save_label(Label** label, uint* block_num) = 0;
522
523 // Support for short branches
524 virtual MachNode *short_branch_version(Compile* C) { return NULL; }
525
526 virtual bool pinned() const { return true; };
527 };
528
529 //------------------------------MachNullChkNode--------------------------------
530 // Machine-dependent null-pointer-check Node. Points a real MachNode that is
531 // also some kind of memory op. Turns the indicated MachNode into a
532 // conditional branch with good latency on the ptr-not-null path and awful
533 // latency on the pointer-is-null path.
534
535 class MachNullCheckNode : public MachBranchNode {
536 public:
537 const uint _vidx; // Index of memop being tested
538 MachNullCheckNode( Node *ctrl, Node *memop, uint vidx ) : MachBranchNode(), _vidx(vidx) {
539 init_class_id(Class_MachNullCheck);
540 add_req(ctrl);
541 add_req(memop);
542 }
543 virtual uint size_of() const { return sizeof(*this); }
544
545 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const;
546 virtual void label_set(Label* label, uint block_num);
547 virtual void save_label(Label** label, uint* block_num);
548 virtual void negate() { }
549 virtual const class Type *bottom_type() const { return TypeTuple::IFBOTH; }
550 virtual uint ideal_reg() const { return NotAMachineReg; }
551 virtual const RegMask &in_RegMask(uint) const;
552 virtual const RegMask &out_RegMask() const { return RegMask::Empty; }
553 #ifndef PRODUCT
554 virtual const char *Name() const { return "NullCheck"; }
555 virtual void format( PhaseRegAlloc *, outputStream *st ) const;
556 #endif
557 };
558
559 //------------------------------MachProjNode----------------------------------
560 // Machine-dependent Ideal projections (how is that for an oxymoron). Really
561 // just MachNodes made by the Ideal world that replicate simple projections
562 // but with machine-dependent input & output register masks. Generally
563 // produced as part of calling conventions. Normally I make MachNodes as part
564 // of the Matcher process, but the Matcher is ill suited to issues involving
565 // frame handling, so frame handling is all done in the Ideal world with
566 // occasional callbacks to the machine model for important info.
567 class MachProjNode : public ProjNode {
568 public:
569 MachProjNode( Node *multi, uint con, const RegMask &out, uint ideal_reg ) : ProjNode(multi,con), _rout(out), _ideal_reg(ideal_reg) {
570 init_class_id(Class_MachProj);
571 }
572 RegMask _rout;
573 const uint _ideal_reg;
574 enum projType {
575 unmatched_proj = 0, // Projs for Control, I/O, memory not matched
576 fat_proj = 999 // Projs killing many regs, defined by _rout
577 };
578 virtual int Opcode() const;
579 virtual const Type *bottom_type() const;
580 virtual const TypePtr *adr_type() const;
581 virtual const RegMask &in_RegMask(uint) const { return RegMask::Empty; }
582 virtual const RegMask &out_RegMask() const { return _rout; }
583 virtual uint ideal_reg() const { return _ideal_reg; }
584 // Need size_of() for virtual ProjNode::clone()
585 virtual uint size_of() const { return sizeof(MachProjNode); }
586 #ifndef PRODUCT
587 virtual void dump_spec(outputStream *st) const;
588 #endif
589 };
590
591 //------------------------------MachIfNode-------------------------------------
592 // Machine-specific versions of IfNodes
593 class MachIfNode : public MachBranchNode {
594 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
595 public:
596 float _prob; // Probability branch goes either way
597 float _fcnt; // Frequency counter
598 MachIfNode() : MachBranchNode() {
599 init_class_id(Class_MachIf);
600 }
601 // Negate conditional branches.
602 virtual void negate() = 0;
603 #ifndef PRODUCT
604 virtual void dump_spec(outputStream *st) const;
605 #endif
606 };
607
608 //------------------------------MachGotoNode-----------------------------------
609 // Machine-specific versions of GotoNodes
610 class MachGotoNode : public MachBranchNode {
611 public:
612 MachGotoNode() : MachBranchNode() {
613 init_class_id(Class_MachGoto);
614 }
615 };
616
617 //------------------------------MachFastLockNode-------------------------------------
618 // Machine-specific versions of FastLockNodes
619 class MachFastLockNode : public MachNode {
620 virtual uint size_of() const { return sizeof(*this); } // Size is bigger
621 public:
622 BiasedLockingCounters* _counters;
623
624 MachFastLockNode() : MachNode() {}
625 };
626
627 //------------------------------MachReturnNode--------------------------------
628 // Machine-specific versions of subroutine returns
629 class MachReturnNode : public MachNode {
630 virtual uint size_of() const; // Size is bigger
631 public:
632 RegMask *_in_rms; // Input register masks, set during allocation
633 ReallocMark _nesting; // assertion check for reallocations
634 const TypePtr* _adr_type; // memory effects of call or return
635 MachReturnNode() : MachNode() {
636 init_class_id(Class_MachReturn);
637 _adr_type = TypePtr::BOTTOM; // the default: all of memory
638 }
639
640 void set_adr_type(const TypePtr* atp) { _adr_type = atp; }
641
642 virtual const RegMask &in_RegMask(uint) const;
643 virtual bool pinned() const { return true; };
644 virtual const TypePtr *adr_type() const;
645 };
646
647 //------------------------------MachSafePointNode-----------------------------
648 // Machine-specific versions of safepoints
649 class MachSafePointNode : public MachReturnNode {
650 public:
651 OopMap* _oop_map; // Array of OopMap info (8-bit char) for GC
652 JVMState* _jvms; // Pointer to list of JVM State Objects
653 uint _jvmadj; // Extra delta to jvms indexes (mach. args)
654 OopMap* oop_map() const { return _oop_map; }
655 void set_oop_map(OopMap* om) { _oop_map = om; }
656
657 MachSafePointNode() : MachReturnNode(), _oop_map(NULL), _jvms(NULL), _jvmadj(0) {
658 init_class_id(Class_MachSafePoint);
659 }
660
661 virtual JVMState* jvms() const { return _jvms; }
662 void set_jvms(JVMState* s) {
663 _jvms = s;
664 }
665 virtual const Type *bottom_type() const;
666
667 virtual const RegMask &in_RegMask(uint) const;
668
669 // Functionality from old debug nodes
670 Node *returnadr() const { return in(TypeFunc::ReturnAdr); }
671 Node *frameptr () const { return in(TypeFunc::FramePtr); }
672
673 Node *local(const JVMState* jvms, uint idx) const {
674 assert(verify_jvms(jvms), "jvms must match");
675 return in(_jvmadj + jvms->locoff() + idx);
676 }
677 Node *stack(const JVMState* jvms, uint idx) const {
678 assert(verify_jvms(jvms), "jvms must match");
679 return in(_jvmadj + jvms->stkoff() + idx);
680 }
681 Node *monitor_obj(const JVMState* jvms, uint idx) const {
682 assert(verify_jvms(jvms), "jvms must match");
683 return in(_jvmadj + jvms->monitor_obj_offset(idx));
684 }
685 Node *monitor_box(const JVMState* jvms, uint idx) const {
686 assert(verify_jvms(jvms), "jvms must match");
687 return in(_jvmadj + jvms->monitor_box_offset(idx));
688 }
689 void set_local(const JVMState* jvms, uint idx, Node *c) {
690 assert(verify_jvms(jvms), "jvms must match");
691 set_req(_jvmadj + jvms->locoff() + idx, c);
692 }
693 void set_stack(const JVMState* jvms, uint idx, Node *c) {
694 assert(verify_jvms(jvms), "jvms must match");
695 set_req(_jvmadj + jvms->stkoff() + idx, c);
696 }
697 void set_monitor(const JVMState* jvms, uint idx, Node *c) {
698 assert(verify_jvms(jvms), "jvms must match");
699 set_req(_jvmadj + jvms->monoff() + idx, c);
700 }
701 };
702
703 //------------------------------MachCallNode----------------------------------
704 // Machine-specific versions of subroutine calls
705 class MachCallNode : public MachSafePointNode {
706 protected:
707 virtual uint hash() const { return NO_HASH; } // CFG nodes do not hash
708 virtual uint cmp( const Node &n ) const;
709 virtual uint size_of() const = 0; // Size is bigger
710 public:
711 const TypeFunc *_tf; // Function type
712 address _entry_point; // Address of the method being called
713 float _cnt; // Estimate of number of times called
714 uint _argsize; // Size of argument block on stack
715
716 const TypeFunc* tf() const { return _tf; }
717 const address entry_point() const { return _entry_point; }
718 const float cnt() const { return _cnt; }
719 uint argsize() const { return _argsize; }
720
721 void set_tf(const TypeFunc* tf) { _tf = tf; }
722 void set_entry_point(address p) { _entry_point = p; }
723 void set_cnt(float c) { _cnt = c; }
724 void set_argsize(int s) { _argsize = s; }
725
726 MachCallNode() : MachSafePointNode() {
727 init_class_id(Class_MachCall);
728 }
729
730 virtual const Type *bottom_type() const;
731 virtual bool pinned() const { return false; }
732 virtual const Type *Value( PhaseTransform *phase ) const;
733 virtual const RegMask &in_RegMask(uint) const;
734 virtual int ret_addr_offset() { return 0; }
735
736 bool returns_long() const { return tf()->return_type() == T_LONG; }
737 bool return_value_is_used() const;
738 #ifndef PRODUCT
739 virtual void dump_spec(outputStream *st) const;
740 #endif
741 };
742
743 //------------------------------MachCallJavaNode------------------------------
744 // "Base" class for machine-specific versions of subroutine calls
745 class MachCallJavaNode : public MachCallNode {
746 protected:
747 virtual uint cmp( const Node &n ) const;
748 virtual uint size_of() const; // Size is bigger
749 public:
750 ciMethod* _method; // Method being direct called
751 int _bci; // Byte Code index of call byte code
752 bool _optimized_virtual; // Tells if node is a static call or an optimized virtual
753 bool _method_handle_invoke; // Tells if the call has to preserve SP
754 MachCallJavaNode() : MachCallNode() {
755 init_class_id(Class_MachCallJava);
756 }
757
758 virtual const RegMask &in_RegMask(uint) const;
759
760 #ifndef PRODUCT
761 virtual void dump_spec(outputStream *st) const;
762 #endif
763 };
764
765 //------------------------------MachCallStaticJavaNode------------------------
766 // Machine-specific versions of monomorphic subroutine calls
767 class MachCallStaticJavaNode : public MachCallJavaNode {
768 virtual uint cmp( const Node &n ) const;
769 virtual uint size_of() const; // Size is bigger
770 public:
771 const char *_name; // Runtime wrapper name
772 MachCallStaticJavaNode() : MachCallJavaNode() {
773 init_class_id(Class_MachCallStaticJava);
774 }
775
776 // If this is an uncommon trap, return the request code, else zero.
777 int uncommon_trap_request() const;
778
779 virtual int ret_addr_offset();
780 #ifndef PRODUCT
781 virtual void dump_spec(outputStream *st) const;
782 void dump_trap_args(outputStream *st) const;
783 #endif
784 };
785
786 //------------------------------MachCallDynamicJavaNode------------------------
787 // Machine-specific versions of possibly megamorphic subroutine calls
788 class MachCallDynamicJavaNode : public MachCallJavaNode {
789 public:
790 int _vtable_index;
791 MachCallDynamicJavaNode() : MachCallJavaNode() {
792 init_class_id(Class_MachCallDynamicJava);
793 DEBUG_ONLY(_vtable_index = -99); // throw an assert if uninitialized
794 }
795 virtual int ret_addr_offset();
796 #ifndef PRODUCT
797 virtual void dump_spec(outputStream *st) const;
798 #endif
799 };
800
801 //------------------------------MachCallRuntimeNode----------------------------
802 // Machine-specific versions of subroutine calls
803 class MachCallRuntimeNode : public MachCallNode {
804 virtual uint cmp( const Node &n ) const;
805 virtual uint size_of() const; // Size is bigger
806 public:
807 const char *_name; // Printable name, if _method is NULL
808 MachCallRuntimeNode() : MachCallNode() {
809 init_class_id(Class_MachCallRuntime);
810 }
811 virtual int ret_addr_offset();
812 #ifndef PRODUCT
813 virtual void dump_spec(outputStream *st) const;
814 #endif
815 };
816
817 class MachCallLeafNode: public MachCallRuntimeNode {
818 public:
819 MachCallLeafNode() : MachCallRuntimeNode() {
820 init_class_id(Class_MachCallLeaf);
821 }
822 };
823
824 //------------------------------MachHaltNode-----------------------------------
825 // Machine-specific versions of halt nodes
826 class MachHaltNode : public MachReturnNode {
827 public:
828 virtual JVMState* jvms() const;
829 };
830
831
832 //------------------------------MachTempNode-----------------------------------
833 // Node used by the adlc to construct inputs to represent temporary registers
834 class MachTempNode : public MachNode {
835 private:
836 MachOper *_opnd_array[1];
837
838 public:
839 virtual const RegMask &out_RegMask() const { return *_opnds[0]->in_RegMask(0); }
840 virtual uint rule() const { return 9999999; }
841 virtual void emit(CodeBuffer &cbuf, PhaseRegAlloc *ra_) const {}
842
843 MachTempNode(MachOper* oper) {
844 init_class_id(Class_MachTemp);
845 _num_opnds = 1;
846 _opnds = _opnd_array;
847 add_req(NULL);
848 _opnds[0] = oper;
849 }
850 virtual uint size_of() const { return sizeof(MachTempNode); }
851
852 #ifndef PRODUCT
853 virtual void format(PhaseRegAlloc *, outputStream *st ) const {}
854 virtual const char *Name() const { return "MachTemp";}
855 #endif
856 };
857
858
859
860 //------------------------------labelOper--------------------------------------
861 // Machine-independent version of label operand
862 class labelOper : public MachOper {
863 private:
864 virtual uint num_edges() const { return 0; }
865 public:
866 // Supported for fixed size branches
867 Label* _label; // Label for branch(es)
868
869 uint _block_num;
870
871 labelOper() : _block_num(0), _label(0) {}
872
873 labelOper(Label* label, uint block_num) : _label(label), _block_num(block_num) {}
874
875 labelOper(labelOper* l) : _label(l->_label) , _block_num(l->_block_num) {}
876
877 virtual MachOper *clone(Compile* C) const;
878
879 virtual Label *label() const { assert(_label != NULL, "need Label"); return _label; }
880
881 virtual uint opcode() const;
882
883 virtual uint hash() const;
884 virtual uint cmp( const MachOper &oper ) const;
885 #ifndef PRODUCT
886 virtual const char *Name() const { return "Label";}
887
888 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
889 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
890 #endif
891 };
892
893
894 //------------------------------methodOper--------------------------------------
895 // Machine-independent version of method operand
896 class methodOper : public MachOper {
897 private:
898 virtual uint num_edges() const { return 0; }
899 public:
900 intptr_t _method; // Address of method
901 methodOper() : _method(0) {}
902 methodOper(intptr_t method) : _method(method) {}
903
904 virtual MachOper *clone(Compile* C) const;
905
906 virtual intptr_t method() const { return _method; }
907
908 virtual uint opcode() const;
909
910 virtual uint hash() const;
911 virtual uint cmp( const MachOper &oper ) const;
912 #ifndef PRODUCT
913 virtual const char *Name() const { return "Method";}
914
915 virtual void int_format(PhaseRegAlloc *ra, const MachNode *node, outputStream *st) const;
916 virtual void ext_format(PhaseRegAlloc *ra, const MachNode *node, int idx, outputStream *st) const { int_format( ra, node, st ); }
917 #endif
918 };
919
920 #endif // SHARE_VM_OPTO_MACHNODE_HPP