1492 if( (reg == XMM0b_num || reg == XMM1b_num) && UseSSE>=2 ) return true;
1493 return false;
1494 }
1495
1496 bool Matcher::is_spillable_arg( int reg ) {
1497 return can_be_java_arg(reg);
1498 }
1499
1500 bool Matcher::use_asm_for_ldiv_by_con( jlong divisor ) {
1501 // Use hardware integer DIV instruction when
1502 // it is faster than a code which use multiply.
1503 // Only when constant divisor fits into 32 bit
1504 // (min_jint is excluded to get only correct
1505 // positive 32 bit values from negative).
1506 return VM_Version::has_fast_idiv() &&
1507 (divisor == (int)divisor && divisor != min_jint);
1508 }
1509
1510 // Register for DIVI projection of divmodI
1511 RegMask Matcher::divI_proj_mask() {
1512 return EAX_REG_mask;
1513 }
1514
1515 // Register for MODI projection of divmodI
1516 RegMask Matcher::modI_proj_mask() {
1517 return EDX_REG_mask;
1518 }
1519
1520 // Register for DIVL projection of divmodL
1521 RegMask Matcher::divL_proj_mask() {
1522 ShouldNotReachHere();
1523 return RegMask();
1524 }
1525
1526 // Register for MODL projection of divmodL
1527 RegMask Matcher::modL_proj_mask() {
1528 ShouldNotReachHere();
1529 return RegMask();
1530 }
1531
1532 const RegMask Matcher::method_handle_invoke_SP_save_mask() {
1533 return EBP_REG_mask;
1534 }
1535
1536 // Returns true if the high 32 bits of the value is known to be zero.
1537 bool is_operand_hi32_zero(Node* n) {
1538 int opc = n->Opcode();
1539 if (opc == Op_LoadUI2L) {
1540 return true;
1541 }
1542 if (opc == Op_AndL) {
1543 Node* o2 = n->in(2);
1544 if (o2->is_Con() && (o2->get_long() & 0xFFFFFFFF00000000LL) == 0LL) {
1545 return true;
1546 }
1547 }
1548 if (opc == Op_ConL && (n->get_long() & 0xFFFFFFFF00000000LL) == 0LL) {
1549 return true;
1550 }
1551 return false;
1552 }
1553
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1492 if( (reg == XMM0b_num || reg == XMM1b_num) && UseSSE>=2 ) return true;
1493 return false;
1494 }
1495
1496 bool Matcher::is_spillable_arg( int reg ) {
1497 return can_be_java_arg(reg);
1498 }
1499
1500 bool Matcher::use_asm_for_ldiv_by_con( jlong divisor ) {
1501 // Use hardware integer DIV instruction when
1502 // it is faster than a code which use multiply.
1503 // Only when constant divisor fits into 32 bit
1504 // (min_jint is excluded to get only correct
1505 // positive 32 bit values from negative).
1506 return VM_Version::has_fast_idiv() &&
1507 (divisor == (int)divisor && divisor != min_jint);
1508 }
1509
1510 // Register for DIVI projection of divmodI
1511 RegMask Matcher::divI_proj_mask() {
1512 return EAX_REG_mask();
1513 }
1514
1515 // Register for MODI projection of divmodI
1516 RegMask Matcher::modI_proj_mask() {
1517 return EDX_REG_mask();
1518 }
1519
1520 // Register for DIVL projection of divmodL
1521 RegMask Matcher::divL_proj_mask() {
1522 ShouldNotReachHere();
1523 return RegMask();
1524 }
1525
1526 // Register for MODL projection of divmodL
1527 RegMask Matcher::modL_proj_mask() {
1528 ShouldNotReachHere();
1529 return RegMask();
1530 }
1531
1532 const RegMask Matcher::method_handle_invoke_SP_save_mask() {
1533 return EBP_REG_mask();
1534 }
1535
1536 // Returns true if the high 32 bits of the value is known to be zero.
1537 bool is_operand_hi32_zero(Node* n) {
1538 int opc = n->Opcode();
1539 if (opc == Op_LoadUI2L) {
1540 return true;
1541 }
1542 if (opc == Op_AndL) {
1543 Node* o2 = n->in(2);
1544 if (o2->is_Con() && (o2->get_long() & 0xFFFFFFFF00000000LL) == 0LL) {
1545 return true;
1546 }
1547 }
1548 if (opc == Op_ConL && (n->get_long() & 0xFFFFFFFF00000000LL) == 0LL) {
1549 return true;
1550 }
1551 return false;
1552 }
1553
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