1 /* 2 * Copyright (c) 2000, 2011, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "c1/c1_InstructionPrinter.hpp" 27 #include "c1/c1_LIR.hpp" 28 #include "c1/c1_LIRAssembler.hpp" 29 #include "c1/c1_ValueStack.hpp" 30 #include "ci/ciInstance.hpp" 31 #include "runtime/sharedRuntime.hpp" 32 33 Register LIR_OprDesc::as_register() const { 34 return FrameMap::cpu_rnr2reg(cpu_regnr()); 35 } 36 37 Register LIR_OprDesc::as_register_lo() const { 38 return FrameMap::cpu_rnr2reg(cpu_regnrLo()); 39 } 40 41 Register LIR_OprDesc::as_register_hi() const { 42 return FrameMap::cpu_rnr2reg(cpu_regnrHi()); 43 } 44 45 #if defined(X86) 46 47 XMMRegister LIR_OprDesc::as_xmm_float_reg() const { 48 return FrameMap::nr2xmmreg(xmm_regnr()); 49 } 50 51 XMMRegister LIR_OprDesc::as_xmm_double_reg() const { 52 assert(xmm_regnrLo() == xmm_regnrHi(), "assumed in calculation"); 53 return FrameMap::nr2xmmreg(xmm_regnrLo()); 54 } 55 56 #endif // X86 57 58 #if defined(SPARC) || defined(PPC) 59 60 FloatRegister LIR_OprDesc::as_float_reg() const { 61 return FrameMap::nr2floatreg(fpu_regnr()); 62 } 63 64 FloatRegister LIR_OprDesc::as_double_reg() const { 65 return FrameMap::nr2floatreg(fpu_regnrHi()); 66 } 67 68 #endif 69 70 #ifdef ARM 71 72 FloatRegister LIR_OprDesc::as_float_reg() const { 73 return as_FloatRegister(fpu_regnr()); 74 } 75 76 FloatRegister LIR_OprDesc::as_double_reg() const { 77 return as_FloatRegister(fpu_regnrLo()); 78 } 79 80 #endif 81 82 83 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal(); 84 85 LIR_Opr LIR_OprFact::value_type(ValueType* type) { 86 ValueTag tag = type->tag(); 87 switch (tag) { 88 case objectTag : { 89 ClassConstant* c = type->as_ClassConstant(); 90 if (c != NULL && !c->value()->is_loaded()) { 91 return LIR_OprFact::oopConst(NULL); 92 } else { 93 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding()); 94 } 95 } 96 case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value()); 97 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value()); 98 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value()); 99 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value()); 100 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value()); 101 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1); 102 } 103 } 104 105 106 LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) { 107 switch (type->tag()) { 108 case objectTag: return LIR_OprFact::oopConst(NULL); 109 case addressTag:return LIR_OprFact::addressConst(0); 110 case intTag: return LIR_OprFact::intConst(0); 111 case floatTag: return LIR_OprFact::floatConst(0.0); 112 case longTag: return LIR_OprFact::longConst(0); 113 case doubleTag: return LIR_OprFact::doubleConst(0.0); 114 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1); 115 } 116 return illegalOpr; 117 } 118 119 120 121 //--------------------------------------------------- 122 123 124 LIR_Address::Scale LIR_Address::scale(BasicType type) { 125 int elem_size = type2aelembytes(type); 126 switch (elem_size) { 127 case 1: return LIR_Address::times_1; 128 case 2: return LIR_Address::times_2; 129 case 4: return LIR_Address::times_4; 130 case 8: return LIR_Address::times_8; 131 } 132 ShouldNotReachHere(); 133 return LIR_Address::times_1; 134 } 135 136 137 #ifndef PRODUCT 138 void LIR_Address::verify() const { 139 #if defined(SPARC) || defined(PPC) 140 assert(scale() == times_1, "Scaled addressing mode not available on SPARC/PPC and should not be used"); 141 assert(disp() == 0 || index()->is_illegal(), "can't have both"); 142 #endif 143 #ifdef ARM 144 assert(disp() == 0 || index()->is_illegal(), "can't have both"); 145 // Note: offsets higher than 4096 must not be rejected here. They can 146 // be handled by the back-end or will be rejected if not. 147 #endif 148 #ifdef _LP64 149 assert(base()->is_cpu_register(), "wrong base operand"); 150 assert(index()->is_illegal() || index()->is_double_cpu(), "wrong index operand"); 151 assert(base()->type() == T_OBJECT || base()->type() == T_LONG, 152 "wrong type for addresses"); 153 #else 154 assert(base()->is_single_cpu(), "wrong base operand"); 155 assert(index()->is_illegal() || index()->is_single_cpu(), "wrong index operand"); 156 assert(base()->type() == T_OBJECT || base()->type() == T_INT, 157 "wrong type for addresses"); 158 #endif 159 } 160 #endif 161 162 163 //--------------------------------------------------- 164 165 char LIR_OprDesc::type_char(BasicType t) { 166 switch (t) { 167 case T_ARRAY: 168 t = T_OBJECT; 169 case T_BOOLEAN: 170 case T_CHAR: 171 case T_FLOAT: 172 case T_DOUBLE: 173 case T_BYTE: 174 case T_SHORT: 175 case T_INT: 176 case T_LONG: 177 case T_OBJECT: 178 case T_ADDRESS: 179 case T_VOID: 180 return ::type2char(t); 181 182 case T_ILLEGAL: 183 return '?'; 184 185 default: 186 ShouldNotReachHere(); 187 return '?'; 188 } 189 } 190 191 #ifndef PRODUCT 192 void LIR_OprDesc::validate_type() const { 193 194 #ifdef ASSERT 195 if (!is_pointer() && !is_illegal()) { 196 switch (as_BasicType(type_field())) { 197 case T_LONG: 198 assert((kind_field() == cpu_register || kind_field() == stack_value) && 199 size_field() == double_size, "must match"); 200 break; 201 case T_FLOAT: 202 // FP return values can be also in CPU registers on ARM and PPC (softfp ABI) 203 assert((kind_field() == fpu_register || kind_field() == stack_value 204 ARM_ONLY(|| kind_field() == cpu_register) 205 PPC_ONLY(|| kind_field() == cpu_register) ) && 206 size_field() == single_size, "must match"); 207 break; 208 case T_DOUBLE: 209 // FP return values can be also in CPU registers on ARM and PPC (softfp ABI) 210 assert((kind_field() == fpu_register || kind_field() == stack_value 211 ARM_ONLY(|| kind_field() == cpu_register) 212 PPC_ONLY(|| kind_field() == cpu_register) ) && 213 size_field() == double_size, "must match"); 214 break; 215 case T_BOOLEAN: 216 case T_CHAR: 217 case T_BYTE: 218 case T_SHORT: 219 case T_INT: 220 case T_ADDRESS: 221 case T_OBJECT: 222 case T_ARRAY: 223 assert((kind_field() == cpu_register || kind_field() == stack_value) && 224 size_field() == single_size, "must match"); 225 break; 226 227 case T_ILLEGAL: 228 // XXX TKR also means unknown right now 229 // assert(is_illegal(), "must match"); 230 break; 231 232 default: 233 ShouldNotReachHere(); 234 } 235 } 236 #endif 237 238 } 239 #endif // PRODUCT 240 241 242 bool LIR_OprDesc::is_oop() const { 243 if (is_pointer()) { 244 return pointer()->is_oop_pointer(); 245 } else { 246 OprType t= type_field(); 247 assert(t != unknown_type, "not set"); 248 return t == object_type; 249 } 250 } 251 252 253 254 void LIR_Op2::verify() const { 255 #ifdef ASSERT 256 switch (code()) { 257 case lir_cmove: 258 break; 259 260 default: 261 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(), 262 "can't produce oops from arith"); 263 } 264 265 if (TwoOperandLIRForm) { 266 switch (code()) { 267 case lir_add: 268 case lir_sub: 269 case lir_mul: 270 case lir_mul_strictfp: 271 case lir_div: 272 case lir_div_strictfp: 273 case lir_rem: 274 case lir_logic_and: 275 case lir_logic_or: 276 case lir_logic_xor: 277 case lir_shl: 278 case lir_shr: 279 assert(in_opr1() == result_opr(), "opr1 and result must match"); 280 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid"); 281 break; 282 283 // special handling for lir_ushr because of write barriers 284 case lir_ushr: 285 assert(in_opr1() == result_opr() || in_opr2()->is_constant(), "opr1 and result must match or shift count is constant"); 286 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid"); 287 break; 288 289 } 290 } 291 #endif 292 } 293 294 295 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block) 296 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) 297 , _cond(cond) 298 , _type(type) 299 , _label(block->label()) 300 , _block(block) 301 , _ublock(NULL) 302 , _stub(NULL) { 303 } 304 305 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) : 306 LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) 307 , _cond(cond) 308 , _type(type) 309 , _label(stub->entry()) 310 , _block(NULL) 311 , _ublock(NULL) 312 , _stub(stub) { 313 } 314 315 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock) 316 : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) 317 , _cond(cond) 318 , _type(type) 319 , _label(block->label()) 320 , _block(block) 321 , _ublock(ublock) 322 , _stub(NULL) 323 { 324 } 325 326 void LIR_OpBranch::change_block(BlockBegin* b) { 327 assert(_block != NULL, "must have old block"); 328 assert(_block->label() == label(), "must be equal"); 329 330 _block = b; 331 _label = b->label(); 332 } 333 334 void LIR_OpBranch::change_ublock(BlockBegin* b) { 335 assert(_ublock != NULL, "must have old block"); 336 _ublock = b; 337 } 338 339 void LIR_OpBranch::negate_cond() { 340 switch (_cond) { 341 case lir_cond_equal: _cond = lir_cond_notEqual; break; 342 case lir_cond_notEqual: _cond = lir_cond_equal; break; 343 case lir_cond_less: _cond = lir_cond_greaterEqual; break; 344 case lir_cond_lessEqual: _cond = lir_cond_greater; break; 345 case lir_cond_greaterEqual: _cond = lir_cond_less; break; 346 case lir_cond_greater: _cond = lir_cond_lessEqual; break; 347 default: ShouldNotReachHere(); 348 } 349 } 350 351 352 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, 353 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, 354 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, 355 CodeStub* stub) 356 357 : LIR_Op(code, result, NULL) 358 , _object(object) 359 , _array(LIR_OprFact::illegalOpr) 360 , _klass(klass) 361 , _tmp1(tmp1) 362 , _tmp2(tmp2) 363 , _tmp3(tmp3) 364 , _fast_check(fast_check) 365 , _stub(stub) 366 , _info_for_patch(info_for_patch) 367 , _info_for_exception(info_for_exception) 368 , _profiled_method(NULL) 369 , _profiled_bci(-1) 370 , _should_profile(false) 371 { 372 if (code == lir_checkcast) { 373 assert(info_for_exception != NULL, "checkcast throws exceptions"); 374 } else if (code == lir_instanceof) { 375 assert(info_for_exception == NULL, "instanceof throws no exceptions"); 376 } else { 377 ShouldNotReachHere(); 378 } 379 } 380 381 382 383 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception) 384 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) 385 , _object(object) 386 , _array(array) 387 , _klass(NULL) 388 , _tmp1(tmp1) 389 , _tmp2(tmp2) 390 , _tmp3(tmp3) 391 , _fast_check(false) 392 , _stub(NULL) 393 , _info_for_patch(NULL) 394 , _info_for_exception(info_for_exception) 395 , _profiled_method(NULL) 396 , _profiled_bci(-1) 397 , _should_profile(false) 398 { 399 if (code == lir_store_check) { 400 _stub = new ArrayStoreExceptionStub(object, info_for_exception); 401 assert(info_for_exception != NULL, "store_check throws exceptions"); 402 } else { 403 ShouldNotReachHere(); 404 } 405 } 406 407 408 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, 409 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) 410 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info) 411 , _tmp(tmp) 412 , _src(src) 413 , _src_pos(src_pos) 414 , _dst(dst) 415 , _dst_pos(dst_pos) 416 , _flags(flags) 417 , _expected_type(expected_type) 418 , _length(length) { 419 _stub = new ArrayCopyStub(this); 420 } 421 422 423 //-------------------verify-------------------------- 424 425 void LIR_Op1::verify() const { 426 switch(code()) { 427 case lir_move: 428 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be"); 429 break; 430 case lir_null_check: 431 assert(in_opr()->is_register(), "must be"); 432 break; 433 case lir_return: 434 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be"); 435 break; 436 } 437 } 438 439 void LIR_OpRTCall::verify() const { 440 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function"); 441 } 442 443 //-------------------visits-------------------------- 444 445 // complete rework of LIR instruction visitor. 446 // The virtual calls for each instruction type is replaced by a big 447 // switch that adds the operands for each instruction 448 449 void LIR_OpVisitState::visit(LIR_Op* op) { 450 // copy information from the LIR_Op 451 reset(); 452 set_op(op); 453 454 switch (op->code()) { 455 456 // LIR_Op0 457 case lir_word_align: // result and info always invalid 458 case lir_backwardbranch_target: // result and info always invalid 459 case lir_build_frame: // result and info always invalid 460 case lir_fpop_raw: // result and info always invalid 461 case lir_24bit_FPU: // result and info always invalid 462 case lir_reset_FPU: // result and info always invalid 463 case lir_breakpoint: // result and info always invalid 464 case lir_membar: // result and info always invalid 465 case lir_membar_acquire: // result and info always invalid 466 case lir_membar_release: // result and info always invalid 467 { 468 assert(op->as_Op0() != NULL, "must be"); 469 assert(op->_info == NULL, "info not used by this instruction"); 470 assert(op->_result->is_illegal(), "not used"); 471 break; 472 } 473 474 case lir_nop: // may have info, result always invalid 475 case lir_std_entry: // may have result, info always invalid 476 case lir_osr_entry: // may have result, info always invalid 477 case lir_get_thread: // may have result, info always invalid 478 { 479 assert(op->as_Op0() != NULL, "must be"); 480 if (op->_info != NULL) do_info(op->_info); 481 if (op->_result->is_valid()) do_output(op->_result); 482 break; 483 } 484 485 486 // LIR_OpLabel 487 case lir_label: // result and info always invalid 488 { 489 assert(op->as_OpLabel() != NULL, "must be"); 490 assert(op->_info == NULL, "info not used by this instruction"); 491 assert(op->_result->is_illegal(), "not used"); 492 break; 493 } 494 495 496 // LIR_Op1 497 case lir_fxch: // input always valid, result and info always invalid 498 case lir_fld: // input always valid, result and info always invalid 499 case lir_ffree: // input always valid, result and info always invalid 500 case lir_push: // input always valid, result and info always invalid 501 case lir_pop: // input always valid, result and info always invalid 502 case lir_return: // input always valid, result and info always invalid 503 case lir_leal: // input and result always valid, info always invalid 504 case lir_neg: // input and result always valid, info always invalid 505 case lir_monaddr: // input and result always valid, info always invalid 506 case lir_null_check: // input and info always valid, result always invalid 507 case lir_move: // input and result always valid, may have info 508 case lir_pack64: // input and result always valid 509 case lir_unpack64: // input and result always valid 510 case lir_prefetchr: // input always valid, result and info always invalid 511 case lir_prefetchw: // input always valid, result and info always invalid 512 { 513 assert(op->as_Op1() != NULL, "must be"); 514 LIR_Op1* op1 = (LIR_Op1*)op; 515 516 if (op1->_info) do_info(op1->_info); 517 if (op1->_opr->is_valid()) do_input(op1->_opr); 518 if (op1->_result->is_valid()) do_output(op1->_result); 519 520 break; 521 } 522 523 case lir_safepoint: 524 { 525 assert(op->as_Op1() != NULL, "must be"); 526 LIR_Op1* op1 = (LIR_Op1*)op; 527 528 assert(op1->_info != NULL, ""); do_info(op1->_info); 529 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register 530 assert(op1->_result->is_illegal(), "safepoint does not produce value"); 531 532 break; 533 } 534 535 // LIR_OpConvert; 536 case lir_convert: // input and result always valid, info always invalid 537 { 538 assert(op->as_OpConvert() != NULL, "must be"); 539 LIR_OpConvert* opConvert = (LIR_OpConvert*)op; 540 541 assert(opConvert->_info == NULL, "must be"); 542 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr); 543 if (opConvert->_result->is_valid()) do_output(opConvert->_result); 544 #ifdef PPC 545 if (opConvert->_tmp1->is_valid()) do_temp(opConvert->_tmp1); 546 if (opConvert->_tmp2->is_valid()) do_temp(opConvert->_tmp2); 547 #endif 548 do_stub(opConvert->_stub); 549 550 break; 551 } 552 553 // LIR_OpBranch; 554 case lir_branch: // may have info, input and result register always invalid 555 case lir_cond_float_branch: // may have info, input and result register always invalid 556 { 557 assert(op->as_OpBranch() != NULL, "must be"); 558 LIR_OpBranch* opBranch = (LIR_OpBranch*)op; 559 560 if (opBranch->_info != NULL) do_info(opBranch->_info); 561 assert(opBranch->_result->is_illegal(), "not used"); 562 if (opBranch->_stub != NULL) opBranch->stub()->visit(this); 563 564 break; 565 } 566 567 568 // LIR_OpAllocObj 569 case lir_alloc_object: 570 { 571 assert(op->as_OpAllocObj() != NULL, "must be"); 572 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op; 573 574 if (opAllocObj->_info) do_info(opAllocObj->_info); 575 if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr); 576 do_temp(opAllocObj->_opr); 577 } 578 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1); 579 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2); 580 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3); 581 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4); 582 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result); 583 do_stub(opAllocObj->_stub); 584 break; 585 } 586 587 588 // LIR_OpRoundFP; 589 case lir_roundfp: { 590 assert(op->as_OpRoundFP() != NULL, "must be"); 591 LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op; 592 593 assert(op->_info == NULL, "info not used by this instruction"); 594 assert(opRoundFP->_tmp->is_illegal(), "not used"); 595 do_input(opRoundFP->_opr); 596 do_output(opRoundFP->_result); 597 598 break; 599 } 600 601 602 // LIR_Op2 603 case lir_cmp: 604 case lir_cmp_l2i: 605 case lir_ucmp_fd2i: 606 case lir_cmp_fd2i: 607 case lir_add: 608 case lir_sub: 609 case lir_mul: 610 case lir_div: 611 case lir_rem: 612 case lir_sqrt: 613 case lir_abs: 614 case lir_logic_and: 615 case lir_logic_or: 616 case lir_logic_xor: 617 case lir_shl: 618 case lir_shr: 619 case lir_ushr: 620 { 621 assert(op->as_Op2() != NULL, "must be"); 622 LIR_Op2* op2 = (LIR_Op2*)op; 623 624 if (op2->_info) do_info(op2->_info); 625 if (op2->_opr1->is_valid()) do_input(op2->_opr1); 626 if (op2->_opr2->is_valid()) do_input(op2->_opr2); 627 if (op2->_tmp->is_valid()) do_temp(op2->_tmp); 628 if (op2->_result->is_valid()) do_output(op2->_result); 629 630 break; 631 } 632 633 // special handling for cmove: right input operand must not be equal 634 // to the result operand, otherwise the backend fails 635 case lir_cmove: 636 { 637 assert(op->as_Op2() != NULL, "must be"); 638 LIR_Op2* op2 = (LIR_Op2*)op; 639 640 assert(op2->_info == NULL && op2->_tmp->is_illegal(), "not used"); 641 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used"); 642 643 do_input(op2->_opr1); 644 do_input(op2->_opr2); 645 do_temp(op2->_opr2); 646 do_output(op2->_result); 647 648 break; 649 } 650 651 // vspecial handling for strict operations: register input operands 652 // as temp to guarantee that they do not overlap with other 653 // registers 654 case lir_mul_strictfp: 655 case lir_div_strictfp: 656 { 657 assert(op->as_Op2() != NULL, "must be"); 658 LIR_Op2* op2 = (LIR_Op2*)op; 659 660 assert(op2->_info == NULL, "not used"); 661 assert(op2->_opr1->is_valid(), "used"); 662 assert(op2->_opr2->is_valid(), "used"); 663 assert(op2->_result->is_valid(), "used"); 664 665 do_input(op2->_opr1); do_temp(op2->_opr1); 666 do_input(op2->_opr2); do_temp(op2->_opr2); 667 if (op2->_tmp->is_valid()) do_temp(op2->_tmp); 668 do_output(op2->_result); 669 670 break; 671 } 672 673 case lir_throw: { 674 assert(op->as_Op2() != NULL, "must be"); 675 LIR_Op2* op2 = (LIR_Op2*)op; 676 677 if (op2->_info) do_info(op2->_info); 678 if (op2->_opr1->is_valid()) do_temp(op2->_opr1); 679 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter 680 assert(op2->_result->is_illegal(), "no result"); 681 682 break; 683 } 684 685 case lir_unwind: { 686 assert(op->as_Op1() != NULL, "must be"); 687 LIR_Op1* op1 = (LIR_Op1*)op; 688 689 assert(op1->_info == NULL, "no info"); 690 assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr); 691 assert(op1->_result->is_illegal(), "no result"); 692 693 break; 694 } 695 696 697 case lir_tan: 698 case lir_sin: 699 case lir_cos: 700 case lir_log: 701 case lir_log10: { 702 assert(op->as_Op2() != NULL, "must be"); 703 LIR_Op2* op2 = (LIR_Op2*)op; 704 705 // On x86 tan/sin/cos need two temporary fpu stack slots and 706 // log/log10 need one so handle opr2 and tmp as temp inputs. 707 // Register input operand as temp to guarantee that it doesn't 708 // overlap with the input. 709 assert(op2->_info == NULL, "not used"); 710 assert(op2->_opr1->is_valid(), "used"); 711 do_input(op2->_opr1); do_temp(op2->_opr1); 712 713 if (op2->_opr2->is_valid()) do_temp(op2->_opr2); 714 if (op2->_tmp->is_valid()) do_temp(op2->_tmp); 715 if (op2->_result->is_valid()) do_output(op2->_result); 716 717 break; 718 } 719 720 721 // LIR_Op3 722 case lir_idiv: 723 case lir_irem: { 724 assert(op->as_Op3() != NULL, "must be"); 725 LIR_Op3* op3= (LIR_Op3*)op; 726 727 if (op3->_info) do_info(op3->_info); 728 if (op3->_opr1->is_valid()) do_input(op3->_opr1); 729 730 // second operand is input and temp, so ensure that second operand 731 // and third operand get not the same register 732 if (op3->_opr2->is_valid()) do_input(op3->_opr2); 733 if (op3->_opr2->is_valid()) do_temp(op3->_opr2); 734 if (op3->_opr3->is_valid()) do_temp(op3->_opr3); 735 736 if (op3->_result->is_valid()) do_output(op3->_result); 737 738 break; 739 } 740 741 742 // LIR_OpJavaCall 743 case lir_static_call: 744 case lir_optvirtual_call: 745 case lir_icvirtual_call: 746 case lir_virtual_call: 747 case lir_dynamic_call: { 748 LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall(); 749 assert(opJavaCall != NULL, "must be"); 750 751 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver); 752 753 // only visit register parameters 754 int n = opJavaCall->_arguments->length(); 755 for (int i = 0; i < n; i++) { 756 if (!opJavaCall->_arguments->at(i)->is_pointer()) { 757 do_input(*opJavaCall->_arguments->adr_at(i)); 758 } 759 } 760 761 if (opJavaCall->_info) do_info(opJavaCall->_info); 762 if (opJavaCall->is_method_handle_invoke()) { 763 opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr(); 764 do_temp(opJavaCall->_method_handle_invoke_SP_save_opr); 765 } 766 do_call(); 767 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result); 768 769 break; 770 } 771 772 773 // LIR_OpRTCall 774 case lir_rtcall: { 775 assert(op->as_OpRTCall() != NULL, "must be"); 776 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op; 777 778 // only visit register parameters 779 int n = opRTCall->_arguments->length(); 780 for (int i = 0; i < n; i++) { 781 if (!opRTCall->_arguments->at(i)->is_pointer()) { 782 do_input(*opRTCall->_arguments->adr_at(i)); 783 } 784 } 785 if (opRTCall->_info) do_info(opRTCall->_info); 786 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp); 787 do_call(); 788 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result); 789 790 break; 791 } 792 793 794 // LIR_OpArrayCopy 795 case lir_arraycopy: { 796 assert(op->as_OpArrayCopy() != NULL, "must be"); 797 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op; 798 799 assert(opArrayCopy->_result->is_illegal(), "unused"); 800 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src); 801 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos); 802 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst); 803 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos); 804 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length); 805 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp); 806 if (opArrayCopy->_info) do_info(opArrayCopy->_info); 807 808 // the implementation of arraycopy always has a call into the runtime 809 do_call(); 810 811 break; 812 } 813 814 815 // LIR_OpLock 816 case lir_lock: 817 case lir_unlock: { 818 assert(op->as_OpLock() != NULL, "must be"); 819 LIR_OpLock* opLock = (LIR_OpLock*)op; 820 821 if (opLock->_info) do_info(opLock->_info); 822 823 // TODO: check if these operands really have to be temp 824 // (or if input is sufficient). This may have influence on the oop map! 825 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock); 826 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr); 827 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj); 828 829 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch); 830 assert(opLock->_result->is_illegal(), "unused"); 831 832 do_stub(opLock->_stub); 833 834 break; 835 } 836 837 838 // LIR_OpDelay 839 case lir_delay_slot: { 840 assert(op->as_OpDelay() != NULL, "must be"); 841 LIR_OpDelay* opDelay = (LIR_OpDelay*)op; 842 843 visit(opDelay->delay_op()); 844 break; 845 } 846 847 // LIR_OpTypeCheck 848 case lir_instanceof: 849 case lir_checkcast: 850 case lir_store_check: { 851 assert(op->as_OpTypeCheck() != NULL, "must be"); 852 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op; 853 854 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception); 855 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch); 856 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object); 857 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array); 858 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1); 859 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2); 860 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3); 861 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result); 862 do_stub(opTypeCheck->_stub); 863 break; 864 } 865 866 // LIR_OpCompareAndSwap 867 case lir_cas_long: 868 case lir_cas_obj: 869 case lir_cas_int: { 870 assert(op->as_OpCompareAndSwap() != NULL, "must be"); 871 LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op; 872 873 assert(opCompareAndSwap->_addr->is_valid(), "used"); 874 assert(opCompareAndSwap->_cmp_value->is_valid(), "used"); 875 assert(opCompareAndSwap->_new_value->is_valid(), "used"); 876 if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info); 877 do_input(opCompareAndSwap->_addr); 878 do_temp(opCompareAndSwap->_addr); 879 do_input(opCompareAndSwap->_cmp_value); 880 do_temp(opCompareAndSwap->_cmp_value); 881 do_input(opCompareAndSwap->_new_value); 882 do_temp(opCompareAndSwap->_new_value); 883 if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1); 884 if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2); 885 if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result); 886 887 break; 888 } 889 890 891 // LIR_OpAllocArray; 892 case lir_alloc_array: { 893 assert(op->as_OpAllocArray() != NULL, "must be"); 894 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op; 895 896 if (opAllocArray->_info) do_info(opAllocArray->_info); 897 if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass); 898 if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len); 899 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1); 900 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2); 901 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3); 902 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4); 903 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result); 904 do_stub(opAllocArray->_stub); 905 break; 906 } 907 908 // LIR_OpProfileCall: 909 case lir_profile_call: { 910 assert(op->as_OpProfileCall() != NULL, "must be"); 911 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op; 912 913 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv); 914 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo); 915 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1); 916 break; 917 } 918 default: 919 ShouldNotReachHere(); 920 } 921 } 922 923 924 void LIR_OpVisitState::do_stub(CodeStub* stub) { 925 if (stub != NULL) { 926 stub->visit(this); 927 } 928 } 929 930 XHandlers* LIR_OpVisitState::all_xhandler() { 931 XHandlers* result = NULL; 932 933 int i; 934 for (i = 0; i < info_count(); i++) { 935 if (info_at(i)->exception_handlers() != NULL) { 936 result = info_at(i)->exception_handlers(); 937 break; 938 } 939 } 940 941 #ifdef ASSERT 942 for (i = 0; i < info_count(); i++) { 943 assert(info_at(i)->exception_handlers() == NULL || 944 info_at(i)->exception_handlers() == result, 945 "only one xhandler list allowed per LIR-operation"); 946 } 947 #endif 948 949 if (result != NULL) { 950 return result; 951 } else { 952 return new XHandlers(); 953 } 954 955 return result; 956 } 957 958 959 #ifdef ASSERT 960 bool LIR_OpVisitState::no_operands(LIR_Op* op) { 961 visit(op); 962 963 return opr_count(inputMode) == 0 && 964 opr_count(outputMode) == 0 && 965 opr_count(tempMode) == 0 && 966 info_count() == 0 && 967 !has_call() && 968 !has_slow_case(); 969 } 970 #endif 971 972 //--------------------------------------------------- 973 974 975 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) { 976 masm->emit_call(this); 977 } 978 979 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) { 980 masm->emit_rtcall(this); 981 } 982 983 void LIR_OpLabel::emit_code(LIR_Assembler* masm) { 984 masm->emit_opLabel(this); 985 } 986 987 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) { 988 masm->emit_arraycopy(this); 989 masm->emit_code_stub(stub()); 990 } 991 992 void LIR_Op0::emit_code(LIR_Assembler* masm) { 993 masm->emit_op0(this); 994 } 995 996 void LIR_Op1::emit_code(LIR_Assembler* masm) { 997 masm->emit_op1(this); 998 } 999 1000 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) { 1001 masm->emit_alloc_obj(this); 1002 masm->emit_code_stub(stub()); 1003 } 1004 1005 void LIR_OpBranch::emit_code(LIR_Assembler* masm) { 1006 masm->emit_opBranch(this); 1007 if (stub()) { 1008 masm->emit_code_stub(stub()); 1009 } 1010 } 1011 1012 void LIR_OpConvert::emit_code(LIR_Assembler* masm) { 1013 masm->emit_opConvert(this); 1014 if (stub() != NULL) { 1015 masm->emit_code_stub(stub()); 1016 } 1017 } 1018 1019 void LIR_Op2::emit_code(LIR_Assembler* masm) { 1020 masm->emit_op2(this); 1021 } 1022 1023 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) { 1024 masm->emit_alloc_array(this); 1025 masm->emit_code_stub(stub()); 1026 } 1027 1028 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) { 1029 masm->emit_opTypeCheck(this); 1030 if (stub()) { 1031 masm->emit_code_stub(stub()); 1032 } 1033 } 1034 1035 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) { 1036 masm->emit_compare_and_swap(this); 1037 } 1038 1039 void LIR_Op3::emit_code(LIR_Assembler* masm) { 1040 masm->emit_op3(this); 1041 } 1042 1043 void LIR_OpLock::emit_code(LIR_Assembler* masm) { 1044 masm->emit_lock(this); 1045 if (stub()) { 1046 masm->emit_code_stub(stub()); 1047 } 1048 } 1049 1050 1051 void LIR_OpDelay::emit_code(LIR_Assembler* masm) { 1052 masm->emit_delay(this); 1053 } 1054 1055 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) { 1056 masm->emit_profile_call(this); 1057 } 1058 1059 // LIR_List 1060 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block) 1061 : _operations(8) 1062 , _compilation(compilation) 1063 #ifndef PRODUCT 1064 , _block(block) 1065 #endif 1066 #ifdef ASSERT 1067 , _file(NULL) 1068 , _line(0) 1069 #endif 1070 { } 1071 1072 1073 #ifdef ASSERT 1074 void LIR_List::set_file_and_line(const char * file, int line) { 1075 const char * f = strrchr(file, '/'); 1076 if (f == NULL) f = strrchr(file, '\\'); 1077 if (f == NULL) { 1078 f = file; 1079 } else { 1080 f++; 1081 } 1082 _file = f; 1083 _line = line; 1084 } 1085 #endif 1086 1087 1088 void LIR_List::append(LIR_InsertionBuffer* buffer) { 1089 assert(this == buffer->lir_list(), "wrong lir list"); 1090 const int n = _operations.length(); 1091 1092 if (buffer->number_of_ops() > 0) { 1093 // increase size of instructions list 1094 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL); 1095 // insert ops from buffer into instructions list 1096 int op_index = buffer->number_of_ops() - 1; 1097 int ip_index = buffer->number_of_insertion_points() - 1; 1098 int from_index = n - 1; 1099 int to_index = _operations.length() - 1; 1100 for (; ip_index >= 0; ip_index --) { 1101 int index = buffer->index_at(ip_index); 1102 // make room after insertion point 1103 while (index < from_index) { 1104 _operations.at_put(to_index --, _operations.at(from_index --)); 1105 } 1106 // insert ops from buffer 1107 for (int i = buffer->count_at(ip_index); i > 0; i --) { 1108 _operations.at_put(to_index --, buffer->op_at(op_index --)); 1109 } 1110 } 1111 } 1112 1113 buffer->finish(); 1114 } 1115 1116 1117 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) { 1118 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info)); 1119 } 1120 1121 1122 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1123 append(new LIR_Op1( 1124 lir_move, 1125 LIR_OprFact::address(addr), 1126 src, 1127 addr->type(), 1128 patch_code, 1129 info)); 1130 } 1131 1132 1133 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1134 append(new LIR_Op1( 1135 lir_move, 1136 LIR_OprFact::address(address), 1137 dst, 1138 address->type(), 1139 patch_code, 1140 info, lir_move_volatile)); 1141 } 1142 1143 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1144 append(new LIR_Op1( 1145 lir_move, 1146 LIR_OprFact::address(new LIR_Address(base, offset, type)), 1147 dst, 1148 type, 1149 patch_code, 1150 info, lir_move_volatile)); 1151 } 1152 1153 1154 void LIR_List::prefetch(LIR_Address* addr, bool is_store) { 1155 append(new LIR_Op1( 1156 is_store ? lir_prefetchw : lir_prefetchr, 1157 LIR_OprFact::address(addr))); 1158 } 1159 1160 1161 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1162 append(new LIR_Op1( 1163 lir_move, 1164 LIR_OprFact::intConst(v), 1165 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)), 1166 type, 1167 patch_code, 1168 info)); 1169 } 1170 1171 1172 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1173 append(new LIR_Op1( 1174 lir_move, 1175 LIR_OprFact::oopConst(o), 1176 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)), 1177 type, 1178 patch_code, 1179 info)); 1180 } 1181 1182 1183 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1184 append(new LIR_Op1( 1185 lir_move, 1186 src, 1187 LIR_OprFact::address(addr), 1188 addr->type(), 1189 patch_code, 1190 info)); 1191 } 1192 1193 1194 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1195 append(new LIR_Op1( 1196 lir_move, 1197 src, 1198 LIR_OprFact::address(addr), 1199 addr->type(), 1200 patch_code, 1201 info, 1202 lir_move_volatile)); 1203 } 1204 1205 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1206 append(new LIR_Op1( 1207 lir_move, 1208 src, 1209 LIR_OprFact::address(new LIR_Address(base, offset, type)), 1210 type, 1211 patch_code, 1212 info, lir_move_volatile)); 1213 } 1214 1215 1216 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1217 append(new LIR_Op3( 1218 lir_idiv, 1219 left, 1220 right, 1221 tmp, 1222 res, 1223 info)); 1224 } 1225 1226 1227 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1228 append(new LIR_Op3( 1229 lir_idiv, 1230 left, 1231 LIR_OprFact::intConst(right), 1232 tmp, 1233 res, 1234 info)); 1235 } 1236 1237 1238 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1239 append(new LIR_Op3( 1240 lir_irem, 1241 left, 1242 right, 1243 tmp, 1244 res, 1245 info)); 1246 } 1247 1248 1249 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1250 append(new LIR_Op3( 1251 lir_irem, 1252 left, 1253 LIR_OprFact::intConst(right), 1254 tmp, 1255 res, 1256 info)); 1257 } 1258 1259 1260 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { 1261 append(new LIR_Op2( 1262 lir_cmp, 1263 condition, 1264 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)), 1265 LIR_OprFact::intConst(c), 1266 info)); 1267 } 1268 1269 1270 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) { 1271 append(new LIR_Op2( 1272 lir_cmp, 1273 condition, 1274 reg, 1275 LIR_OprFact::address(addr), 1276 info)); 1277 } 1278 1279 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, 1280 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) { 1281 append(new LIR_OpAllocObj( 1282 klass, 1283 dst, 1284 t1, 1285 t2, 1286 t3, 1287 t4, 1288 header_size, 1289 object_size, 1290 init_check, 1291 stub)); 1292 } 1293 1294 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) { 1295 append(new LIR_OpAllocArray( 1296 klass, 1297 len, 1298 dst, 1299 t1, 1300 t2, 1301 t3, 1302 t4, 1303 type, 1304 stub)); 1305 } 1306 1307 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { 1308 append(new LIR_Op2( 1309 lir_shl, 1310 value, 1311 count, 1312 dst, 1313 tmp)); 1314 } 1315 1316 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { 1317 append(new LIR_Op2( 1318 lir_shr, 1319 value, 1320 count, 1321 dst, 1322 tmp)); 1323 } 1324 1325 1326 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { 1327 append(new LIR_Op2( 1328 lir_ushr, 1329 value, 1330 count, 1331 dst, 1332 tmp)); 1333 } 1334 1335 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) { 1336 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i, 1337 left, 1338 right, 1339 dst)); 1340 } 1341 1342 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) { 1343 append(new LIR_OpLock( 1344 lir_lock, 1345 hdr, 1346 obj, 1347 lock, 1348 scratch, 1349 stub, 1350 info)); 1351 } 1352 1353 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) { 1354 append(new LIR_OpLock( 1355 lir_unlock, 1356 hdr, 1357 obj, 1358 lock, 1359 scratch, 1360 stub, 1361 NULL)); 1362 } 1363 1364 1365 void check_LIR() { 1366 // cannot do the proper checking as PRODUCT and other modes return different results 1367 // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table"); 1368 } 1369 1370 1371 1372 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass, 1373 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, 1374 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub, 1375 ciMethod* profiled_method, int profiled_bci) { 1376 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass, 1377 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub); 1378 if (profiled_method != NULL) { 1379 c->set_profiled_method(profiled_method); 1380 c->set_profiled_bci(profiled_bci); 1381 c->set_should_profile(true); 1382 } 1383 append(c); 1384 } 1385 1386 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) { 1387 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL); 1388 if (profiled_method != NULL) { 1389 c->set_profiled_method(profiled_method); 1390 c->set_profiled_bci(profiled_bci); 1391 c->set_should_profile(true); 1392 } 1393 append(c); 1394 } 1395 1396 1397 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, 1398 CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) { 1399 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception); 1400 if (profiled_method != NULL) { 1401 c->set_profiled_method(profiled_method); 1402 c->set_profiled_bci(profiled_bci); 1403 c->set_should_profile(true); 1404 } 1405 append(c); 1406 } 1407 1408 1409 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1410 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { 1411 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result)); 1412 } 1413 1414 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1415 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { 1416 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result)); 1417 } 1418 1419 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1420 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { 1421 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result)); 1422 } 1423 1424 1425 #ifdef PRODUCT 1426 1427 void print_LIR(BlockList* blocks) { 1428 } 1429 1430 #else 1431 // LIR_OprDesc 1432 void LIR_OprDesc::print() const { 1433 print(tty); 1434 } 1435 1436 void LIR_OprDesc::print(outputStream* out) const { 1437 if (is_illegal()) { 1438 return; 1439 } 1440 1441 out->print("["); 1442 if (is_pointer()) { 1443 pointer()->print_value_on(out); 1444 } else if (is_single_stack()) { 1445 out->print("stack:%d", single_stack_ix()); 1446 } else if (is_double_stack()) { 1447 out->print("dbl_stack:%d",double_stack_ix()); 1448 } else if (is_virtual()) { 1449 out->print("R%d", vreg_number()); 1450 } else if (is_single_cpu()) { 1451 out->print(as_register()->name()); 1452 } else if (is_double_cpu()) { 1453 out->print(as_register_hi()->name()); 1454 out->print(as_register_lo()->name()); 1455 #if defined(X86) 1456 } else if (is_single_xmm()) { 1457 out->print(as_xmm_float_reg()->name()); 1458 } else if (is_double_xmm()) { 1459 out->print(as_xmm_double_reg()->name()); 1460 } else if (is_single_fpu()) { 1461 out->print("fpu%d", fpu_regnr()); 1462 } else if (is_double_fpu()) { 1463 out->print("fpu%d", fpu_regnrLo()); 1464 #elif defined(ARM) 1465 } else if (is_single_fpu()) { 1466 out->print("s%d", fpu_regnr()); 1467 } else if (is_double_fpu()) { 1468 out->print("d%d", fpu_regnrLo() >> 1); 1469 #else 1470 } else if (is_single_fpu()) { 1471 out->print(as_float_reg()->name()); 1472 } else if (is_double_fpu()) { 1473 out->print(as_double_reg()->name()); 1474 #endif 1475 1476 } else if (is_illegal()) { 1477 out->print("-"); 1478 } else { 1479 out->print("Unknown Operand"); 1480 } 1481 if (!is_illegal()) { 1482 out->print("|%c", type_char()); 1483 } 1484 if (is_register() && is_last_use()) { 1485 out->print("(last_use)"); 1486 } 1487 out->print("]"); 1488 } 1489 1490 1491 // LIR_Address 1492 void LIR_Const::print_value_on(outputStream* out) const { 1493 switch (type()) { 1494 case T_ADDRESS:out->print("address:%d",as_jint()); break; 1495 case T_INT: out->print("int:%d", as_jint()); break; 1496 case T_LONG: out->print("lng:%lld", as_jlong()); break; 1497 case T_FLOAT: out->print("flt:%f", as_jfloat()); break; 1498 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break; 1499 case T_OBJECT: out->print("obj:0x%x", as_jobject()); break; 1500 default: out->print("%3d:0x%x",type(), as_jdouble()); break; 1501 } 1502 } 1503 1504 // LIR_Address 1505 void LIR_Address::print_value_on(outputStream* out) const { 1506 out->print("Base:"); _base->print(out); 1507 if (!_index->is_illegal()) { 1508 out->print(" Index:"); _index->print(out); 1509 switch (scale()) { 1510 case times_1: break; 1511 case times_2: out->print(" * 2"); break; 1512 case times_4: out->print(" * 4"); break; 1513 case times_8: out->print(" * 8"); break; 1514 } 1515 } 1516 out->print(" Disp: %d", _disp); 1517 } 1518 1519 // debug output of block header without InstructionPrinter 1520 // (because phi functions are not necessary for LIR) 1521 static void print_block(BlockBegin* x) { 1522 // print block id 1523 BlockEnd* end = x->end(); 1524 tty->print("B%d ", x->block_id()); 1525 1526 // print flags 1527 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std "); 1528 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr "); 1529 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex "); 1530 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr "); 1531 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb "); 1532 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh "); 1533 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le "); 1534 1535 // print block bci range 1536 tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci())); 1537 1538 // print predecessors and successors 1539 if (x->number_of_preds() > 0) { 1540 tty->print("preds: "); 1541 for (int i = 0; i < x->number_of_preds(); i ++) { 1542 tty->print("B%d ", x->pred_at(i)->block_id()); 1543 } 1544 } 1545 1546 if (x->number_of_sux() > 0) { 1547 tty->print("sux: "); 1548 for (int i = 0; i < x->number_of_sux(); i ++) { 1549 tty->print("B%d ", x->sux_at(i)->block_id()); 1550 } 1551 } 1552 1553 // print exception handlers 1554 if (x->number_of_exception_handlers() > 0) { 1555 tty->print("xhandler: "); 1556 for (int i = 0; i < x->number_of_exception_handlers(); i++) { 1557 tty->print("B%d ", x->exception_handler_at(i)->block_id()); 1558 } 1559 } 1560 1561 tty->cr(); 1562 } 1563 1564 void print_LIR(BlockList* blocks) { 1565 tty->print_cr("LIR:"); 1566 int i; 1567 for (i = 0; i < blocks->length(); i++) { 1568 BlockBegin* bb = blocks->at(i); 1569 print_block(bb); 1570 tty->print("__id_Instruction___________________________________________"); tty->cr(); 1571 bb->lir()->print_instructions(); 1572 } 1573 } 1574 1575 void LIR_List::print_instructions() { 1576 for (int i = 0; i < _operations.length(); i++) { 1577 _operations.at(i)->print(); tty->cr(); 1578 } 1579 tty->cr(); 1580 } 1581 1582 // LIR_Ops printing routines 1583 // LIR_Op 1584 void LIR_Op::print_on(outputStream* out) const { 1585 if (id() != -1 || PrintCFGToFile) { 1586 out->print("%4d ", id()); 1587 } else { 1588 out->print(" "); 1589 } 1590 out->print(name()); out->print(" "); 1591 print_instr(out); 1592 if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci()); 1593 #ifdef ASSERT 1594 if (Verbose && _file != NULL) { 1595 out->print(" (%s:%d)", _file, _line); 1596 } 1597 #endif 1598 } 1599 1600 const char * LIR_Op::name() const { 1601 const char* s = NULL; 1602 switch(code()) { 1603 // LIR_Op0 1604 case lir_membar: s = "membar"; break; 1605 case lir_membar_acquire: s = "membar_acquire"; break; 1606 case lir_membar_release: s = "membar_release"; break; 1607 case lir_word_align: s = "word_align"; break; 1608 case lir_label: s = "label"; break; 1609 case lir_nop: s = "nop"; break; 1610 case lir_backwardbranch_target: s = "backbranch"; break; 1611 case lir_std_entry: s = "std_entry"; break; 1612 case lir_osr_entry: s = "osr_entry"; break; 1613 case lir_build_frame: s = "build_frm"; break; 1614 case lir_fpop_raw: s = "fpop_raw"; break; 1615 case lir_24bit_FPU: s = "24bit_FPU"; break; 1616 case lir_reset_FPU: s = "reset_FPU"; break; 1617 case lir_breakpoint: s = "breakpoint"; break; 1618 case lir_get_thread: s = "get_thread"; break; 1619 // LIR_Op1 1620 case lir_fxch: s = "fxch"; break; 1621 case lir_fld: s = "fld"; break; 1622 case lir_ffree: s = "ffree"; break; 1623 case lir_push: s = "push"; break; 1624 case lir_pop: s = "pop"; break; 1625 case lir_null_check: s = "null_check"; break; 1626 case lir_return: s = "return"; break; 1627 case lir_safepoint: s = "safepoint"; break; 1628 case lir_neg: s = "neg"; break; 1629 case lir_leal: s = "leal"; break; 1630 case lir_branch: s = "branch"; break; 1631 case lir_cond_float_branch: s = "flt_cond_br"; break; 1632 case lir_move: s = "move"; break; 1633 case lir_roundfp: s = "roundfp"; break; 1634 case lir_rtcall: s = "rtcall"; break; 1635 case lir_throw: s = "throw"; break; 1636 case lir_unwind: s = "unwind"; break; 1637 case lir_convert: s = "convert"; break; 1638 case lir_alloc_object: s = "alloc_obj"; break; 1639 case lir_monaddr: s = "mon_addr"; break; 1640 case lir_pack64: s = "pack64"; break; 1641 case lir_unpack64: s = "unpack64"; break; 1642 // LIR_Op2 1643 case lir_cmp: s = "cmp"; break; 1644 case lir_cmp_l2i: s = "cmp_l2i"; break; 1645 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break; 1646 case lir_cmp_fd2i: s = "comp_fd2i"; break; 1647 case lir_cmove: s = "cmove"; break; 1648 case lir_add: s = "add"; break; 1649 case lir_sub: s = "sub"; break; 1650 case lir_mul: s = "mul"; break; 1651 case lir_mul_strictfp: s = "mul_strictfp"; break; 1652 case lir_div: s = "div"; break; 1653 case lir_div_strictfp: s = "div_strictfp"; break; 1654 case lir_rem: s = "rem"; break; 1655 case lir_abs: s = "abs"; break; 1656 case lir_sqrt: s = "sqrt"; break; 1657 case lir_sin: s = "sin"; break; 1658 case lir_cos: s = "cos"; break; 1659 case lir_tan: s = "tan"; break; 1660 case lir_log: s = "log"; break; 1661 case lir_log10: s = "log10"; break; 1662 case lir_logic_and: s = "logic_and"; break; 1663 case lir_logic_or: s = "logic_or"; break; 1664 case lir_logic_xor: s = "logic_xor"; break; 1665 case lir_shl: s = "shift_left"; break; 1666 case lir_shr: s = "shift_right"; break; 1667 case lir_ushr: s = "ushift_right"; break; 1668 case lir_alloc_array: s = "alloc_array"; break; 1669 // LIR_Op3 1670 case lir_idiv: s = "idiv"; break; 1671 case lir_irem: s = "irem"; break; 1672 // LIR_OpJavaCall 1673 case lir_static_call: s = "static"; break; 1674 case lir_optvirtual_call: s = "optvirtual"; break; 1675 case lir_icvirtual_call: s = "icvirtual"; break; 1676 case lir_virtual_call: s = "virtual"; break; 1677 case lir_dynamic_call: s = "dynamic"; break; 1678 // LIR_OpArrayCopy 1679 case lir_arraycopy: s = "arraycopy"; break; 1680 // LIR_OpLock 1681 case lir_lock: s = "lock"; break; 1682 case lir_unlock: s = "unlock"; break; 1683 // LIR_OpDelay 1684 case lir_delay_slot: s = "delay"; break; 1685 // LIR_OpTypeCheck 1686 case lir_instanceof: s = "instanceof"; break; 1687 case lir_checkcast: s = "checkcast"; break; 1688 case lir_store_check: s = "store_check"; break; 1689 // LIR_OpCompareAndSwap 1690 case lir_cas_long: s = "cas_long"; break; 1691 case lir_cas_obj: s = "cas_obj"; break; 1692 case lir_cas_int: s = "cas_int"; break; 1693 // LIR_OpProfileCall 1694 case lir_profile_call: s = "profile_call"; break; 1695 case lir_none: ShouldNotReachHere();break; 1696 default: s = "illegal_op"; break; 1697 } 1698 return s; 1699 } 1700 1701 // LIR_OpJavaCall 1702 void LIR_OpJavaCall::print_instr(outputStream* out) const { 1703 out->print("call: "); 1704 out->print("[addr: 0x%x]", address()); 1705 if (receiver()->is_valid()) { 1706 out->print(" [recv: "); receiver()->print(out); out->print("]"); 1707 } 1708 if (result_opr()->is_valid()) { 1709 out->print(" [result: "); result_opr()->print(out); out->print("]"); 1710 } 1711 } 1712 1713 // LIR_OpLabel 1714 void LIR_OpLabel::print_instr(outputStream* out) const { 1715 out->print("[label:0x%x]", _label); 1716 } 1717 1718 // LIR_OpArrayCopy 1719 void LIR_OpArrayCopy::print_instr(outputStream* out) const { 1720 src()->print(out); out->print(" "); 1721 src_pos()->print(out); out->print(" "); 1722 dst()->print(out); out->print(" "); 1723 dst_pos()->print(out); out->print(" "); 1724 length()->print(out); out->print(" "); 1725 tmp()->print(out); out->print(" "); 1726 } 1727 1728 // LIR_OpCompareAndSwap 1729 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const { 1730 addr()->print(out); out->print(" "); 1731 cmp_value()->print(out); out->print(" "); 1732 new_value()->print(out); out->print(" "); 1733 tmp1()->print(out); out->print(" "); 1734 tmp2()->print(out); out->print(" "); 1735 1736 } 1737 1738 // LIR_Op0 1739 void LIR_Op0::print_instr(outputStream* out) const { 1740 result_opr()->print(out); 1741 } 1742 1743 // LIR_Op1 1744 const char * LIR_Op1::name() const { 1745 if (code() == lir_move) { 1746 switch (move_kind()) { 1747 case lir_move_normal: 1748 return "move"; 1749 case lir_move_unaligned: 1750 return "unaligned move"; 1751 case lir_move_volatile: 1752 return "volatile_move"; 1753 case lir_move_wide: 1754 return "wide_move"; 1755 default: 1756 ShouldNotReachHere(); 1757 return "illegal_op"; 1758 } 1759 } else { 1760 return LIR_Op::name(); 1761 } 1762 } 1763 1764 1765 void LIR_Op1::print_instr(outputStream* out) const { 1766 _opr->print(out); out->print(" "); 1767 result_opr()->print(out); out->print(" "); 1768 print_patch_code(out, patch_code()); 1769 } 1770 1771 1772 // LIR_Op1 1773 void LIR_OpRTCall::print_instr(outputStream* out) const { 1774 intx a = (intx)addr(); 1775 out->print(Runtime1::name_for_address(addr())); 1776 out->print(" "); 1777 tmp()->print(out); 1778 } 1779 1780 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) { 1781 switch(code) { 1782 case lir_patch_none: break; 1783 case lir_patch_low: out->print("[patch_low]"); break; 1784 case lir_patch_high: out->print("[patch_high]"); break; 1785 case lir_patch_normal: out->print("[patch_normal]"); break; 1786 default: ShouldNotReachHere(); 1787 } 1788 } 1789 1790 // LIR_OpBranch 1791 void LIR_OpBranch::print_instr(outputStream* out) const { 1792 print_condition(out, cond()); out->print(" "); 1793 if (block() != NULL) { 1794 out->print("[B%d] ", block()->block_id()); 1795 } else if (stub() != NULL) { 1796 out->print("["); 1797 stub()->print_name(out); 1798 out->print(": 0x%x]", stub()); 1799 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci()); 1800 } else { 1801 out->print("[label:0x%x] ", label()); 1802 } 1803 if (ublock() != NULL) { 1804 out->print("unordered: [B%d] ", ublock()->block_id()); 1805 } 1806 } 1807 1808 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) { 1809 switch(cond) { 1810 case lir_cond_equal: out->print("[EQ]"); break; 1811 case lir_cond_notEqual: out->print("[NE]"); break; 1812 case lir_cond_less: out->print("[LT]"); break; 1813 case lir_cond_lessEqual: out->print("[LE]"); break; 1814 case lir_cond_greaterEqual: out->print("[GE]"); break; 1815 case lir_cond_greater: out->print("[GT]"); break; 1816 case lir_cond_belowEqual: out->print("[BE]"); break; 1817 case lir_cond_aboveEqual: out->print("[AE]"); break; 1818 case lir_cond_always: out->print("[AL]"); break; 1819 default: out->print("[%d]",cond); break; 1820 } 1821 } 1822 1823 // LIR_OpConvert 1824 void LIR_OpConvert::print_instr(outputStream* out) const { 1825 print_bytecode(out, bytecode()); 1826 in_opr()->print(out); out->print(" "); 1827 result_opr()->print(out); out->print(" "); 1828 #ifdef PPC 1829 if(tmp1()->is_valid()) { 1830 tmp1()->print(out); out->print(" "); 1831 tmp2()->print(out); out->print(" "); 1832 } 1833 #endif 1834 } 1835 1836 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) { 1837 switch(code) { 1838 case Bytecodes::_d2f: out->print("[d2f] "); break; 1839 case Bytecodes::_d2i: out->print("[d2i] "); break; 1840 case Bytecodes::_d2l: out->print("[d2l] "); break; 1841 case Bytecodes::_f2d: out->print("[f2d] "); break; 1842 case Bytecodes::_f2i: out->print("[f2i] "); break; 1843 case Bytecodes::_f2l: out->print("[f2l] "); break; 1844 case Bytecodes::_i2b: out->print("[i2b] "); break; 1845 case Bytecodes::_i2c: out->print("[i2c] "); break; 1846 case Bytecodes::_i2d: out->print("[i2d] "); break; 1847 case Bytecodes::_i2f: out->print("[i2f] "); break; 1848 case Bytecodes::_i2l: out->print("[i2l] "); break; 1849 case Bytecodes::_i2s: out->print("[i2s] "); break; 1850 case Bytecodes::_l2i: out->print("[l2i] "); break; 1851 case Bytecodes::_l2f: out->print("[l2f] "); break; 1852 case Bytecodes::_l2d: out->print("[l2d] "); break; 1853 default: 1854 out->print("[?%d]",code); 1855 break; 1856 } 1857 } 1858 1859 void LIR_OpAllocObj::print_instr(outputStream* out) const { 1860 klass()->print(out); out->print(" "); 1861 obj()->print(out); out->print(" "); 1862 tmp1()->print(out); out->print(" "); 1863 tmp2()->print(out); out->print(" "); 1864 tmp3()->print(out); out->print(" "); 1865 tmp4()->print(out); out->print(" "); 1866 out->print("[hdr:%d]", header_size()); out->print(" "); 1867 out->print("[obj:%d]", object_size()); out->print(" "); 1868 out->print("[lbl:0x%x]", stub()->entry()); 1869 } 1870 1871 void LIR_OpRoundFP::print_instr(outputStream* out) const { 1872 _opr->print(out); out->print(" "); 1873 tmp()->print(out); out->print(" "); 1874 result_opr()->print(out); out->print(" "); 1875 } 1876 1877 // LIR_Op2 1878 void LIR_Op2::print_instr(outputStream* out) const { 1879 if (code() == lir_cmove) { 1880 print_condition(out, condition()); out->print(" "); 1881 } 1882 in_opr1()->print(out); out->print(" "); 1883 in_opr2()->print(out); out->print(" "); 1884 if (tmp_opr()->is_valid()) { tmp_opr()->print(out); out->print(" "); } 1885 result_opr()->print(out); 1886 } 1887 1888 void LIR_OpAllocArray::print_instr(outputStream* out) const { 1889 klass()->print(out); out->print(" "); 1890 len()->print(out); out->print(" "); 1891 obj()->print(out); out->print(" "); 1892 tmp1()->print(out); out->print(" "); 1893 tmp2()->print(out); out->print(" "); 1894 tmp3()->print(out); out->print(" "); 1895 tmp4()->print(out); out->print(" "); 1896 out->print("[type:0x%x]", type()); out->print(" "); 1897 out->print("[label:0x%x]", stub()->entry()); 1898 } 1899 1900 1901 void LIR_OpTypeCheck::print_instr(outputStream* out) const { 1902 object()->print(out); out->print(" "); 1903 if (code() == lir_store_check) { 1904 array()->print(out); out->print(" "); 1905 } 1906 if (code() != lir_store_check) { 1907 klass()->print_name_on(out); out->print(" "); 1908 if (fast_check()) out->print("fast_check "); 1909 } 1910 tmp1()->print(out); out->print(" "); 1911 tmp2()->print(out); out->print(" "); 1912 tmp3()->print(out); out->print(" "); 1913 result_opr()->print(out); out->print(" "); 1914 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci()); 1915 } 1916 1917 1918 // LIR_Op3 1919 void LIR_Op3::print_instr(outputStream* out) const { 1920 in_opr1()->print(out); out->print(" "); 1921 in_opr2()->print(out); out->print(" "); 1922 in_opr3()->print(out); out->print(" "); 1923 result_opr()->print(out); 1924 } 1925 1926 1927 void LIR_OpLock::print_instr(outputStream* out) const { 1928 hdr_opr()->print(out); out->print(" "); 1929 obj_opr()->print(out); out->print(" "); 1930 lock_opr()->print(out); out->print(" "); 1931 if (_scratch->is_valid()) { 1932 _scratch->print(out); out->print(" "); 1933 } 1934 out->print("[lbl:0x%x]", stub()->entry()); 1935 } 1936 1937 1938 void LIR_OpDelay::print_instr(outputStream* out) const { 1939 _op->print_on(out); 1940 } 1941 1942 1943 // LIR_OpProfileCall 1944 void LIR_OpProfileCall::print_instr(outputStream* out) const { 1945 profiled_method()->name()->print_symbol_on(out); 1946 out->print("."); 1947 profiled_method()->holder()->name()->print_symbol_on(out); 1948 out->print(" @ %d ", profiled_bci()); 1949 mdo()->print(out); out->print(" "); 1950 recv()->print(out); out->print(" "); 1951 tmp1()->print(out); out->print(" "); 1952 } 1953 1954 #endif // PRODUCT 1955 1956 // Implementation of LIR_InsertionBuffer 1957 1958 void LIR_InsertionBuffer::append(int index, LIR_Op* op) { 1959 assert(_index_and_count.length() % 2 == 0, "must have a count for each index"); 1960 1961 int i = number_of_insertion_points() - 1; 1962 if (i < 0 || index_at(i) < index) { 1963 append_new(index, 1); 1964 } else { 1965 assert(index_at(i) == index, "can append LIR_Ops in ascending order only"); 1966 assert(count_at(i) > 0, "check"); 1967 set_count_at(i, count_at(i) + 1); 1968 } 1969 _ops.push(op); 1970 1971 DEBUG_ONLY(verify()); 1972 } 1973 1974 #ifdef ASSERT 1975 void LIR_InsertionBuffer::verify() { 1976 int sum = 0; 1977 int prev_idx = -1; 1978 1979 for (int i = 0; i < number_of_insertion_points(); i++) { 1980 assert(prev_idx < index_at(i), "index must be ordered ascending"); 1981 sum += count_at(i); 1982 } 1983 assert(sum == number_of_ops(), "wrong total sum"); 1984 } 1985 #endif