1 /*
2 * Copyright (c) 2005, 2011, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_Compilation.hpp"
27 #include "c1/c1_FrameMap.hpp"
28 #include "c1/c1_Instruction.hpp"
29 #include "c1/c1_LIRAssembler.hpp"
30 #include "c1/c1_LIRGenerator.hpp"
31 #include "c1/c1_Runtime1.hpp"
32 #include "c1/c1_ValueStack.hpp"
33 #include "ci/ciArray.hpp"
34 #include "ci/ciObjArrayKlass.hpp"
35 #include "ci/ciTypeArrayKlass.hpp"
36 #include "runtime/sharedRuntime.hpp"
37 #include "runtime/stubRoutines.hpp"
38 #include "vmreg_x86.inline.hpp"
39
40 #ifdef ASSERT
41 #define __ gen()->lir(__FILE__, __LINE__)->
42 #else
43 #define __ gen()->lir()->
44 #endif
45
46 // Item will be loaded into a byte register; Intel only
47 void LIRItem::load_byte_item() {
48 load_item();
49 LIR_Opr res = result();
50
51 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
52 // make sure that it is a byte register
53 assert(!value()->type()->is_float() && !value()->type()->is_double(),
54 "can't load floats in byte register");
55 LIR_Opr reg = _gen->rlock_byte(T_BYTE);
56 __ move(res, reg);
57
58 _result = reg;
59 }
60 }
61
62
63 void LIRItem::load_nonconstant() {
64 LIR_Opr r = value()->operand();
65 if (r->is_constant()) {
66 _result = r;
67 } else {
68 load_item();
69 }
70 }
71
72 //--------------------------------------------------------------
73 // LIRGenerator
74 //--------------------------------------------------------------
75
76
77 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
78 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; }
79 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; }
80 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; }
81 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; }
82 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; }
83 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; }
84 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
85
86
87 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
88 LIR_Opr opr;
89 switch (type->tag()) {
90 case intTag: opr = FrameMap::rax_opr; break;
91 case objectTag: opr = FrameMap::rax_oop_opr; break;
92 case longTag: opr = FrameMap::long0_opr; break;
93 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break;
94 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break;
95
96 case addressTag:
97 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
98 }
99
100 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
101 return opr;
102 }
103
104
105 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
106 LIR_Opr reg = new_register(T_INT);
107 set_vreg_flag(reg, LIRGenerator::byte_reg);
108 return reg;
109 }
110
111
112 //--------- loading items into registers --------------------------------
113
114
115 // i486 instructions can inline constants
116 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
117 if (type == T_SHORT || type == T_CHAR) {
118 // there is no immediate move of word values in asembler_i486.?pp
119 return false;
120 }
121 Constant* c = v->as_Constant();
122 if (c && c->state_before() == NULL) {
123 // constants of any type can be stored directly, except for
124 // unloaded object constants.
125 return true;
126 }
127 return false;
128 }
129
130
131 bool LIRGenerator::can_inline_as_constant(Value v) const {
132 if (v->type()->tag() == longTag) return false;
133 return v->type()->tag() != objectTag ||
134 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
135 }
136
137
138 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
139 if (c->type() == T_LONG) return false;
140 return c->type() != T_OBJECT || c->as_jobject() == NULL;
141 }
142
143
144 LIR_Opr LIRGenerator::safepoint_poll_register() {
145 return LIR_OprFact::illegalOpr;
146 }
147
148
149 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
150 int shift, int disp, BasicType type) {
151 assert(base->is_register(), "must be");
152 if (index->is_constant()) {
153 return new LIR_Address(base,
154 (index->as_constant_ptr()->as_jint() << shift) + disp,
155 type);
156 } else {
157 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
158 }
159 }
160
161
162 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
163 BasicType type, bool needs_card_mark) {
164 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
165
166 LIR_Address* addr;
167 if (index_opr->is_constant()) {
168 int elem_size = type2aelembytes(type);
169 addr = new LIR_Address(array_opr,
170 offset_in_bytes + index_opr->as_jint() * elem_size, type);
171 } else {
172 #ifdef _LP64
173 if (index_opr->type() == T_INT) {
174 LIR_Opr tmp = new_register(T_LONG);
175 __ convert(Bytecodes::_i2l, index_opr, tmp);
176 index_opr = tmp;
177 }
178 #endif // _LP64
179 addr = new LIR_Address(array_opr,
180 index_opr,
181 LIR_Address::scale(type),
182 offset_in_bytes, type);
183 }
184 if (needs_card_mark) {
185 // This store will need a precise card mark, so go ahead and
186 // compute the full adddres instead of computing once for the
187 // store and again for the card mark.
188 LIR_Opr tmp = new_pointer_register();
189 __ leal(LIR_OprFact::address(addr), tmp);
190 return new LIR_Address(tmp, type);
191 } else {
192 return addr;
193 }
194 }
195
196
197 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
198 LIR_Opr r;
199 if (type == T_LONG) {
200 r = LIR_OprFact::longConst(x);
201 } else if (type == T_INT) {
202 r = LIR_OprFact::intConst(x);
203 } else {
204 ShouldNotReachHere();
205 }
206 return r;
207 }
208
209 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
210 LIR_Opr pointer = new_pointer_register();
211 __ move(LIR_OprFact::intptrConst(counter), pointer);
212 LIR_Address* addr = new LIR_Address(pointer, type);
213 increment_counter(addr, step);
214 }
215
216
217 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
218 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
219 }
220
221 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
222 __ cmp_mem_int(condition, base, disp, c, info);
223 }
224
225
226 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
227 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
228 }
229
230
231 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
232 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
233 }
234
235
236 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
237 if (tmp->is_valid()) {
238 if (is_power_of_2(c + 1)) {
239 __ move(left, tmp);
240 __ shift_left(left, log2_intptr(c + 1), left);
241 __ sub(left, tmp, result);
242 return true;
243 } else if (is_power_of_2(c - 1)) {
244 __ move(left, tmp);
245 __ shift_left(left, log2_intptr(c - 1), left);
246 __ add(left, tmp, result);
247 return true;
248 }
249 }
250 return false;
251 }
252
253
254 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
255 BasicType type = item->type();
256 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
257 }
258
259 //----------------------------------------------------------------------
260 // visitor functions
261 //----------------------------------------------------------------------
262
263
264 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
265 assert(x->is_pinned(),"");
266 bool needs_range_check = true;
267 bool use_length = x->length() != NULL;
268 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
269 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
270 !get_jobject_constant(x->value())->is_null_object() ||
271 x->should_profile());
272
273 LIRItem array(x->array(), this);
274 LIRItem index(x->index(), this);
275 LIRItem value(x->value(), this);
276 LIRItem length(this);
277
278 array.load_item();
279 index.load_nonconstant();
280
281 if (use_length) {
282 needs_range_check = x->compute_needs_range_check();
283 if (needs_range_check) {
284 length.set_instruction(x->length());
285 length.load_item();
286 }
287 }
288 if (needs_store_check) {
289 value.load_item();
290 } else {
291 value.load_for_store(x->elt_type());
292 }
293
294 set_no_result(x);
295
296 // the CodeEmitInfo must be duplicated for each different
297 // LIR-instruction because spilling can occur anywhere between two
298 // instructions and so the debug information must be different
299 CodeEmitInfo* range_check_info = state_for(x);
300 CodeEmitInfo* null_check_info = NULL;
301 if (x->needs_null_check()) {
302 null_check_info = new CodeEmitInfo(range_check_info);
303 }
304
305 // emit array address setup early so it schedules better
306 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
307
308 if (GenerateRangeChecks && needs_range_check) {
309 if (use_length) {
310 __ cmp(lir_cond_belowEqual, length.result(), index.result());
311 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
312 } else {
313 array_range_check(array.result(), index.result(), null_check_info, range_check_info);
314 // range_check also does the null check
315 null_check_info = NULL;
316 }
317 }
318
319 if (GenerateArrayStoreCheck && needs_store_check) {
320 LIR_Opr tmp1 = new_register(objectType);
321 LIR_Opr tmp2 = new_register(objectType);
322 LIR_Opr tmp3 = new_register(objectType);
323
324 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
325 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci());
326 }
327
328 if (obj_store) {
329 // Needs GC write barriers.
330 pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
331 true /* do_load */, false /* patch */, NULL);
332 __ move(value.result(), array_addr, null_check_info);
333 // Seems to be a precise
334 post_barrier(LIR_OprFact::address(array_addr), value.result());
335 } else {
336 __ move(value.result(), array_addr, null_check_info);
337 }
338 }
339
340
341 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
342 assert(x->is_pinned(),"");
343 LIRItem obj(x->obj(), this);
344 obj.load_item();
345
346 set_no_result(x);
347
348 // "lock" stores the address of the monitor stack slot, so this is not an oop
349 LIR_Opr lock = new_register(T_INT);
350 // Need a scratch register for biased locking on x86
351 LIR_Opr scratch = LIR_OprFact::illegalOpr;
352 if (UseBiasedLocking) {
353 scratch = new_register(T_INT);
354 }
355
356 CodeEmitInfo* info_for_exception = NULL;
357 if (x->needs_null_check()) {
358 info_for_exception = state_for(x);
359 }
360 // this CodeEmitInfo must not have the xhandlers because here the
361 // object is already locked (xhandlers expect object to be unlocked)
362 CodeEmitInfo* info = state_for(x, x->state(), true);
363 monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
364 x->monitor_no(), info_for_exception, info);
365 }
366
367
368 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
369 assert(x->is_pinned(),"");
370
371 LIRItem obj(x->obj(), this);
372 obj.dont_load_item();
373
374 LIR_Opr lock = new_register(T_INT);
375 LIR_Opr obj_temp = new_register(T_INT);
376 set_no_result(x);
377 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
378 }
379
380
381 // _ineg, _lneg, _fneg, _dneg
382 void LIRGenerator::do_NegateOp(NegateOp* x) {
383 LIRItem value(x->x(), this);
384 value.set_destroys_register();
385 value.load_item();
386 LIR_Opr reg = rlock(x);
387 __ negate(value.result(), reg);
388
389 set_result(x, round_item(reg));
390 }
391
392
393 // for _fadd, _fmul, _fsub, _fdiv, _frem
394 // _dadd, _dmul, _dsub, _ddiv, _drem
395 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
396 LIRItem left(x->x(), this);
397 LIRItem right(x->y(), this);
398 LIRItem* left_arg = &left;
399 LIRItem* right_arg = &right;
400 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
401 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
402 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
403 left.load_item();
404 } else {
405 left.dont_load_item();
406 }
407
408 // do not load right operand if it is a constant. only 0 and 1 are
409 // loaded because there are special instructions for loading them
410 // without memory access (not needed for SSE2 instructions)
411 bool must_load_right = false;
412 if (right.is_constant()) {
413 LIR_Const* c = right.result()->as_constant_ptr();
414 assert(c != NULL, "invalid constant");
415 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
416
417 if (c->type() == T_FLOAT) {
418 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
419 } else {
420 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
421 }
422 }
423
424 if (must_load_both) {
425 // frem and drem destroy also right operand, so move it to a new register
426 right.set_destroys_register();
427 right.load_item();
428 } else if (right.is_register() || must_load_right) {
429 right.load_item();
430 } else {
431 right.dont_load_item();
432 }
433 LIR_Opr reg = rlock(x);
434 LIR_Opr tmp = LIR_OprFact::illegalOpr;
435 if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) {
436 tmp = new_register(T_DOUBLE);
437 }
438
439 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
440 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
441 LIR_Opr fpu0, fpu1;
442 if (x->op() == Bytecodes::_frem) {
443 fpu0 = LIR_OprFact::single_fpu(0);
444 fpu1 = LIR_OprFact::single_fpu(1);
445 } else {
446 fpu0 = LIR_OprFact::double_fpu(0);
447 fpu1 = LIR_OprFact::double_fpu(1);
448 }
449 __ move(right.result(), fpu1); // order of left and right operand is important!
450 __ move(left.result(), fpu0);
451 __ rem (fpu0, fpu1, fpu0);
452 __ move(fpu0, reg);
453
454 } else {
455 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp);
456 }
457
458 set_result(x, round_item(reg));
459 }
460
461
462 // for _ladd, _lmul, _lsub, _ldiv, _lrem
463 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
464 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
465 // long division is implemented as a direct call into the runtime
466 LIRItem left(x->x(), this);
467 LIRItem right(x->y(), this);
468
469 // the check for division by zero destroys the right operand
470 right.set_destroys_register();
471
472 BasicTypeList signature(2);
473 signature.append(T_LONG);
474 signature.append(T_LONG);
475 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
476
477 // check for division by zero (destroys registers of right operand!)
478 CodeEmitInfo* info = state_for(x);
479
480 const LIR_Opr result_reg = result_register_for(x->type());
481 left.load_item_force(cc->at(1));
482 right.load_item();
483
484 __ move(right.result(), cc->at(0));
485
486 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
487 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
488
489 address entry;
490 switch (x->op()) {
491 case Bytecodes::_lrem:
492 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
493 break; // check if dividend is 0 is done elsewhere
494 case Bytecodes::_ldiv:
495 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
496 break; // check if dividend is 0 is done elsewhere
497 case Bytecodes::_lmul:
498 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
499 break;
500 default:
501 ShouldNotReachHere();
502 }
503
504 LIR_Opr result = rlock_result(x);
505 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
506 __ move(result_reg, result);
507 } else if (x->op() == Bytecodes::_lmul) {
508 // missing test if instr is commutative and if we should swap
509 LIRItem left(x->x(), this);
510 LIRItem right(x->y(), this);
511
512 // right register is destroyed by the long mul, so it must be
513 // copied to a new register.
514 right.set_destroys_register();
515
516 left.load_item();
517 right.load_item();
518
519 LIR_Opr reg = FrameMap::long0_opr;
520 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
521 LIR_Opr result = rlock_result(x);
522 __ move(reg, result);
523 } else {
524 // missing test if instr is commutative and if we should swap
525 LIRItem left(x->x(), this);
526 LIRItem right(x->y(), this);
527
528 left.load_item();
529 // don't load constants to save register
530 right.load_nonconstant();
531 rlock_result(x);
532 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
533 }
534 }
535
536
537
538 // for: _iadd, _imul, _isub, _idiv, _irem
539 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
540 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
541 // The requirements for division and modulo
542 // input : rax,: dividend min_int
543 // reg: divisor (may not be rax,/rdx) -1
544 //
545 // output: rax,: quotient (= rax, idiv reg) min_int
546 // rdx: remainder (= rax, irem reg) 0
547
548 // rax, and rdx will be destroyed
549
550 // Note: does this invalidate the spec ???
551 LIRItem right(x->y(), this);
552 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid
553
554 // call state_for before load_item_force because state_for may
555 // force the evaluation of other instructions that are needed for
556 // correct debug info. Otherwise the live range of the fix
557 // register might be too long.
558 CodeEmitInfo* info = state_for(x);
559
560 left.load_item_force(divInOpr());
561
562 right.load_item();
563
564 LIR_Opr result = rlock_result(x);
565 LIR_Opr result_reg;
566 if (x->op() == Bytecodes::_idiv) {
567 result_reg = divOutOpr();
568 } else {
569 result_reg = remOutOpr();
570 }
571
572 if (!ImplicitDiv0Checks) {
573 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
574 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
575 }
576 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
577 if (x->op() == Bytecodes::_irem) {
578 __ irem(left.result(), right.result(), result_reg, tmp, info);
579 } else if (x->op() == Bytecodes::_idiv) {
580 __ idiv(left.result(), right.result(), result_reg, tmp, info);
581 } else {
582 ShouldNotReachHere();
583 }
584
585 __ move(result_reg, result);
586 } else {
587 // missing test if instr is commutative and if we should swap
588 LIRItem left(x->x(), this);
589 LIRItem right(x->y(), this);
590 LIRItem* left_arg = &left;
591 LIRItem* right_arg = &right;
592 if (x->is_commutative() && left.is_stack() && right.is_register()) {
593 // swap them if left is real stack (or cached) and right is real register(not cached)
594 left_arg = &right;
595 right_arg = &left;
596 }
597
598 left_arg->load_item();
599
600 // do not need to load right, as we can handle stack and constants
601 if (x->op() == Bytecodes::_imul ) {
602 // check if we can use shift instead
603 bool use_constant = false;
604 bool use_tmp = false;
605 if (right_arg->is_constant()) {
606 int iconst = right_arg->get_jint_constant();
607 if (iconst > 0) {
608 if (is_power_of_2(iconst)) {
609 use_constant = true;
610 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
611 use_constant = true;
612 use_tmp = true;
613 }
614 }
615 }
616 if (use_constant) {
617 right_arg->dont_load_item();
618 } else {
619 right_arg->load_item();
620 }
621 LIR_Opr tmp = LIR_OprFact::illegalOpr;
622 if (use_tmp) {
623 tmp = new_register(T_INT);
624 }
625 rlock_result(x);
626
627 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
628 } else {
629 right_arg->dont_load_item();
630 rlock_result(x);
631 LIR_Opr tmp = LIR_OprFact::illegalOpr;
632 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
633 }
634 }
635 }
636
637
638 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
639 // when an operand with use count 1 is the left operand, then it is
640 // likely that no move for 2-operand-LIR-form is necessary
641 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
642 x->swap_operands();
643 }
644
645 ValueTag tag = x->type()->tag();
646 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
647 switch (tag) {
648 case floatTag:
649 case doubleTag: do_ArithmeticOp_FPU(x); return;
650 case longTag: do_ArithmeticOp_Long(x); return;
651 case intTag: do_ArithmeticOp_Int(x); return;
652 }
653 ShouldNotReachHere();
654 }
655
656
657 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
658 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
659 // count must always be in rcx
660 LIRItem value(x->x(), this);
661 LIRItem count(x->y(), this);
662
663 ValueTag elemType = x->type()->tag();
664 bool must_load_count = !count.is_constant() || elemType == longTag;
665 if (must_load_count) {
666 // count for long must be in register
667 count.load_item_force(shiftCountOpr());
668 } else {
669 count.dont_load_item();
670 }
671 value.load_item();
672 LIR_Opr reg = rlock_result(x);
673
674 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
675 }
676
677
678 // _iand, _land, _ior, _lor, _ixor, _lxor
679 void LIRGenerator::do_LogicOp(LogicOp* x) {
680 // when an operand with use count 1 is the left operand, then it is
681 // likely that no move for 2-operand-LIR-form is necessary
682 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
683 x->swap_operands();
684 }
685
686 LIRItem left(x->x(), this);
687 LIRItem right(x->y(), this);
688
689 left.load_item();
690 right.load_nonconstant();
691 LIR_Opr reg = rlock_result(x);
692
693 logic_op(x->op(), reg, left.result(), right.result());
694 }
695
696
697
698 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
699 void LIRGenerator::do_CompareOp(CompareOp* x) {
700 LIRItem left(x->x(), this);
701 LIRItem right(x->y(), this);
702 ValueTag tag = x->x()->type()->tag();
703 if (tag == longTag) {
704 left.set_destroys_register();
705 }
706 left.load_item();
707 right.load_item();
708 LIR_Opr reg = rlock_result(x);
709
710 if (x->x()->type()->is_float_kind()) {
711 Bytecodes::Code code = x->op();
712 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
713 } else if (x->x()->type()->tag() == longTag) {
714 __ lcmp2int(left.result(), right.result(), reg);
715 } else {
716 Unimplemented();
717 }
718 }
719
720
721 void LIRGenerator::do_AttemptUpdate(Intrinsic* x) {
722 assert(x->number_of_arguments() == 3, "wrong type");
723 LIRItem obj (x->argument_at(0), this); // AtomicLong object
724 LIRItem cmp_value (x->argument_at(1), this); // value to compare with field
725 LIRItem new_value (x->argument_at(2), this); // replace field with new_value if it matches cmp_value
726
727 // compare value must be in rdx,eax (hi,lo); may be destroyed by cmpxchg8 instruction
728 cmp_value.load_item_force(FrameMap::long0_opr);
729
730 // new value must be in rcx,ebx (hi,lo)
731 new_value.load_item_force(FrameMap::long1_opr);
732
733 // object pointer register is overwritten with field address
734 obj.load_item();
735
736 // generate compare-and-swap; produces zero condition if swap occurs
737 int value_offset = sun_misc_AtomicLongCSImpl::value_offset();
738 LIR_Opr addr = new_pointer_register();
739 __ leal(LIR_OprFact::address(new LIR_Address(obj.result(), value_offset, T_LONG)), addr);
740 LIR_Opr t1 = LIR_OprFact::illegalOpr; // no temp needed
741 LIR_Opr t2 = LIR_OprFact::illegalOpr; // no temp needed
742 __ cas_long(addr, cmp_value.result(), new_value.result(), t1, t2);
743
744 // generate conditional move of boolean result
745 LIR_Opr result = rlock_result(x);
746 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0), result, T_LONG);
747 }
748
749
750 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
751 assert(x->number_of_arguments() == 4, "wrong type");
752 LIRItem obj (x->argument_at(0), this); // object
753 LIRItem offset(x->argument_at(1), this); // offset of field
754 LIRItem cmp (x->argument_at(2), this); // value to compare with field
755 LIRItem val (x->argument_at(3), this); // replace field with val if matches cmp
756
757 assert(obj.type()->tag() == objectTag, "invalid type");
758
759 // In 64bit the type can be long, sparc doesn't have this assert
760 // assert(offset.type()->tag() == intTag, "invalid type");
761
762 assert(cmp.type()->tag() == type->tag(), "invalid type");
763 assert(val.type()->tag() == type->tag(), "invalid type");
764
765 // get address of field
766 obj.load_item();
767 offset.load_nonconstant();
768
769 if (type == objectType) {
770 cmp.load_item_force(FrameMap::rax_oop_opr);
771 val.load_item();
772 } else if (type == intType) {
773 cmp.load_item_force(FrameMap::rax_opr);
774 val.load_item();
775 } else if (type == longType) {
776 cmp.load_item_force(FrameMap::long0_opr);
777 val.load_item_force(FrameMap::long1_opr);
778 } else {
779 ShouldNotReachHere();
780 }
781
782 LIR_Opr addr = new_pointer_register();
783 LIR_Address* a;
784 if(offset.result()->is_constant()) {
785 a = new LIR_Address(obj.result(),
786 NOT_LP64(offset.result()->as_constant_ptr()->as_jint()) LP64_ONLY((int)offset.result()->as_constant_ptr()->as_jlong()),
787 as_BasicType(type));
788 } else {
789 a = new LIR_Address(obj.result(),
790 offset.result(),
791 LIR_Address::times_1,
792 0,
793 as_BasicType(type));
794 }
795 __ leal(LIR_OprFact::address(a), addr);
796
797 if (type == objectType) { // Write-barrier needed for Object fields.
798 // Do the pre-write barrier, if any.
799 pre_barrier(addr, LIR_OprFact::illegalOpr /* pre_val */,
800 true /* do_load */, false /* patch */, NULL);
801 }
802
803 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
804 if (type == objectType)
805 __ cas_obj(addr, cmp.result(), val.result(), ill, ill);
806 else if (type == intType)
807 __ cas_int(addr, cmp.result(), val.result(), ill, ill);
808 else if (type == longType)
809 __ cas_long(addr, cmp.result(), val.result(), ill, ill);
810 else {
811 ShouldNotReachHere();
812 }
813
814 // generate conditional move of boolean result
815 LIR_Opr result = rlock_result(x);
816 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
817 result, as_BasicType(type));
818 if (type == objectType) { // Write-barrier needed for Object fields.
819 // Seems to be precise
820 post_barrier(addr, val.result());
821 }
822 }
823
824
825 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
826 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
827 LIRItem value(x->argument_at(0), this);
828
829 bool use_fpu = false;
830 if (UseSSE >= 2) {
831 switch(x->id()) {
832 case vmIntrinsics::_dsin:
833 case vmIntrinsics::_dcos:
834 case vmIntrinsics::_dtan:
835 case vmIntrinsics::_dlog:
836 case vmIntrinsics::_dlog10:
837 case vmIntrinsics::_dexp:
838 case vmIntrinsics::_dpow:
839 use_fpu = true;
840 }
841 } else {
842 value.set_destroys_register();
843 }
844
845 value.load_item();
846
847 LIR_Opr calc_input = value.result();
848 LIR_Opr calc_input2 = NULL;
849 if (x->id() == vmIntrinsics::_dpow) {
850 LIRItem extra_arg(x->argument_at(1), this);
851 if (UseSSE < 2) {
852 extra_arg.set_destroys_register();
853 }
854 extra_arg.load_item();
855 calc_input2 = extra_arg.result();
856 }
857 LIR_Opr calc_result = rlock_result(x);
858
859 // sin, cos, pow and exp need two free fpu stack slots, so register
860 // two temporary operands
861 LIR_Opr tmp1 = FrameMap::caller_save_fpu_reg_at(0);
862 LIR_Opr tmp2 = FrameMap::caller_save_fpu_reg_at(1);
863
864 if (use_fpu) {
865 LIR_Opr tmp = FrameMap::fpu0_double_opr;
866 int tmp_start = 1;
867 if (calc_input2 != NULL) {
868 __ move(calc_input2, tmp);
869 tmp_start = 2;
870 calc_input2 = tmp;
871 }
872 __ move(calc_input, tmp);
873
874 calc_input = tmp;
875 calc_result = tmp;
876
877 tmp1 = FrameMap::caller_save_fpu_reg_at(tmp_start);
878 tmp2 = FrameMap::caller_save_fpu_reg_at(tmp_start + 1);
879 }
880
881 switch(x->id()) {
882 case vmIntrinsics::_dabs: __ abs (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
883 case vmIntrinsics::_dsqrt: __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
884 case vmIntrinsics::_dsin: __ sin (calc_input, calc_result, tmp1, tmp2); break;
885 case vmIntrinsics::_dcos: __ cos (calc_input, calc_result, tmp1, tmp2); break;
886 case vmIntrinsics::_dtan: __ tan (calc_input, calc_result, tmp1, tmp2); break;
887 case vmIntrinsics::_dlog: __ log (calc_input, calc_result, tmp1); break;
888 case vmIntrinsics::_dlog10: __ log10(calc_input, calc_result, tmp1); break;
889 case vmIntrinsics::_dexp: __ exp (calc_input, calc_result, tmp1, tmp2, FrameMap::rax_opr, FrameMap::rcx_opr, FrameMap::rdx_opr); break;
890 case vmIntrinsics::_dpow: __ pow (calc_input, calc_input2, calc_result, tmp1, tmp2, FrameMap::rax_opr, FrameMap::rcx_opr, FrameMap::rdx_opr); break;
891 default: ShouldNotReachHere();
892 }
893
894 if (use_fpu) {
895 __ move(calc_result, x->operand());
896 }
897 }
898
899
900 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
901 assert(x->number_of_arguments() == 5, "wrong type");
902
903 // Make all state_for calls early since they can emit code
904 CodeEmitInfo* info = state_for(x, x->state());
905
906 LIRItem src(x->argument_at(0), this);
907 LIRItem src_pos(x->argument_at(1), this);
908 LIRItem dst(x->argument_at(2), this);
909 LIRItem dst_pos(x->argument_at(3), this);
910 LIRItem length(x->argument_at(4), this);
911
912 // operands for arraycopy must use fixed registers, otherwise
913 // LinearScan will fail allocation (because arraycopy always needs a
914 // call)
915
916 #ifndef _LP64
917 src.load_item_force (FrameMap::rcx_oop_opr);
918 src_pos.load_item_force (FrameMap::rdx_opr);
919 dst.load_item_force (FrameMap::rax_oop_opr);
920 dst_pos.load_item_force (FrameMap::rbx_opr);
921 length.load_item_force (FrameMap::rdi_opr);
922 LIR_Opr tmp = (FrameMap::rsi_opr);
923 #else
924
925 // The java calling convention will give us enough registers
926 // so that on the stub side the args will be perfect already.
927 // On the other slow/special case side we call C and the arg
928 // positions are not similar enough to pick one as the best.
929 // Also because the java calling convention is a "shifted" version
930 // of the C convention we can process the java args trivially into C
931 // args without worry of overwriting during the xfer
932
933 src.load_item_force (FrameMap::as_oop_opr(j_rarg0));
934 src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
935 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2));
936 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
937 length.load_item_force (FrameMap::as_opr(j_rarg4));
938
939 LIR_Opr tmp = FrameMap::as_opr(j_rarg5);
940 #endif // LP64
941
942 set_no_result(x);
943
944 int flags;
945 ciArrayKlass* expected_type;
946 arraycopy_helper(x, &flags, &expected_type);
947
948 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
949 }
950
951
952 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
953 // _i2b, _i2c, _i2s
954 LIR_Opr fixed_register_for(BasicType type) {
955 switch (type) {
956 case T_FLOAT: return FrameMap::fpu0_float_opr;
957 case T_DOUBLE: return FrameMap::fpu0_double_opr;
958 case T_INT: return FrameMap::rax_opr;
959 case T_LONG: return FrameMap::long0_opr;
960 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
961 }
962 }
963
964 void LIRGenerator::do_Convert(Convert* x) {
965 // flags that vary for the different operations and different SSE-settings
966 bool fixed_input, fixed_result, round_result, needs_stub;
967
968 switch (x->op()) {
969 case Bytecodes::_i2l: // fall through
970 case Bytecodes::_l2i: // fall through
971 case Bytecodes::_i2b: // fall through
972 case Bytecodes::_i2c: // fall through
973 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
974
975 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break;
976 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
977 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break;
978 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
979 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
980 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
981 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
982 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
983 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
984 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
985 default: ShouldNotReachHere();
986 }
987
988 LIRItem value(x->value(), this);
989 value.load_item();
990 LIR_Opr input = value.result();
991 LIR_Opr result = rlock(x);
992
993 // arguments of lir_convert
994 LIR_Opr conv_input = input;
995 LIR_Opr conv_result = result;
996 ConversionStub* stub = NULL;
997
998 if (fixed_input) {
999 conv_input = fixed_register_for(input->type());
1000 __ move(input, conv_input);
1001 }
1002
1003 assert(fixed_result == false || round_result == false, "cannot set both");
1004 if (fixed_result) {
1005 conv_result = fixed_register_for(result->type());
1006 } else if (round_result) {
1007 result = new_register(result->type());
1008 set_vreg_flag(result, must_start_in_memory);
1009 }
1010
1011 if (needs_stub) {
1012 stub = new ConversionStub(x->op(), conv_input, conv_result);
1013 }
1014
1015 __ convert(x->op(), conv_input, conv_result, stub);
1016
1017 if (result != conv_result) {
1018 __ move(conv_result, result);
1019 }
1020
1021 assert(result->is_virtual(), "result must be virtual register");
1022 set_result(x, result);
1023 }
1024
1025
1026 void LIRGenerator::do_NewInstance(NewInstance* x) {
1027 #ifndef PRODUCT
1028 if (PrintNotLoaded && !x->klass()->is_loaded()) {
1029 tty->print_cr(" ###class not loaded at new bci %d", x->printable_bci());
1030 }
1031 #endif
1032 CodeEmitInfo* info = state_for(x, x->state());
1033 LIR_Opr reg = result_register_for(x->type());
1034 LIR_Opr klass_reg = new_register(objectType);
1035 new_instance(reg, x->klass(),
1036 FrameMap::rcx_oop_opr,
1037 FrameMap::rdi_oop_opr,
1038 FrameMap::rsi_oop_opr,
1039 LIR_OprFact::illegalOpr,
1040 FrameMap::rdx_oop_opr, info);
1041 LIR_Opr result = rlock_result(x);
1042 __ move(reg, result);
1043 }
1044
1045
1046 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1047 CodeEmitInfo* info = state_for(x, x->state());
1048
1049 LIRItem length(x->length(), this);
1050 length.load_item_force(FrameMap::rbx_opr);
1051
1052 LIR_Opr reg = result_register_for(x->type());
1053 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1054 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1055 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1056 LIR_Opr tmp4 = reg;
1057 LIR_Opr klass_reg = FrameMap::rdx_oop_opr;
1058 LIR_Opr len = length.result();
1059 BasicType elem_type = x->elt_type();
1060
1061 __ oop2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1062
1063 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1064 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1065
1066 LIR_Opr result = rlock_result(x);
1067 __ move(reg, result);
1068 }
1069
1070
1071 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1072 LIRItem length(x->length(), this);
1073 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1074 // and therefore provide the state before the parameters have been consumed
1075 CodeEmitInfo* patching_info = NULL;
1076 if (!x->klass()->is_loaded() || PatchALot) {
1077 patching_info = state_for(x, x->state_before());
1078 }
1079
1080 CodeEmitInfo* info = state_for(x, x->state());
1081
1082 const LIR_Opr reg = result_register_for(x->type());
1083 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1084 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1085 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1086 LIR_Opr tmp4 = reg;
1087 LIR_Opr klass_reg = FrameMap::rdx_oop_opr;
1088
1089 length.load_item_force(FrameMap::rbx_opr);
1090 LIR_Opr len = length.result();
1091
1092 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1093 ciObject* obj = (ciObject*) ciObjArrayKlass::make(x->klass());
1094 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1095 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1096 }
1097 jobject2reg_with_patching(klass_reg, obj, patching_info);
1098 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1099
1100 LIR_Opr result = rlock_result(x);
1101 __ move(reg, result);
1102 }
1103
1104
1105 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1106 Values* dims = x->dims();
1107 int i = dims->length();
1108 LIRItemList* items = new LIRItemList(dims->length(), NULL);
1109 while (i-- > 0) {
1110 LIRItem* size = new LIRItem(dims->at(i), this);
1111 items->at_put(i, size);
1112 }
1113
1114 // Evaluate state_for early since it may emit code.
1115 CodeEmitInfo* patching_info = NULL;
1116 if (!x->klass()->is_loaded() || PatchALot) {
1117 patching_info = state_for(x, x->state_before());
1118
1119 // cannot re-use same xhandlers for multiple CodeEmitInfos, so
1120 // clone all handlers. This is handled transparently in other
1121 // places by the CodeEmitInfo cloning logic but is handled
1122 // specially here because a stub isn't being used.
1123 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1124 }
1125 CodeEmitInfo* info = state_for(x, x->state());
1126
1127 i = dims->length();
1128 while (i-- > 0) {
1129 LIRItem* size = items->at(i);
1130 size->load_nonconstant();
1131
1132 store_stack_parameter(size->result(), in_ByteSize(i*4));
1133 }
1134
1135 LIR_Opr reg = result_register_for(x->type());
1136 jobject2reg_with_patching(reg, x->klass(), patching_info);
1137
1138 LIR_Opr rank = FrameMap::rbx_opr;
1139 __ move(LIR_OprFact::intConst(x->rank()), rank);
1140 LIR_Opr varargs = FrameMap::rcx_opr;
1141 __ move(FrameMap::rsp_opr, varargs);
1142 LIR_OprList* args = new LIR_OprList(3);
1143 args->append(reg);
1144 args->append(rank);
1145 args->append(varargs);
1146 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1147 LIR_OprFact::illegalOpr,
1148 reg, args, info);
1149
1150 LIR_Opr result = rlock_result(x);
1151 __ move(reg, result);
1152 }
1153
1154
1155 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1156 // nothing to do for now
1157 }
1158
1159
1160 void LIRGenerator::do_CheckCast(CheckCast* x) {
1161 LIRItem obj(x->obj(), this);
1162
1163 CodeEmitInfo* patching_info = NULL;
1164 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
1165 // must do this before locking the destination register as an oop register,
1166 // and before the obj is loaded (the latter is for deoptimization)
1167 patching_info = state_for(x, x->state_before());
1168 }
1169 obj.load_item();
1170
1171 // info for exceptions
1172 CodeEmitInfo* info_for_exception = state_for(x);
1173
1174 CodeStub* stub;
1175 if (x->is_incompatible_class_change_check()) {
1176 assert(patching_info == NULL, "can't patch this");
1177 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1178 } else {
1179 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1180 }
1181 LIR_Opr reg = rlock_result(x);
1182 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1183 if (!x->klass()->is_loaded() || UseCompressedOops) {
1184 tmp3 = new_register(objectType);
1185 }
1186 __ checkcast(reg, obj.result(), x->klass(),
1187 new_register(objectType), new_register(objectType), tmp3,
1188 x->direct_compare(), info_for_exception, patching_info, stub,
1189 x->profiled_method(), x->profiled_bci());
1190 }
1191
1192
1193 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1194 LIRItem obj(x->obj(), this);
1195
1196 // result and test object may not be in same register
1197 LIR_Opr reg = rlock_result(x);
1198 CodeEmitInfo* patching_info = NULL;
1199 if ((!x->klass()->is_loaded() || PatchALot)) {
1200 // must do this before locking the destination register as an oop register
1201 patching_info = state_for(x, x->state_before());
1202 }
1203 obj.load_item();
1204 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1205 if (!x->klass()->is_loaded() || UseCompressedOops) {
1206 tmp3 = new_register(objectType);
1207 }
1208 __ instanceof(reg, obj.result(), x->klass(),
1209 new_register(objectType), new_register(objectType), tmp3,
1210 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1211 }
1212
1213
1214 void LIRGenerator::do_If(If* x) {
1215 assert(x->number_of_sux() == 2, "inconsistency");
1216 ValueTag tag = x->x()->type()->tag();
1217 bool is_safepoint = x->is_safepoint();
1218
1219 If::Condition cond = x->cond();
1220
1221 LIRItem xitem(x->x(), this);
1222 LIRItem yitem(x->y(), this);
1223 LIRItem* xin = &xitem;
1224 LIRItem* yin = &yitem;
1225
1226 if (tag == longTag) {
1227 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1228 // mirror for other conditions
1229 if (cond == If::gtr || cond == If::leq) {
1230 cond = Instruction::mirror(cond);
1231 xin = &yitem;
1232 yin = &xitem;
1233 }
1234 xin->set_destroys_register();
1235 }
1236 xin->load_item();
1237 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1238 // inline long zero
1239 yin->dont_load_item();
1240 } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1241 // longs cannot handle constants at right side
1242 yin->load_item();
1243 } else {
1244 yin->dont_load_item();
1245 }
1246
1247 // add safepoint before generating condition code so it can be recomputed
1248 if (x->is_safepoint()) {
1249 // increment backedge counter if needed
1250 increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
1251 __ safepoint(LIR_OprFact::illegalOpr, state_for(x, x->state_before()));
1252 }
1253 set_no_result(x);
1254
1255 LIR_Opr left = xin->result();
1256 LIR_Opr right = yin->result();
1257 __ cmp(lir_cond(cond), left, right);
1258 // Generate branch profiling. Profiling code doesn't kill flags.
1259 profile_branch(x, cond);
1260 move_to_phi(x->state());
1261 if (x->x()->type()->is_float_kind()) {
1262 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1263 } else {
1264 __ branch(lir_cond(cond), right->type(), x->tsux());
1265 }
1266 assert(x->default_sux() == x->fsux(), "wrong destination above");
1267 __ jump(x->default_sux());
1268 }
1269
1270
1271 LIR_Opr LIRGenerator::getThreadPointer() {
1272 #ifdef _LP64
1273 return FrameMap::as_pointer_opr(r15_thread);
1274 #else
1275 LIR_Opr result = new_register(T_INT);
1276 __ get_thread(result);
1277 return result;
1278 #endif //
1279 }
1280
1281 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1282 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1283 LIR_OprList* args = new LIR_OprList();
1284 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1285 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1286 }
1287
1288
1289 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1290 CodeEmitInfo* info) {
1291 if (address->type() == T_LONG) {
1292 address = new LIR_Address(address->base(),
1293 address->index(), address->scale(),
1294 address->disp(), T_DOUBLE);
1295 // Transfer the value atomically by using FP moves. This means
1296 // the value has to be moved between CPU and FPU registers. It
1297 // always has to be moved through spill slot since there's no
1298 // quick way to pack the value into an SSE register.
1299 LIR_Opr temp_double = new_register(T_DOUBLE);
1300 LIR_Opr spill = new_register(T_LONG);
1301 set_vreg_flag(spill, must_start_in_memory);
1302 __ move(value, spill);
1303 __ volatile_move(spill, temp_double, T_LONG);
1304 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1305 } else {
1306 __ store(value, address, info);
1307 }
1308 }
1309
1310
1311
1312 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1313 CodeEmitInfo* info) {
1314 if (address->type() == T_LONG) {
1315 address = new LIR_Address(address->base(),
1316 address->index(), address->scale(),
1317 address->disp(), T_DOUBLE);
1318 // Transfer the value atomically by using FP moves. This means
1319 // the value has to be moved between CPU and FPU registers. In
1320 // SSE0 and SSE1 mode it has to be moved through spill slot but in
1321 // SSE2+ mode it can be moved directly.
1322 LIR_Opr temp_double = new_register(T_DOUBLE);
1323 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1324 __ volatile_move(temp_double, result, T_LONG);
1325 if (UseSSE < 2) {
1326 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1327 set_vreg_flag(result, must_start_in_memory);
1328 }
1329 } else {
1330 __ load(address, result, info);
1331 }
1332 }
1333
1334 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
1335 BasicType type, bool is_volatile) {
1336 if (is_volatile && type == T_LONG) {
1337 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1338 LIR_Opr tmp = new_register(T_DOUBLE);
1339 __ load(addr, tmp);
1340 LIR_Opr spill = new_register(T_LONG);
1341 set_vreg_flag(spill, must_start_in_memory);
1342 __ move(tmp, spill);
1343 __ move(spill, dst);
1344 } else {
1345 LIR_Address* addr = new LIR_Address(src, offset, type);
1346 __ load(addr, dst);
1347 }
1348 }
1349
1350
1351 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1352 BasicType type, bool is_volatile) {
1353 if (is_volatile && type == T_LONG) {
1354 LIR_Address* addr = new LIR_Address(src, offset, T_DOUBLE);
1355 LIR_Opr tmp = new_register(T_DOUBLE);
1356 LIR_Opr spill = new_register(T_DOUBLE);
1357 set_vreg_flag(spill, must_start_in_memory);
1358 __ move(data, spill);
1359 __ move(spill, tmp);
1360 __ move(tmp, addr);
1361 } else {
1362 LIR_Address* addr = new LIR_Address(src, offset, type);
1363 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1364 if (is_obj) {
1365 // Do the pre-write barrier, if any.
1366 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1367 true /* do_load */, false /* patch */, NULL);
1368 __ move(data, addr);
1369 assert(src->is_register(), "must be register");
1370 // Seems to be a precise address
1371 post_barrier(LIR_OprFact::address(addr), data);
1372 } else {
1373 __ move(data, addr);
1374 }
1375 }
1376 }