src/share/vm/c1/c1_LIR.cpp

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rev 3227 : 7133857: exp() and pow() should use the x87 ISA on x86
Summary: use x87 instructions to implement exp() and pow() in interpreter/c1/c2.
Reviewed-by:


 607     case lir_cmp:
 608     case lir_cmp_l2i:
 609     case lir_ucmp_fd2i:
 610     case lir_cmp_fd2i:
 611     case lir_add:
 612     case lir_sub:
 613     case lir_mul:
 614     case lir_div:
 615     case lir_rem:
 616     case lir_sqrt:
 617     case lir_abs:
 618     case lir_logic_and:
 619     case lir_logic_or:
 620     case lir_logic_xor:
 621     case lir_shl:
 622     case lir_shr:
 623     case lir_ushr:
 624     {
 625       assert(op->as_Op2() != NULL, "must be");
 626       LIR_Op2* op2 = (LIR_Op2*)op;


 627 
 628       if (op2->_info)                     do_info(op2->_info);
 629       if (op2->_opr1->is_valid())         do_input(op2->_opr1);
 630       if (op2->_opr2->is_valid())         do_input(op2->_opr2);
 631       if (op2->_tmp->is_valid())          do_temp(op2->_tmp);
 632       if (op2->_result->is_valid())       do_output(op2->_result);
 633 
 634       break;
 635     }
 636 
 637     // special handling for cmove: right input operand must not be equal
 638     // to the result operand, otherwise the backend fails
 639     case lir_cmove:
 640     {
 641       assert(op->as_Op2() != NULL, "must be");
 642       LIR_Op2* op2 = (LIR_Op2*)op;
 643 
 644       assert(op2->_info == NULL && op2->_tmp->is_illegal(), "not used");

 645       assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used");
 646 
 647       do_input(op2->_opr1);
 648       do_input(op2->_opr2);
 649       do_temp(op2->_opr2);
 650       do_output(op2->_result);
 651 
 652       break;
 653     }
 654 
 655     // vspecial handling for strict operations: register input operands
 656     // as temp to guarantee that they do not overlap with other
 657     // registers
 658     case lir_mul_strictfp:
 659     case lir_div_strictfp:
 660     {
 661       assert(op->as_Op2() != NULL, "must be");
 662       LIR_Op2* op2 = (LIR_Op2*)op;
 663 
 664       assert(op2->_info == NULL, "not used");
 665       assert(op2->_opr1->is_valid(), "used");
 666       assert(op2->_opr2->is_valid(), "used");
 667       assert(op2->_result->is_valid(), "used");


 668 
 669       do_input(op2->_opr1); do_temp(op2->_opr1);
 670       do_input(op2->_opr2); do_temp(op2->_opr2);
 671       if (op2->_tmp->is_valid()) do_temp(op2->_tmp);
 672       do_output(op2->_result);
 673 
 674       break;
 675     }
 676 
 677     case lir_throw: {
 678       assert(op->as_Op2() != NULL, "must be");
 679       LIR_Op2* op2 = (LIR_Op2*)op;
 680 
 681       if (op2->_info)                     do_info(op2->_info);
 682       if (op2->_opr1->is_valid())         do_temp(op2->_opr1);
 683       if (op2->_opr2->is_valid())         do_input(op2->_opr2); // exception object is input parameter
 684       assert(op2->_result->is_illegal(), "no result");


 685 
 686       break;
 687     }
 688 
 689     case lir_unwind: {
 690       assert(op->as_Op1() != NULL, "must be");
 691       LIR_Op1* op1 = (LIR_Op1*)op;
 692 
 693       assert(op1->_info == NULL, "no info");
 694       assert(op1->_opr->is_valid(), "exception oop");         do_input(op1->_opr);
 695       assert(op1->_result->is_illegal(), "no result");
 696 
 697       break;
 698     }
 699 
 700 
 701     case lir_tan:
 702     case lir_sin:
 703     case lir_cos:
 704     case lir_log:
 705     case lir_log10: {

 706       assert(op->as_Op2() != NULL, "must be");
 707       LIR_Op2* op2 = (LIR_Op2*)op;
 708 
 709       // On x86 tan/sin/cos need two temporary fpu stack slots and
 710       // log/log10 need one so handle opr2 and tmp as temp inputs.
 711       // Register input operand as temp to guarantee that it doesn't
 712       // overlap with the input.
 713       assert(op2->_info == NULL, "not used");




 714       assert(op2->_opr1->is_valid(), "used");
 715       do_input(op2->_opr1); do_temp(op2->_opr1);
 716 
 717       if (op2->_opr2->is_valid())         do_temp(op2->_opr2);
 718       if (op2->_tmp->is_valid())          do_temp(op2->_tmp);



 719       if (op2->_result->is_valid())       do_output(op2->_result);
 720 
 721       break;
 722     }
 723 
























 724 
 725 // LIR_Op3
 726     case lir_idiv:
 727     case lir_irem: {
 728       assert(op->as_Op3() != NULL, "must be");
 729       LIR_Op3* op3= (LIR_Op3*)op;
 730 
 731       if (op3->_info)                     do_info(op3->_info);
 732       if (op3->_opr1->is_valid())         do_input(op3->_opr1);
 733 
 734       // second operand is input and temp, so ensure that second operand
 735       // and third operand get not the same register
 736       if (op3->_opr2->is_valid())         do_input(op3->_opr2);
 737       if (op3->_opr2->is_valid())         do_temp(op3->_opr2);
 738       if (op3->_opr3->is_valid())         do_temp(op3->_opr3);
 739 
 740       if (op3->_result->is_valid())       do_output(op3->_result);
 741 
 742       break;
 743     }


1653      // LIR_Op2
1654      case lir_cmp:                   s = "cmp";           break;
1655      case lir_cmp_l2i:               s = "cmp_l2i";       break;
1656      case lir_ucmp_fd2i:             s = "ucomp_fd2i";    break;
1657      case lir_cmp_fd2i:              s = "comp_fd2i";     break;
1658      case lir_cmove:                 s = "cmove";         break;
1659      case lir_add:                   s = "add";           break;
1660      case lir_sub:                   s = "sub";           break;
1661      case lir_mul:                   s = "mul";           break;
1662      case lir_mul_strictfp:          s = "mul_strictfp";  break;
1663      case lir_div:                   s = "div";           break;
1664      case lir_div_strictfp:          s = "div_strictfp";  break;
1665      case lir_rem:                   s = "rem";           break;
1666      case lir_abs:                   s = "abs";           break;
1667      case lir_sqrt:                  s = "sqrt";          break;
1668      case lir_sin:                   s = "sin";           break;
1669      case lir_cos:                   s = "cos";           break;
1670      case lir_tan:                   s = "tan";           break;
1671      case lir_log:                   s = "log";           break;
1672      case lir_log10:                 s = "log10";         break;


1673      case lir_logic_and:             s = "logic_and";     break;
1674      case lir_logic_or:              s = "logic_or";      break;
1675      case lir_logic_xor:             s = "logic_xor";     break;
1676      case lir_shl:                   s = "shift_left";    break;
1677      case lir_shr:                   s = "shift_right";   break;
1678      case lir_ushr:                  s = "ushift_right";  break;
1679      case lir_alloc_array:           s = "alloc_array";   break;
1680      // LIR_Op3
1681      case lir_idiv:                  s = "idiv";          break;
1682      case lir_irem:                  s = "irem";          break;
1683      // LIR_OpJavaCall
1684      case lir_static_call:           s = "static";        break;
1685      case lir_optvirtual_call:       s = "optvirtual";    break;
1686      case lir_icvirtual_call:        s = "icvirtual";     break;
1687      case lir_virtual_call:          s = "virtual";       break;
1688      case lir_dynamic_call:          s = "dynamic";       break;
1689      // LIR_OpArrayCopy
1690      case lir_arraycopy:             s = "arraycopy";     break;
1691      // LIR_OpLock
1692      case lir_lock:                  s = "lock";          break;


1875   tmp3()->print(out);                       out->print(" ");
1876   tmp4()->print(out);                       out->print(" ");
1877   out->print("[hdr:%d]", header_size()); out->print(" ");
1878   out->print("[obj:%d]", object_size()); out->print(" ");
1879   out->print("[lbl:0x%x]", stub()->entry());
1880 }
1881 
1882 void LIR_OpRoundFP::print_instr(outputStream* out) const {
1883   _opr->print(out);         out->print(" ");
1884   tmp()->print(out);        out->print(" ");
1885   result_opr()->print(out); out->print(" ");
1886 }
1887 
1888 // LIR_Op2
1889 void LIR_Op2::print_instr(outputStream* out) const {
1890   if (code() == lir_cmove) {
1891     print_condition(out, condition());         out->print(" ");
1892   }
1893   in_opr1()->print(out);    out->print(" ");
1894   in_opr2()->print(out);    out->print(" ");
1895   if (tmp_opr()->is_valid()) { tmp_opr()->print(out);    out->print(" "); }




1896   result_opr()->print(out);
1897 }
1898 
1899 void LIR_OpAllocArray::print_instr(outputStream* out) const {
1900   klass()->print(out);                   out->print(" ");
1901   len()->print(out);                     out->print(" ");
1902   obj()->print(out);                     out->print(" ");
1903   tmp1()->print(out);                    out->print(" ");
1904   tmp2()->print(out);                    out->print(" ");
1905   tmp3()->print(out);                    out->print(" ");
1906   tmp4()->print(out);                    out->print(" ");
1907   out->print("[type:0x%x]", type());     out->print(" ");
1908   out->print("[label:0x%x]", stub()->entry());
1909 }
1910 
1911 
1912 void LIR_OpTypeCheck::print_instr(outputStream* out) const {
1913   object()->print(out);                  out->print(" ");
1914   if (code() == lir_store_check) {
1915     array()->print(out);                 out->print(" ");




 607     case lir_cmp:
 608     case lir_cmp_l2i:
 609     case lir_ucmp_fd2i:
 610     case lir_cmp_fd2i:
 611     case lir_add:
 612     case lir_sub:
 613     case lir_mul:
 614     case lir_div:
 615     case lir_rem:
 616     case lir_sqrt:
 617     case lir_abs:
 618     case lir_logic_and:
 619     case lir_logic_or:
 620     case lir_logic_xor:
 621     case lir_shl:
 622     case lir_shr:
 623     case lir_ushr:
 624     {
 625       assert(op->as_Op2() != NULL, "must be");
 626       LIR_Op2* op2 = (LIR_Op2*)op;
 627       assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
 628              op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 629 
 630       if (op2->_info)                     do_info(op2->_info);
 631       if (op2->_opr1->is_valid())         do_input(op2->_opr1);
 632       if (op2->_opr2->is_valid())         do_input(op2->_opr2);
 633       if (op2->_tmp1->is_valid())         do_temp(op2->_tmp1);
 634       if (op2->_result->is_valid())       do_output(op2->_result);
 635 
 636       break;
 637     }
 638 
 639     // special handling for cmove: right input operand must not be equal
 640     // to the result operand, otherwise the backend fails
 641     case lir_cmove:
 642     {
 643       assert(op->as_Op2() != NULL, "must be");
 644       LIR_Op2* op2 = (LIR_Op2*)op;
 645 
 646       assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() &&
 647              op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 648       assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used");
 649 
 650       do_input(op2->_opr1);
 651       do_input(op2->_opr2);
 652       do_temp(op2->_opr2);
 653       do_output(op2->_result);
 654 
 655       break;
 656     }
 657 
 658     // vspecial handling for strict operations: register input operands
 659     // as temp to guarantee that they do not overlap with other
 660     // registers
 661     case lir_mul_strictfp:
 662     case lir_div_strictfp:
 663     {
 664       assert(op->as_Op2() != NULL, "must be");
 665       LIR_Op2* op2 = (LIR_Op2*)op;
 666 
 667       assert(op2->_info == NULL, "not used");
 668       assert(op2->_opr1->is_valid(), "used");
 669       assert(op2->_opr2->is_valid(), "used");
 670       assert(op2->_result->is_valid(), "used");
 671       assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
 672              op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 673 
 674       do_input(op2->_opr1); do_temp(op2->_opr1);
 675       do_input(op2->_opr2); do_temp(op2->_opr2);
 676       if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
 677       do_output(op2->_result);
 678 
 679       break;
 680     }
 681 
 682     case lir_throw: {
 683       assert(op->as_Op2() != NULL, "must be");
 684       LIR_Op2* op2 = (LIR_Op2*)op;
 685 
 686       if (op2->_info)                     do_info(op2->_info);
 687       if (op2->_opr1->is_valid())         do_temp(op2->_opr1);
 688       if (op2->_opr2->is_valid())         do_input(op2->_opr2); // exception object is input parameter
 689       assert(op2->_result->is_illegal(), "no result");
 690       assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
 691              op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 692 
 693       break;
 694     }
 695 
 696     case lir_unwind: {
 697       assert(op->as_Op1() != NULL, "must be");
 698       LIR_Op1* op1 = (LIR_Op1*)op;
 699 
 700       assert(op1->_info == NULL, "no info");
 701       assert(op1->_opr->is_valid(), "exception oop");         do_input(op1->_opr);
 702       assert(op1->_result->is_illegal(), "no result");
 703 
 704       break;
 705     }
 706 
 707 
 708     case lir_tan:
 709     case lir_sin:
 710     case lir_cos:
 711     case lir_log:
 712     case lir_log10:
 713     case lir_exp: {
 714       assert(op->as_Op2() != NULL, "must be");
 715       LIR_Op2* op2 = (LIR_Op2*)op;
 716 
 717       // On x86 tan/sin/cos need two temporary fpu stack slots and
 718       // log/log10 need one so handle opr2 and tmp as temp inputs.
 719       // Register input operand as temp to guarantee that it doesn't
 720       // overlap with the input.
 721       assert(op2->_info == NULL, "not used");
 722       assert(op2->_tmp5->is_illegal(), "not used");
 723       assert(op2->_tmp2->is_valid() == (op->code() == lir_exp), "not used");
 724       assert(op2->_tmp3->is_valid() == (op->code() == lir_exp), "not used");
 725       assert(op2->_tmp4->is_valid() == (op->code() == lir_exp), "not used");
 726       assert(op2->_opr1->is_valid(), "used");
 727       do_input(op2->_opr1); do_temp(op2->_opr1);
 728 
 729       if (op2->_opr2->is_valid())         do_temp(op2->_opr2);
 730       if (op2->_tmp1->is_valid())         do_temp(op2->_tmp1);
 731       if (op2->_tmp2->is_valid())         do_temp(op2->_tmp2);
 732       if (op2->_tmp3->is_valid())         do_temp(op2->_tmp3);
 733       if (op2->_tmp4->is_valid())         do_temp(op2->_tmp4);
 734       if (op2->_result->is_valid())       do_output(op2->_result);
 735 
 736       break;
 737     }
 738 
 739     case lir_pow: {
 740       assert(op->as_Op2() != NULL, "must be");
 741       LIR_Op2* op2 = (LIR_Op2*)op;
 742 
 743       // On x86 pow needs two temporary fpu stack slots: tmp1 and
 744       // tmp2. Register input operands as temps to guarantee that it
 745       // doesn't overlap with the temporary slots.
 746       assert(op2->_info == NULL, "not used");
 747       assert(op2->_opr1->is_valid() && op2->_opr2->is_valid(), "used");
 748       assert(op2->_tmp1->is_valid() && op2->_tmp2->is_valid() && op2->_tmp3->is_valid()
 749              && op2->_tmp4->is_valid() && op2->_tmp5->is_valid(), "used");
 750       assert(op2->_result->is_valid(), "used");
 751 
 752       do_input(op2->_opr1); do_temp(op2->_opr1);
 753       do_input(op2->_opr2); do_temp(op2->_opr2);
 754       do_temp(op2->_tmp1);
 755       do_temp(op2->_tmp2);
 756       do_temp(op2->_tmp3);
 757       do_temp(op2->_tmp4);
 758       do_temp(op2->_tmp5);
 759       do_output(op2->_result);
 760 
 761       break;
 762     }
 763 
 764 // LIR_Op3
 765     case lir_idiv:
 766     case lir_irem: {
 767       assert(op->as_Op3() != NULL, "must be");
 768       LIR_Op3* op3= (LIR_Op3*)op;
 769 
 770       if (op3->_info)                     do_info(op3->_info);
 771       if (op3->_opr1->is_valid())         do_input(op3->_opr1);
 772 
 773       // second operand is input and temp, so ensure that second operand
 774       // and third operand get not the same register
 775       if (op3->_opr2->is_valid())         do_input(op3->_opr2);
 776       if (op3->_opr2->is_valid())         do_temp(op3->_opr2);
 777       if (op3->_opr3->is_valid())         do_temp(op3->_opr3);
 778 
 779       if (op3->_result->is_valid())       do_output(op3->_result);
 780 
 781       break;
 782     }


1692      // LIR_Op2
1693      case lir_cmp:                   s = "cmp";           break;
1694      case lir_cmp_l2i:               s = "cmp_l2i";       break;
1695      case lir_ucmp_fd2i:             s = "ucomp_fd2i";    break;
1696      case lir_cmp_fd2i:              s = "comp_fd2i";     break;
1697      case lir_cmove:                 s = "cmove";         break;
1698      case lir_add:                   s = "add";           break;
1699      case lir_sub:                   s = "sub";           break;
1700      case lir_mul:                   s = "mul";           break;
1701      case lir_mul_strictfp:          s = "mul_strictfp";  break;
1702      case lir_div:                   s = "div";           break;
1703      case lir_div_strictfp:          s = "div_strictfp";  break;
1704      case lir_rem:                   s = "rem";           break;
1705      case lir_abs:                   s = "abs";           break;
1706      case lir_sqrt:                  s = "sqrt";          break;
1707      case lir_sin:                   s = "sin";           break;
1708      case lir_cos:                   s = "cos";           break;
1709      case lir_tan:                   s = "tan";           break;
1710      case lir_log:                   s = "log";           break;
1711      case lir_log10:                 s = "log10";         break;
1712      case lir_exp:                   s = "exp";           break;
1713      case lir_pow:                   s = "pow";           break;
1714      case lir_logic_and:             s = "logic_and";     break;
1715      case lir_logic_or:              s = "logic_or";      break;
1716      case lir_logic_xor:             s = "logic_xor";     break;
1717      case lir_shl:                   s = "shift_left";    break;
1718      case lir_shr:                   s = "shift_right";   break;
1719      case lir_ushr:                  s = "ushift_right";  break;
1720      case lir_alloc_array:           s = "alloc_array";   break;
1721      // LIR_Op3
1722      case lir_idiv:                  s = "idiv";          break;
1723      case lir_irem:                  s = "irem";          break;
1724      // LIR_OpJavaCall
1725      case lir_static_call:           s = "static";        break;
1726      case lir_optvirtual_call:       s = "optvirtual";    break;
1727      case lir_icvirtual_call:        s = "icvirtual";     break;
1728      case lir_virtual_call:          s = "virtual";       break;
1729      case lir_dynamic_call:          s = "dynamic";       break;
1730      // LIR_OpArrayCopy
1731      case lir_arraycopy:             s = "arraycopy";     break;
1732      // LIR_OpLock
1733      case lir_lock:                  s = "lock";          break;


1916   tmp3()->print(out);                       out->print(" ");
1917   tmp4()->print(out);                       out->print(" ");
1918   out->print("[hdr:%d]", header_size()); out->print(" ");
1919   out->print("[obj:%d]", object_size()); out->print(" ");
1920   out->print("[lbl:0x%x]", stub()->entry());
1921 }
1922 
1923 void LIR_OpRoundFP::print_instr(outputStream* out) const {
1924   _opr->print(out);         out->print(" ");
1925   tmp()->print(out);        out->print(" ");
1926   result_opr()->print(out); out->print(" ");
1927 }
1928 
1929 // LIR_Op2
1930 void LIR_Op2::print_instr(outputStream* out) const {
1931   if (code() == lir_cmove) {
1932     print_condition(out, condition());         out->print(" ");
1933   }
1934   in_opr1()->print(out);    out->print(" ");
1935   in_opr2()->print(out);    out->print(" ");
1936   if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out);    out->print(" "); }
1937   if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out);    out->print(" "); }
1938   if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out);    out->print(" "); }
1939   if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out);    out->print(" "); }
1940   if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out);    out->print(" "); }
1941   result_opr()->print(out);
1942 }
1943 
1944 void LIR_OpAllocArray::print_instr(outputStream* out) const {
1945   klass()->print(out);                   out->print(" ");
1946   len()->print(out);                     out->print(" ");
1947   obj()->print(out);                     out->print(" ");
1948   tmp1()->print(out);                    out->print(" ");
1949   tmp2()->print(out);                    out->print(" ");
1950   tmp3()->print(out);                    out->print(" ");
1951   tmp4()->print(out);                    out->print(" ");
1952   out->print("[type:0x%x]", type());     out->print(" ");
1953   out->print("[label:0x%x]", stub()->entry());
1954 }
1955 
1956 
1957 void LIR_OpTypeCheck::print_instr(outputStream* out) const {
1958   object()->print(out);                  out->print(" ");
1959   if (code() == lir_store_check) {
1960     array()->print(out);                 out->print(" ");