1 /*
2 * Copyright (c) 1999, 2012, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_CodeStubs.hpp"
27 #include "c1/c1_FrameMap.hpp"
28 #include "c1/c1_LIRAssembler.hpp"
29 #include "c1/c1_MacroAssembler.hpp"
30 #include "c1/c1_Runtime1.hpp"
31 #include "nativeInst_x86.hpp"
32 #include "runtime/sharedRuntime.hpp"
33 #include "utilities/macros.hpp"
34 #include "vmreg_x86.inline.hpp"
35 #if INCLUDE_ALL_GCS
36 #include "gc_implementation/g1/g1SATBCardTableModRefBS.hpp"
37 #endif // INCLUDE_ALL_GCS
38
39
40 #define __ ce->masm()->
41
42 float ConversionStub::float_zero = 0.0;
43 double ConversionStub::double_zero = 0.0;
44
45 void ConversionStub::emit_code(LIR_Assembler* ce) {
46 __ bind(_entry);
47 assert(bytecode() == Bytecodes::_f2i || bytecode() == Bytecodes::_d2i, "other conversions do not require stub");
48
49
50 if (input()->is_single_xmm()) {
51 __ comiss(input()->as_xmm_float_reg(),
52 ExternalAddress((address)&float_zero));
53 } else if (input()->is_double_xmm()) {
54 __ comisd(input()->as_xmm_double_reg(),
55 ExternalAddress((address)&double_zero));
56 } else {
57 LP64_ONLY(ShouldNotReachHere());
58 __ push(rax);
59 __ ftst();
60 __ fnstsw_ax();
61 __ sahf();
62 __ pop(rax);
63 }
64
65 Label NaN, do_return;
66 __ jccb(Assembler::parity, NaN);
67 __ jccb(Assembler::below, do_return);
68
69 // input is > 0 -> return maxInt
70 // result register already contains 0x80000000, so subtracting 1 gives 0x7fffffff
71 __ decrement(result()->as_register());
72 __ jmpb(do_return);
73
74 // input is NaN -> return 0
75 __ bind(NaN);
76 __ xorptr(result()->as_register(), result()->as_register());
77
78 __ bind(do_return);
79 __ jmp(_continuation);
80 }
81
82 void CounterOverflowStub::emit_code(LIR_Assembler* ce) {
83 __ bind(_entry);
84 ce->store_parameter(_method->as_register(), 1);
85 ce->store_parameter(_bci, 0);
86 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::counter_overflow_id)));
87 ce->add_call_info_here(_info);
88 ce->verify_oop_map(_info);
89 __ jmp(_continuation);
90 }
91
92 RangeCheckStub::RangeCheckStub(CodeEmitInfo* info, LIR_Opr index,
93 bool throw_index_out_of_bounds_exception)
94 : _throw_index_out_of_bounds_exception(throw_index_out_of_bounds_exception)
95 , _index(index)
96 {
97 assert(info != NULL, "must have info");
98 _info = new CodeEmitInfo(info);
99 }
100
101
102 void RangeCheckStub::emit_code(LIR_Assembler* ce) {
103 __ bind(_entry);
104 // pass the array index on stack because all registers must be preserved
105 if (_index->is_cpu_register()) {
106 ce->store_parameter(_index->as_register(), 0);
107 } else {
108 ce->store_parameter(_index->as_jint(), 0);
109 }
110 Runtime1::StubID stub_id;
111 if (_throw_index_out_of_bounds_exception) {
112 stub_id = Runtime1::throw_index_exception_id;
113 } else {
114 stub_id = Runtime1::throw_range_check_failed_id;
115 }
116 __ call(RuntimeAddress(Runtime1::entry_for(stub_id)));
117 ce->add_call_info_here(_info);
118 debug_only(__ should_not_reach_here());
119 }
120
121
122 void DivByZeroStub::emit_code(LIR_Assembler* ce) {
123 if (_offset != -1) {
124 ce->compilation()->implicit_exception_table()->append(_offset, __ offset());
125 }
126 __ bind(_entry);
127 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::throw_div0_exception_id)));
128 ce->add_call_info_here(_info);
129 debug_only(__ should_not_reach_here());
130 }
131
132
133 // Implementation of NewInstanceStub
134
135 NewInstanceStub::NewInstanceStub(LIR_Opr klass_reg, LIR_Opr result, ciInstanceKlass* klass, CodeEmitInfo* info, Runtime1::StubID stub_id) {
136 _result = result;
137 _klass = klass;
138 _klass_reg = klass_reg;
139 _info = new CodeEmitInfo(info);
140 assert(stub_id == Runtime1::new_instance_id ||
141 stub_id == Runtime1::fast_new_instance_id ||
142 stub_id == Runtime1::fast_new_instance_init_check_id,
143 "need new_instance id");
144 _stub_id = stub_id;
145 }
146
147
148 void NewInstanceStub::emit_code(LIR_Assembler* ce) {
149 assert(__ rsp_offset() == 0, "frame size should be fixed");
150 __ bind(_entry);
151 __ movptr(rdx, _klass_reg->as_register());
152 __ call(RuntimeAddress(Runtime1::entry_for(_stub_id)));
153 ce->add_call_info_here(_info);
154 ce->verify_oop_map(_info);
155 assert(_result->as_register() == rax, "result must in rax,");
156 __ jmp(_continuation);
157 }
158
159
160 // Implementation of NewTypeArrayStub
161
162 NewTypeArrayStub::NewTypeArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) {
163 _klass_reg = klass_reg;
164 _length = length;
165 _result = result;
166 _info = new CodeEmitInfo(info);
167 }
168
169
170 void NewTypeArrayStub::emit_code(LIR_Assembler* ce) {
171 assert(__ rsp_offset() == 0, "frame size should be fixed");
172 __ bind(_entry);
173 assert(_length->as_register() == rbx, "length must in rbx,");
174 assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx");
175 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_type_array_id)));
176 ce->add_call_info_here(_info);
177 ce->verify_oop_map(_info);
178 assert(_result->as_register() == rax, "result must in rax,");
179 __ jmp(_continuation);
180 }
181
182
183 // Implementation of NewObjectArrayStub
184
185 NewObjectArrayStub::NewObjectArrayStub(LIR_Opr klass_reg, LIR_Opr length, LIR_Opr result, CodeEmitInfo* info) {
186 _klass_reg = klass_reg;
187 _result = result;
188 _length = length;
189 _info = new CodeEmitInfo(info);
190 }
191
192
193 void NewObjectArrayStub::emit_code(LIR_Assembler* ce) {
194 assert(__ rsp_offset() == 0, "frame size should be fixed");
195 __ bind(_entry);
196 assert(_length->as_register() == rbx, "length must in rbx,");
197 assert(_klass_reg->as_register() == rdx, "klass_reg must in rdx");
198 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::new_object_array_id)));
199 ce->add_call_info_here(_info);
200 ce->verify_oop_map(_info);
201 assert(_result->as_register() == rax, "result must in rax,");
202 __ jmp(_continuation);
203 }
204
205
206 // Implementation of MonitorAccessStubs
207
208 MonitorEnterStub::MonitorEnterStub(LIR_Opr obj_reg, LIR_Opr lock_reg, CodeEmitInfo* info)
209 : MonitorAccessStub(obj_reg, lock_reg)
210 {
211 _info = new CodeEmitInfo(info);
212 }
213
214
215 void MonitorEnterStub::emit_code(LIR_Assembler* ce) {
216 assert(__ rsp_offset() == 0, "frame size should be fixed");
217 __ bind(_entry);
218 ce->store_parameter(_obj_reg->as_register(), 1);
219 ce->store_parameter(_lock_reg->as_register(), 0);
220 Runtime1::StubID enter_id;
221 if (ce->compilation()->has_fpu_code()) {
222 enter_id = Runtime1::monitorenter_id;
223 } else {
224 enter_id = Runtime1::monitorenter_nofpu_id;
225 }
226 __ call(RuntimeAddress(Runtime1::entry_for(enter_id)));
227 ce->add_call_info_here(_info);
228 ce->verify_oop_map(_info);
229 __ jmp(_continuation);
230 }
231
232
233 void MonitorExitStub::emit_code(LIR_Assembler* ce) {
234 __ bind(_entry);
235 if (_compute_lock) {
236 // lock_reg was destroyed by fast unlocking attempt => recompute it
237 ce->monitor_address(_monitor_ix, _lock_reg);
238 }
239 ce->store_parameter(_lock_reg->as_register(), 0);
240 // note: non-blocking leaf routine => no call info needed
241 Runtime1::StubID exit_id;
242 if (ce->compilation()->has_fpu_code()) {
243 exit_id = Runtime1::monitorexit_id;
244 } else {
245 exit_id = Runtime1::monitorexit_nofpu_id;
246 }
247 __ call(RuntimeAddress(Runtime1::entry_for(exit_id)));
248 __ jmp(_continuation);
249 }
250
251
252 // Implementation of patching:
253 // - Copy the code at given offset to an inlined buffer (first the bytes, then the number of bytes)
254 // - Replace original code with a call to the stub
255 // At Runtime:
256 // - call to stub, jump to runtime
257 // - in runtime: preserve all registers (rspecially objects, i.e., source and destination object)
258 // - in runtime: after initializing class, restore original code, reexecute instruction
259
260 int PatchingStub::_patch_info_offset = -NativeGeneralJump::instruction_size;
261
262 void PatchingStub::align_patch_site(MacroAssembler* masm) {
263 // We're patching a 5-7 byte instruction on intel and we need to
264 // make sure that we don't see a piece of the instruction. It
265 // appears mostly impossible on Intel to simply invalidate other
266 // processors caches and since they may do aggressive prefetch it's
267 // very hard to make a guess about what code might be in the icache.
268 // Force the instruction to be double word aligned so that it
269 // doesn't span a cache line.
270 masm->align(round_to(NativeGeneralJump::instruction_size, wordSize));
271 }
272
273 void PatchingStub::emit_code(LIR_Assembler* ce) {
274 assert(NativeCall::instruction_size <= _bytes_to_copy && _bytes_to_copy <= 0xFF, "not enough room for call");
275
276 Label call_patch;
277
278 // static field accesses have special semantics while the class
279 // initializer is being run so we emit a test which can be used to
280 // check that this code is being executed by the initializing
281 // thread.
282 address being_initialized_entry = __ pc();
283 if (CommentedAssembly) {
284 __ block_comment(" patch template");
285 }
286 if (_id == load_klass_id) {
287 // produce a copy of the load klass instruction for use by the being initialized case
288 #ifdef ASSERT
289 address start = __ pc();
290 #endif
291 Metadata* o = NULL;
292 __ mov_metadata(_obj, o);
293 #ifdef ASSERT
294 for (int i = 0; i < _bytes_to_copy; i++) {
295 address ptr = (address)(_pc_start + i);
296 int a_byte = (*ptr) & 0xFF;
297 assert(a_byte == *start++, "should be the same code");
298 }
299 #endif
300 } else if (_id == load_mirror_id) {
301 // produce a copy of the load mirror instruction for use by the being
302 // initialized case
303 #ifdef ASSERT
304 address start = __ pc();
305 #endif
306 jobject o = NULL;
307 __ movoop(_obj, o);
308 #ifdef ASSERT
309 for (int i = 0; i < _bytes_to_copy; i++) {
310 address ptr = (address)(_pc_start + i);
311 int a_byte = (*ptr) & 0xFF;
312 assert(a_byte == *start++, "should be the same code");
313 }
314 #endif
315 } else {
316 // make a copy the code which is going to be patched.
317 for (int i = 0; i < _bytes_to_copy; i++) {
318 address ptr = (address)(_pc_start + i);
319 int a_byte = (*ptr) & 0xFF;
320 __ emit_int8(a_byte);
321 *ptr = 0x90; // make the site look like a nop
322 }
323 }
324
325 address end_of_patch = __ pc();
326 int bytes_to_skip = 0;
327 if (_id == load_mirror_id) {
328 int offset = __ offset();
329 if (CommentedAssembly) {
330 __ block_comment(" being_initialized check");
331 }
332 assert(_obj != noreg, "must be a valid register");
333 Register tmp = rax;
334 Register tmp2 = rbx;
335 __ push(tmp);
336 __ push(tmp2);
337 // Load without verification to keep code size small. We need it because
338 // begin_initialized_entry_offset has to fit in a byte. Also, we know it's not null.
339 __ movptr(tmp2, Address(_obj, java_lang_Class::klass_offset_in_bytes()));
340 __ get_thread(tmp);
341 __ cmpptr(tmp, Address(tmp2, InstanceKlass::init_thread_offset()));
342 __ pop(tmp2);
343 __ pop(tmp);
344 __ jcc(Assembler::notEqual, call_patch);
345
346 // access_field patches may execute the patched code before it's
347 // copied back into place so we need to jump back into the main
348 // code of the nmethod to continue execution.
349 __ jmp(_patch_site_continuation);
350
351 // make sure this extra code gets skipped
352 bytes_to_skip += __ offset() - offset;
353 }
354 if (CommentedAssembly) {
355 __ block_comment("patch data encoded as movl");
356 }
357 // Now emit the patch record telling the runtime how to find the
358 // pieces of the patch. We only need 3 bytes but for readability of
359 // the disassembly we make the data look like a movl reg, imm32,
360 // which requires 5 bytes
361 int sizeof_patch_record = 5;
362 bytes_to_skip += sizeof_patch_record;
363
364 // emit the offsets needed to find the code to patch
365 int being_initialized_entry_offset = __ pc() - being_initialized_entry + sizeof_patch_record;
366
367 __ emit_int8((unsigned char)0xB8);
368 __ emit_int8(0);
369 __ emit_int8(being_initialized_entry_offset);
370 __ emit_int8(bytes_to_skip);
371 __ emit_int8(_bytes_to_copy);
372 address patch_info_pc = __ pc();
373 assert(patch_info_pc - end_of_patch == bytes_to_skip, "incorrect patch info");
374
375 address entry = __ pc();
376 NativeGeneralJump::insert_unconditional((address)_pc_start, entry);
377 address target = NULL;
378 relocInfo::relocType reloc_type = relocInfo::none;
379 switch (_id) {
380 case access_field_id: target = Runtime1::entry_for(Runtime1::access_field_patching_id); break;
381 case load_klass_id: target = Runtime1::entry_for(Runtime1::load_klass_patching_id); reloc_type = relocInfo::metadata_type; break;
382 case load_mirror_id: target = Runtime1::entry_for(Runtime1::load_mirror_patching_id); reloc_type = relocInfo::oop_type; break;
383 default: ShouldNotReachHere();
384 }
385 __ bind(call_patch);
386
387 if (CommentedAssembly) {
388 __ block_comment("patch entry point");
389 }
390 __ call(RuntimeAddress(target));
391 assert(_patch_info_offset == (patch_info_pc - __ pc()), "must not change");
392 ce->add_call_info_here(_info);
393 int jmp_off = __ offset();
394 __ jmp(_patch_site_entry);
395 // Add enough nops so deoptimization can overwrite the jmp above with a call
396 // and not destroy the world.
397 for (int j = __ offset() ; j < jmp_off + 5 ; j++ ) {
398 __ nop();
399 }
400 if (_id == load_klass_id || _id == load_mirror_id) {
401 CodeSection* cs = __ code_section();
402 RelocIterator iter(cs, (address)_pc_start, (address)(_pc_start + 1));
403 relocInfo::change_reloc_info_for_address(&iter, (address) _pc_start, reloc_type, relocInfo::none);
404 }
405 }
406
407
408 void DeoptimizeStub::emit_code(LIR_Assembler* ce) {
409 __ bind(_entry);
410 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::deoptimize_id)));
411 ce->add_call_info_here(_info);
412 DEBUG_ONLY(__ should_not_reach_here());
413 }
414
415
416 void ImplicitNullCheckStub::emit_code(LIR_Assembler* ce) {
417 ce->compilation()->implicit_exception_table()->append(_offset, __ offset());
418 __ bind(_entry);
419 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::throw_null_pointer_exception_id)));
420 ce->add_call_info_here(_info);
421 debug_only(__ should_not_reach_here());
422 }
423
424
425 void SimpleExceptionStub::emit_code(LIR_Assembler* ce) {
426 assert(__ rsp_offset() == 0, "frame size should be fixed");
427
428 __ bind(_entry);
429 // pass the object on stack because all registers must be preserved
430 if (_obj->is_cpu_register()) {
431 ce->store_parameter(_obj->as_register(), 0);
432 }
433 __ call(RuntimeAddress(Runtime1::entry_for(_stub)));
434 ce->add_call_info_here(_info);
435 debug_only(__ should_not_reach_here());
436 }
437
438
439 void ArrayCopyStub::emit_code(LIR_Assembler* ce) {
440 //---------------slow case: call to native-----------------
441 __ bind(_entry);
442 // Figure out where the args should go
443 // This should really convert the IntrinsicID to the Method* and signature
444 // but I don't know how to do that.
445 //
446 VMRegPair args[5];
447 BasicType signature[5] = { T_OBJECT, T_INT, T_OBJECT, T_INT, T_INT};
448 SharedRuntime::java_calling_convention(signature, args, 5, true);
449
450 // push parameters
451 // (src, src_pos, dest, destPos, length)
452 Register r[5];
453 r[0] = src()->as_register();
454 r[1] = src_pos()->as_register();
455 r[2] = dst()->as_register();
456 r[3] = dst_pos()->as_register();
457 r[4] = length()->as_register();
458
459 // next registers will get stored on the stack
460 for (int i = 0; i < 5 ; i++ ) {
461 VMReg r_1 = args[i].first();
462 if (r_1->is_stack()) {
463 int st_off = r_1->reg2stack() * wordSize;
464 __ movptr (Address(rsp, st_off), r[i]);
465 } else {
466 assert(r[i] == args[i].first()->as_Register(), "Wrong register for arg ");
467 }
468 }
469
470 ce->align_call(lir_static_call);
471
472 ce->emit_static_call_stub();
473 AddressLiteral resolve(SharedRuntime::get_resolve_static_call_stub(),
474 relocInfo::static_call_type);
475 __ call(resolve);
476 ce->add_call_info_here(info());
477
478 #ifndef PRODUCT
479 __ incrementl(ExternalAddress((address)&Runtime1::_arraycopy_slowcase_cnt));
480 #endif
481
482 __ jmp(_continuation);
483 }
484
485 /////////////////////////////////////////////////////////////////////////////
486 #if INCLUDE_ALL_GCS
487
488 void G1PreBarrierStub::emit_code(LIR_Assembler* ce) {
489 // At this point we know that marking is in progress.
490 // If do_load() is true then we have to emit the
491 // load of the previous value; otherwise it has already
492 // been loaded into _pre_val.
493
494 __ bind(_entry);
495 assert(pre_val()->is_register(), "Precondition.");
496
497 Register pre_val_reg = pre_val()->as_register();
498
499 if (do_load()) {
500 ce->mem2reg(addr(), pre_val(), T_OBJECT, patch_code(), info(), false /*wide*/, false /*unaligned*/);
501 }
502
503 __ cmpptr(pre_val_reg, (int32_t) NULL_WORD);
504 __ jcc(Assembler::equal, _continuation);
505 ce->store_parameter(pre_val()->as_register(), 0);
506 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_pre_barrier_slow_id)));
507 __ jmp(_continuation);
508
509 }
510
511 jbyte* G1PostBarrierStub::_byte_map_base = NULL;
512
513 jbyte* G1PostBarrierStub::byte_map_base_slow() {
514 BarrierSet* bs = Universe::heap()->barrier_set();
515 assert(bs->is_a(BarrierSet::G1SATBCTLogging),
516 "Must be if we're using this.");
517 return ((G1SATBCardTableModRefBS*)bs)->byte_map_base;
518 }
519
520 void G1PostBarrierStub::emit_code(LIR_Assembler* ce) {
521 __ bind(_entry);
522 assert(addr()->is_register(), "Precondition.");
523 assert(new_val()->is_register(), "Precondition.");
524 Register new_val_reg = new_val()->as_register();
525 __ cmpptr(new_val_reg, (int32_t) NULL_WORD);
526 __ jcc(Assembler::equal, _continuation);
527 ce->store_parameter(addr()->as_pointer_register(), 0);
528 __ call(RuntimeAddress(Runtime1::entry_for(Runtime1::g1_post_barrier_slow_id)));
529 __ jmp(_continuation);
530 }
531
532 #endif // INCLUDE_ALL_GCS
533 /////////////////////////////////////////////////////////////////////////////
534
535 #undef __