src/cpu/x86/vm/c1_LIRAssembler_x86.cpp

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rev 4136 : 7153771: array bound check elimination for c1
Summary: when possible optimize out array bound checks, inserting predicates when needed.
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3739       __ fistp_d(as_Address(dest->as_address_ptr()));
3740     } else {
3741       ShouldNotReachHere();
3742     }
3743 
3744   } else if (dest->is_double_fpu()) {
3745     assert(dest->fpu_regnrLo() == 0, "must be TOS");
3746     if (src->is_double_stack()) {
3747       __ fild_d(frame_map()->address_for_slot(src->double_stack_ix()));
3748     } else if (src->is_address()) {
3749       __ fild_d(as_Address(src->as_address_ptr()));
3750     } else {
3751       ShouldNotReachHere();
3752     }
3753   } else {
3754     ShouldNotReachHere();
3755   }
3756 }
3757 
3758 









































3759 void LIR_Assembler::membar() {
3760   // QQQ sparc TSO uses this,
3761   __ membar( Assembler::Membar_mask_bits(Assembler::StoreLoad));
3762 }
3763 
3764 void LIR_Assembler::membar_acquire() {
3765   // No x86 machines currently require load fences
3766   // __ load_fence();
3767 }
3768 
3769 void LIR_Assembler::membar_release() {
3770   // No x86 machines currently require store fences
3771   // __ store_fence();
3772 }
3773 
3774 void LIR_Assembler::membar_loadload() {
3775   // no-op
3776   //__ membar(Assembler::Membar_mask_bits(Assembler::loadload));
3777 }
3778 




3739       __ fistp_d(as_Address(dest->as_address_ptr()));
3740     } else {
3741       ShouldNotReachHere();
3742     }
3743 
3744   } else if (dest->is_double_fpu()) {
3745     assert(dest->fpu_regnrLo() == 0, "must be TOS");
3746     if (src->is_double_stack()) {
3747       __ fild_d(frame_map()->address_for_slot(src->double_stack_ix()));
3748     } else if (src->is_address()) {
3749       __ fild_d(as_Address(src->as_address_ptr()));
3750     } else {
3751       ShouldNotReachHere();
3752     }
3753   } else {
3754     ShouldNotReachHere();
3755   }
3756 }
3757 
3758 
3759 #ifndef PRODUCT
3760 
3761 // emit run-time assertion
3762 void LIR_Assembler::emit_assert(LIR_OpAssert* op) {
3763   assert(op->code() == lir_assert, "must be");
3764 
3765   if (op->in_opr1()->is_valid()) {
3766     assert(op->in_opr2()->is_valid(), "both operands must be valid");
3767     comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op);
3768   } else {
3769     assert(op->in_opr2()->is_illegal(), "both operands must be illegal");
3770     assert(op->condition() == lir_cond_always, "no other conditions allowed");
3771   }
3772 
3773   Label ok;
3774   if (op->condition() != lir_cond_always) {
3775     Assembler::Condition acond = Assembler::zero;
3776     switch (op->condition()) {
3777       case lir_cond_equal:        acond = Assembler::equal;       break;
3778       case lir_cond_notEqual:     acond = Assembler::notEqual;    break;
3779       case lir_cond_less:         acond = Assembler::less;        break;
3780       case lir_cond_lessEqual:    acond = Assembler::lessEqual;   break;
3781       case lir_cond_greaterEqual: acond = Assembler::greaterEqual;break;
3782       case lir_cond_greater:      acond = Assembler::greater;     break;
3783       case lir_cond_belowEqual:   acond = Assembler::belowEqual;  break;
3784       case lir_cond_aboveEqual:   acond = Assembler::aboveEqual;  break;
3785       default:                    ShouldNotReachHere();
3786     }
3787     __ jcc(acond, ok);
3788   }
3789   if (op->halt()) {
3790     const char* str = __ code_string(op->msg());
3791     delete op->msg();
3792     __ stop(str);
3793   } else {
3794     breakpoint();
3795   }
3796   __ bind(ok);
3797 }
3798 #endif
3799 
3800 void LIR_Assembler::membar() {
3801   // QQQ sparc TSO uses this,
3802   __ membar( Assembler::Membar_mask_bits(Assembler::StoreLoad));
3803 }
3804 
3805 void LIR_Assembler::membar_acquire() {
3806   // No x86 machines currently require load fences
3807   // __ load_fence();
3808 }
3809 
3810 void LIR_Assembler::membar_release() {
3811   // No x86 machines currently require store fences
3812   // __ store_fence();
3813 }
3814 
3815 void LIR_Assembler::membar_loadload() {
3816   // no-op
3817   //__ membar(Assembler::Membar_mask_bits(Assembler::loadload));
3818 }
3819