1 /*
   2  * Copyright (c) 2000, 2013, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *
  23  */
  24 
  25 #include "precompiled.hpp"
  26 #include "c1/c1_InstructionPrinter.hpp"
  27 #include "c1/c1_LIR.hpp"
  28 #include "c1/c1_LIRAssembler.hpp"
  29 #include "c1/c1_ValueStack.hpp"
  30 #include "ci/ciInstance.hpp"
  31 #include "runtime/sharedRuntime.hpp"
  32 
  33 Register LIR_OprDesc::as_register() const {
  34   return FrameMap::cpu_rnr2reg(cpu_regnr());
  35 }
  36 
  37 Register LIR_OprDesc::as_register_lo() const {
  38   return FrameMap::cpu_rnr2reg(cpu_regnrLo());
  39 }
  40 
  41 Register LIR_OprDesc::as_register_hi() const {
  42   return FrameMap::cpu_rnr2reg(cpu_regnrHi());
  43 }
  44 
  45 #if defined(X86)
  46 
  47 XMMRegister LIR_OprDesc::as_xmm_float_reg() const {
  48   return FrameMap::nr2xmmreg(xmm_regnr());
  49 }
  50 
  51 XMMRegister LIR_OprDesc::as_xmm_double_reg() const {
  52   assert(xmm_regnrLo() == xmm_regnrHi(), "assumed in calculation");
  53   return FrameMap::nr2xmmreg(xmm_regnrLo());
  54 }
  55 
  56 #endif // X86
  57 
  58 #if defined(SPARC) || defined(PPC)
  59 
  60 FloatRegister LIR_OprDesc::as_float_reg() const {
  61   return FrameMap::nr2floatreg(fpu_regnr());
  62 }
  63 
  64 FloatRegister LIR_OprDesc::as_double_reg() const {
  65   return FrameMap::nr2floatreg(fpu_regnrHi());
  66 }
  67 
  68 #endif
  69 
  70 #ifdef ARM
  71 
  72 FloatRegister LIR_OprDesc::as_float_reg() const {
  73   return as_FloatRegister(fpu_regnr());
  74 }
  75 
  76 FloatRegister LIR_OprDesc::as_double_reg() const {
  77   return as_FloatRegister(fpu_regnrLo());
  78 }
  79 
  80 #endif
  81 
  82 
  83 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
  84 
  85 LIR_Opr LIR_OprFact::value_type(ValueType* type) {
  86   ValueTag tag = type->tag();
  87   switch (tag) {
  88   case metaDataTag : {
  89     ClassConstant* c = type->as_ClassConstant();
  90     if (c != NULL && !c->value()->is_loaded()) {
  91       return LIR_OprFact::metadataConst(NULL);
  92     } else if (c != NULL) {
  93       return LIR_OprFact::metadataConst(c->value()->constant_encoding());
  94     } else {
  95       MethodConstant* m = type->as_MethodConstant();
  96       assert (m != NULL, "not a class or a method?");
  97       return LIR_OprFact::metadataConst(m->value()->constant_encoding());
  98     }
  99   }
 100   case objectTag : {
 101       return LIR_OprFact::oopConst(type->as_ObjectType()->encoding());
 102     }
 103   case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value());
 104   case intTag    : return LIR_OprFact::intConst(type->as_IntConstant()->value());
 105   case floatTag  : return LIR_OprFact::floatConst(type->as_FloatConstant()->value());
 106   case longTag   : return LIR_OprFact::longConst(type->as_LongConstant()->value());
 107   case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value());
 108   default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
 109   }
 110 }
 111 
 112 
 113 LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) {
 114   switch (type->tag()) {
 115     case objectTag: return LIR_OprFact::oopConst(NULL);
 116     case addressTag:return LIR_OprFact::addressConst(0);
 117     case intTag:    return LIR_OprFact::intConst(0);
 118     case floatTag:  return LIR_OprFact::floatConst(0.0);
 119     case longTag:   return LIR_OprFact::longConst(0);
 120     case doubleTag: return LIR_OprFact::doubleConst(0.0);
 121     default:        ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
 122   }
 123   return illegalOpr;
 124 }
 125 
 126 
 127 
 128 //---------------------------------------------------
 129 
 130 
 131 LIR_Address::Scale LIR_Address::scale(BasicType type) {
 132   int elem_size = type2aelembytes(type);
 133   switch (elem_size) {
 134   case 1: return LIR_Address::times_1;
 135   case 2: return LIR_Address::times_2;
 136   case 4: return LIR_Address::times_4;
 137   case 8: return LIR_Address::times_8;
 138   }
 139   ShouldNotReachHere();
 140   return LIR_Address::times_1;
 141 }
 142 
 143 
 144 #ifndef PRODUCT
 145 void LIR_Address::verify() const {
 146 #if defined(SPARC) || defined(PPC)
 147   assert(scale() == times_1, "Scaled addressing mode not available on SPARC/PPC and should not be used");
 148   assert(disp() == 0 || index()->is_illegal(), "can't have both");
 149 #endif
 150 #ifdef ARM
 151   assert(disp() == 0 || index()->is_illegal(), "can't have both");
 152   // Note: offsets higher than 4096 must not be rejected here. They can
 153   // be handled by the back-end or will be rejected if not.
 154 #endif
 155 #ifdef _LP64
 156   assert(base()->is_cpu_register(), "wrong base operand");
 157   assert(index()->is_illegal() || index()->is_double_cpu(), "wrong index operand");
 158   assert(base()->type() == T_OBJECT || base()->type() == T_LONG || base()->type() == T_METADATA,
 159          "wrong type for addresses");
 160 #else
 161   assert(base()->is_single_cpu(), "wrong base operand");
 162   assert(index()->is_illegal() || index()->is_single_cpu(), "wrong index operand");
 163   assert(base()->type() == T_OBJECT || base()->type() == T_INT || base()->type() == T_METADATA,
 164          "wrong type for addresses");
 165 #endif
 166 }
 167 #endif
 168 
 169 
 170 //---------------------------------------------------
 171 
 172 char LIR_OprDesc::type_char(BasicType t) {
 173   switch (t) {
 174     case T_ARRAY:
 175       t = T_OBJECT;
 176     case T_BOOLEAN:
 177     case T_CHAR:
 178     case T_FLOAT:
 179     case T_DOUBLE:
 180     case T_BYTE:
 181     case T_SHORT:
 182     case T_INT:
 183     case T_LONG:
 184     case T_OBJECT:
 185     case T_ADDRESS:
 186     case T_METADATA:
 187     case T_VOID:
 188       return ::type2char(t);
 189 
 190     case T_ILLEGAL:
 191       return '?';
 192 
 193     default:
 194       ShouldNotReachHere();
 195       return '?';
 196   }
 197 }
 198 
 199 #ifndef PRODUCT
 200 void LIR_OprDesc::validate_type() const {
 201 
 202 #ifdef ASSERT
 203   if (!is_pointer() && !is_illegal()) {
 204     switch (as_BasicType(type_field())) {
 205     case T_LONG:
 206       assert((kind_field() == cpu_register || kind_field() == stack_value) &&
 207              size_field() == double_size, "must match");
 208       break;
 209     case T_FLOAT:
 210       // FP return values can be also in CPU registers on ARM and PPC (softfp ABI)
 211       assert((kind_field() == fpu_register || kind_field() == stack_value
 212              ARM_ONLY(|| kind_field() == cpu_register)
 213              PPC_ONLY(|| kind_field() == cpu_register) ) &&
 214              size_field() == single_size, "must match");
 215       break;
 216     case T_DOUBLE:
 217       // FP return values can be also in CPU registers on ARM and PPC (softfp ABI)
 218       assert((kind_field() == fpu_register || kind_field() == stack_value
 219              ARM_ONLY(|| kind_field() == cpu_register)
 220              PPC_ONLY(|| kind_field() == cpu_register) ) &&
 221              size_field() == double_size, "must match");
 222       break;
 223     case T_BOOLEAN:
 224     case T_CHAR:
 225     case T_BYTE:
 226     case T_SHORT:
 227     case T_INT:
 228     case T_ADDRESS:
 229     case T_OBJECT:
 230     case T_METADATA:
 231     case T_ARRAY:
 232       assert((kind_field() == cpu_register || kind_field() == stack_value) &&
 233              size_field() == single_size, "must match");
 234       break;
 235 
 236     case T_ILLEGAL:
 237       // XXX TKR also means unknown right now
 238       // assert(is_illegal(), "must match");
 239       break;
 240 
 241     default:
 242       ShouldNotReachHere();
 243     }
 244   }
 245 #endif
 246 
 247 }
 248 #endif // PRODUCT
 249 
 250 
 251 bool LIR_OprDesc::is_oop() const {
 252   if (is_pointer()) {
 253     return pointer()->is_oop_pointer();
 254   } else {
 255     OprType t= type_field();
 256     assert(t != unknown_type, "not set");
 257     return t == object_type;
 258   }
 259 }
 260 
 261 
 262 
 263 void LIR_Op2::verify() const {
 264 #ifdef ASSERT
 265   switch (code()) {
 266     case lir_cmove:
 267     case lir_xchg:
 268       break;
 269 
 270     default:
 271       assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
 272              "can't produce oops from arith");
 273   }
 274 
 275   if (TwoOperandLIRForm) {
 276     switch (code()) {
 277     case lir_add:
 278     case lir_sub:
 279     case lir_mul:
 280     case lir_mul_strictfp:
 281     case lir_div:
 282     case lir_div_strictfp:
 283     case lir_rem:
 284     case lir_logic_and:
 285     case lir_logic_or:
 286     case lir_logic_xor:
 287     case lir_shl:
 288     case lir_shr:
 289       assert(in_opr1() == result_opr(), "opr1 and result must match");
 290       assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
 291       break;
 292 
 293     // special handling for lir_ushr because of write barriers
 294     case lir_ushr:
 295       assert(in_opr1() == result_opr() || in_opr2()->is_constant(), "opr1 and result must match or shift count is constant");
 296       assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
 297       break;
 298 
 299     }
 300   }
 301 #endif
 302 }
 303 
 304 
 305 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block)
 306   : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
 307   , _cond(cond)
 308   , _type(type)
 309   , _label(block->label())
 310   , _block(block)
 311   , _ublock(NULL)
 312   , _stub(NULL) {
 313 }
 314 
 315 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) :
 316   LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
 317   , _cond(cond)
 318   , _type(type)
 319   , _label(stub->entry())
 320   , _block(NULL)
 321   , _ublock(NULL)
 322   , _stub(stub) {
 323 }
 324 
 325 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock)
 326   : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
 327   , _cond(cond)
 328   , _type(type)
 329   , _label(block->label())
 330   , _block(block)
 331   , _ublock(ublock)
 332   , _stub(NULL)
 333 {
 334 }
 335 
 336 void LIR_OpBranch::change_block(BlockBegin* b) {
 337   assert(_block != NULL, "must have old block");
 338   assert(_block->label() == label(), "must be equal");
 339 
 340   _block = b;
 341   _label = b->label();
 342 }
 343 
 344 void LIR_OpBranch::change_ublock(BlockBegin* b) {
 345   assert(_ublock != NULL, "must have old block");
 346   _ublock = b;
 347 }
 348 
 349 void LIR_OpBranch::negate_cond() {
 350   switch (_cond) {
 351     case lir_cond_equal:        _cond = lir_cond_notEqual;     break;
 352     case lir_cond_notEqual:     _cond = lir_cond_equal;        break;
 353     case lir_cond_less:         _cond = lir_cond_greaterEqual; break;
 354     case lir_cond_lessEqual:    _cond = lir_cond_greater;      break;
 355     case lir_cond_greaterEqual: _cond = lir_cond_less;         break;
 356     case lir_cond_greater:      _cond = lir_cond_lessEqual;    break;
 357     default: ShouldNotReachHere();
 358   }
 359 }
 360 
 361 
 362 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
 363                                  LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
 364                                  bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
 365                                  CodeStub* stub)
 366 
 367   : LIR_Op(code, result, NULL)
 368   , _object(object)
 369   , _array(LIR_OprFact::illegalOpr)
 370   , _klass(klass)
 371   , _tmp1(tmp1)
 372   , _tmp2(tmp2)
 373   , _tmp3(tmp3)
 374   , _fast_check(fast_check)
 375   , _stub(stub)
 376   , _info_for_patch(info_for_patch)
 377   , _info_for_exception(info_for_exception)
 378   , _profiled_method(NULL)
 379   , _profiled_bci(-1)
 380   , _should_profile(false)
 381 {
 382   if (code == lir_checkcast) {
 383     assert(info_for_exception != NULL, "checkcast throws exceptions");
 384   } else if (code == lir_instanceof) {
 385     assert(info_for_exception == NULL, "instanceof throws no exceptions");
 386   } else {
 387     ShouldNotReachHere();
 388   }
 389 }
 390 
 391 
 392 
 393 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception)
 394   : LIR_Op(code, LIR_OprFact::illegalOpr, NULL)
 395   , _object(object)
 396   , _array(array)
 397   , _klass(NULL)
 398   , _tmp1(tmp1)
 399   , _tmp2(tmp2)
 400   , _tmp3(tmp3)
 401   , _fast_check(false)
 402   , _stub(NULL)
 403   , _info_for_patch(NULL)
 404   , _info_for_exception(info_for_exception)
 405   , _profiled_method(NULL)
 406   , _profiled_bci(-1)
 407   , _should_profile(false)
 408 {
 409   if (code == lir_store_check) {
 410     _stub = new ArrayStoreExceptionStub(object, info_for_exception);
 411     assert(info_for_exception != NULL, "store_check throws exceptions");
 412   } else {
 413     ShouldNotReachHere();
 414   }
 415 }
 416 
 417 
 418 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length,
 419                                  LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info)
 420   : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info)
 421   , _tmp(tmp)
 422   , _src(src)
 423   , _src_pos(src_pos)
 424   , _dst(dst)
 425   , _dst_pos(dst_pos)
 426   , _flags(flags)
 427   , _expected_type(expected_type)
 428   , _length(length) {
 429   _stub = new ArrayCopyStub(this);
 430 }
 431 
 432 
 433 //-------------------verify--------------------------
 434 
 435 void LIR_Op1::verify() const {
 436   switch(code()) {
 437   case lir_move:
 438     assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be");
 439     break;
 440   case lir_null_check:
 441     assert(in_opr()->is_register(), "must be");
 442     break;
 443   case lir_return:
 444     assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be");
 445     break;
 446   }
 447 }
 448 
 449 void LIR_OpRTCall::verify() const {
 450   assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function");
 451 }
 452 
 453 //-------------------visits--------------------------
 454 
 455 // complete rework of LIR instruction visitor.
 456 // The virtual calls for each instruction type is replaced by a big
 457 // switch that adds the operands for each instruction
 458 
 459 void LIR_OpVisitState::visit(LIR_Op* op) {
 460   // copy information from the LIR_Op
 461   reset();
 462   set_op(op);
 463 
 464   switch (op->code()) {
 465 
 466 // LIR_Op0
 467     case lir_word_align:               // result and info always invalid
 468     case lir_backwardbranch_target:    // result and info always invalid
 469     case lir_build_frame:              // result and info always invalid
 470     case lir_fpop_raw:                 // result and info always invalid
 471     case lir_24bit_FPU:                // result and info always invalid
 472     case lir_reset_FPU:                // result and info always invalid
 473     case lir_breakpoint:               // result and info always invalid
 474     case lir_membar:                   // result and info always invalid
 475     case lir_membar_acquire:           // result and info always invalid
 476     case lir_membar_release:           // result and info always invalid
 477     case lir_membar_loadload:          // result and info always invalid
 478     case lir_membar_storestore:        // result and info always invalid
 479     case lir_membar_loadstore:         // result and info always invalid
 480     case lir_membar_storeload:         // result and info always invalid
 481     {
 482       assert(op->as_Op0() != NULL, "must be");
 483       assert(op->_info == NULL, "info not used by this instruction");
 484       assert(op->_result->is_illegal(), "not used");
 485       break;
 486     }
 487 
 488     case lir_nop:                      // may have info, result always invalid
 489     case lir_std_entry:                // may have result, info always invalid
 490     case lir_osr_entry:                // may have result, info always invalid
 491     case lir_get_thread:               // may have result, info always invalid
 492     {
 493       assert(op->as_Op0() != NULL, "must be");
 494       if (op->_info != NULL)           do_info(op->_info);
 495       if (op->_result->is_valid())     do_output(op->_result);
 496       break;
 497     }
 498 
 499 
 500 // LIR_OpLabel
 501     case lir_label:                    // result and info always invalid
 502     {
 503       assert(op->as_OpLabel() != NULL, "must be");
 504       assert(op->_info == NULL, "info not used by this instruction");
 505       assert(op->_result->is_illegal(), "not used");
 506       break;
 507     }
 508 
 509 
 510 // LIR_Op1
 511     case lir_fxch:           // input always valid, result and info always invalid
 512     case lir_fld:            // input always valid, result and info always invalid
 513     case lir_ffree:          // input always valid, result and info always invalid
 514     case lir_push:           // input always valid, result and info always invalid
 515     case lir_pop:            // input always valid, result and info always invalid
 516     case lir_return:         // input always valid, result and info always invalid
 517     case lir_leal:           // input and result always valid, info always invalid
 518     case lir_neg:            // input and result always valid, info always invalid
 519     case lir_monaddr:        // input and result always valid, info always invalid
 520     case lir_null_check:     // input and info always valid, result always invalid
 521     case lir_move:           // input and result always valid, may have info
 522     case lir_pack64:         // input and result always valid
 523     case lir_unpack64:       // input and result always valid
 524     case lir_prefetchr:      // input always valid, result and info always invalid
 525     case lir_prefetchw:      // input always valid, result and info always invalid
 526     {
 527       assert(op->as_Op1() != NULL, "must be");
 528       LIR_Op1* op1 = (LIR_Op1*)op;
 529 
 530       if (op1->_info)                  do_info(op1->_info);
 531       if (op1->_opr->is_valid())       do_input(op1->_opr);
 532       if (op1->_result->is_valid())    do_output(op1->_result);
 533 
 534       break;
 535     }
 536 
 537     case lir_safepoint:
 538     {
 539       assert(op->as_Op1() != NULL, "must be");
 540       LIR_Op1* op1 = (LIR_Op1*)op;
 541 
 542       assert(op1->_info != NULL, "");  do_info(op1->_info);
 543       if (op1->_opr->is_valid())       do_temp(op1->_opr); // safepoints on SPARC need temporary register
 544       assert(op1->_result->is_illegal(), "safepoint does not produce value");
 545 
 546       break;
 547     }
 548 
 549 // LIR_OpConvert;
 550     case lir_convert:        // input and result always valid, info always invalid
 551     {
 552       assert(op->as_OpConvert() != NULL, "must be");
 553       LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
 554 
 555       assert(opConvert->_info == NULL, "must be");
 556       if (opConvert->_opr->is_valid())       do_input(opConvert->_opr);
 557       if (opConvert->_result->is_valid())    do_output(opConvert->_result);
 558 #ifdef PPC
 559       if (opConvert->_tmp1->is_valid())      do_temp(opConvert->_tmp1);
 560       if (opConvert->_tmp2->is_valid())      do_temp(opConvert->_tmp2);
 561 #endif
 562       do_stub(opConvert->_stub);
 563 
 564       break;
 565     }
 566 
 567 // LIR_OpBranch;
 568     case lir_branch:                   // may have info, input and result register always invalid
 569     case lir_cond_float_branch:        // may have info, input and result register always invalid
 570     {
 571       assert(op->as_OpBranch() != NULL, "must be");
 572       LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
 573 
 574       if (opBranch->_info != NULL)     do_info(opBranch->_info);
 575       assert(opBranch->_result->is_illegal(), "not used");
 576       if (opBranch->_stub != NULL)     opBranch->stub()->visit(this);
 577 
 578       break;
 579     }
 580 
 581 
 582 // LIR_OpAllocObj
 583     case lir_alloc_object:
 584     {
 585       assert(op->as_OpAllocObj() != NULL, "must be");
 586       LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
 587 
 588       if (opAllocObj->_info)                     do_info(opAllocObj->_info);
 589       if (opAllocObj->_opr->is_valid()) {        do_input(opAllocObj->_opr);
 590                                                  do_temp(opAllocObj->_opr);
 591                                         }
 592       if (opAllocObj->_tmp1->is_valid())         do_temp(opAllocObj->_tmp1);
 593       if (opAllocObj->_tmp2->is_valid())         do_temp(opAllocObj->_tmp2);
 594       if (opAllocObj->_tmp3->is_valid())         do_temp(opAllocObj->_tmp3);
 595       if (opAllocObj->_tmp4->is_valid())         do_temp(opAllocObj->_tmp4);
 596       if (opAllocObj->_result->is_valid())       do_output(opAllocObj->_result);
 597                                                  do_stub(opAllocObj->_stub);
 598       break;
 599     }
 600 
 601 
 602 // LIR_OpRoundFP;
 603     case lir_roundfp: {
 604       assert(op->as_OpRoundFP() != NULL, "must be");
 605       LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op;
 606 
 607       assert(op->_info == NULL, "info not used by this instruction");
 608       assert(opRoundFP->_tmp->is_illegal(), "not used");
 609       do_input(opRoundFP->_opr);
 610       do_output(opRoundFP->_result);
 611 
 612       break;
 613     }
 614 
 615 
 616 // LIR_Op2
 617     case lir_cmp:
 618     case lir_cmp_l2i:
 619     case lir_ucmp_fd2i:
 620     case lir_cmp_fd2i:
 621     case lir_add:
 622     case lir_sub:
 623     case lir_mul:
 624     case lir_div:
 625     case lir_rem:
 626     case lir_sqrt:
 627     case lir_abs:
 628     case lir_logic_and:
 629     case lir_logic_or:
 630     case lir_logic_xor:
 631     case lir_shl:
 632     case lir_shr:
 633     case lir_ushr:
 634     case lir_xadd:
 635     case lir_xchg:
 636     {
 637       assert(op->as_Op2() != NULL, "must be");
 638       LIR_Op2* op2 = (LIR_Op2*)op;
 639       assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
 640              op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 641 
 642       if (op2->_info)                     do_info(op2->_info);
 643       if (op2->_opr1->is_valid())         do_input(op2->_opr1);
 644       if (op2->_opr2->is_valid())         do_input(op2->_opr2);
 645       if (op2->_tmp1->is_valid())         do_temp(op2->_tmp1);
 646       if (op2->_result->is_valid())       do_output(op2->_result);
 647       if (op->code() == lir_xchg || op->code() == lir_xadd) {
 648         // on ARM and PPC, return value is loaded first so could
 649         // destroy inputs. On other platforms that implement those
 650         // (x86, sparc), the extra constrainsts are harmless.
 651         if (op2->_opr1->is_valid())       do_temp(op2->_opr1);
 652         if (op2->_opr2->is_valid())       do_temp(op2->_opr2);
 653       }
 654 
 655       break;
 656     }
 657 
 658     // special handling for cmove: right input operand must not be equal
 659     // to the result operand, otherwise the backend fails
 660     case lir_cmove:
 661     {
 662       assert(op->as_Op2() != NULL, "must be");
 663       LIR_Op2* op2 = (LIR_Op2*)op;
 664 
 665       assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() &&
 666              op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 667       assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used");
 668 
 669       do_input(op2->_opr1);
 670       do_input(op2->_opr2);
 671       do_temp(op2->_opr2);
 672       do_output(op2->_result);
 673 
 674       break;
 675     }
 676 
 677     // vspecial handling for strict operations: register input operands
 678     // as temp to guarantee that they do not overlap with other
 679     // registers
 680     case lir_mul_strictfp:
 681     case lir_div_strictfp:
 682     {
 683       assert(op->as_Op2() != NULL, "must be");
 684       LIR_Op2* op2 = (LIR_Op2*)op;
 685 
 686       assert(op2->_info == NULL, "not used");
 687       assert(op2->_opr1->is_valid(), "used");
 688       assert(op2->_opr2->is_valid(), "used");
 689       assert(op2->_result->is_valid(), "used");
 690       assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
 691              op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 692 
 693       do_input(op2->_opr1); do_temp(op2->_opr1);
 694       do_input(op2->_opr2); do_temp(op2->_opr2);
 695       if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
 696       do_output(op2->_result);
 697 
 698       break;
 699     }
 700 
 701     case lir_throw: {
 702       assert(op->as_Op2() != NULL, "must be");
 703       LIR_Op2* op2 = (LIR_Op2*)op;
 704 
 705       if (op2->_info)                     do_info(op2->_info);
 706       if (op2->_opr1->is_valid())         do_temp(op2->_opr1);
 707       if (op2->_opr2->is_valid())         do_input(op2->_opr2); // exception object is input parameter
 708       assert(op2->_result->is_illegal(), "no result");
 709       assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
 710              op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
 711 
 712       break;
 713     }
 714 
 715     case lir_unwind: {
 716       assert(op->as_Op1() != NULL, "must be");
 717       LIR_Op1* op1 = (LIR_Op1*)op;
 718 
 719       assert(op1->_info == NULL, "no info");
 720       assert(op1->_opr->is_valid(), "exception oop");         do_input(op1->_opr);
 721       assert(op1->_result->is_illegal(), "no result");
 722 
 723       break;
 724     }
 725 
 726 
 727     case lir_tan:
 728     case lir_sin:
 729     case lir_cos:
 730     case lir_log:
 731     case lir_log10:
 732     case lir_exp: {
 733       assert(op->as_Op2() != NULL, "must be");
 734       LIR_Op2* op2 = (LIR_Op2*)op;
 735 
 736       // On x86 tan/sin/cos need two temporary fpu stack slots and
 737       // log/log10 need one so handle opr2 and tmp as temp inputs.
 738       // Register input operand as temp to guarantee that it doesn't
 739       // overlap with the input.
 740       assert(op2->_info == NULL, "not used");
 741       assert(op2->_tmp5->is_illegal(), "not used");
 742       assert(op2->_tmp2->is_valid() == (op->code() == lir_exp), "not used");
 743       assert(op2->_tmp3->is_valid() == (op->code() == lir_exp), "not used");
 744       assert(op2->_tmp4->is_valid() == (op->code() == lir_exp), "not used");
 745       assert(op2->_opr1->is_valid(), "used");
 746       do_input(op2->_opr1); do_temp(op2->_opr1);
 747 
 748       if (op2->_opr2->is_valid())         do_temp(op2->_opr2);
 749       if (op2->_tmp1->is_valid())         do_temp(op2->_tmp1);
 750       if (op2->_tmp2->is_valid())         do_temp(op2->_tmp2);
 751       if (op2->_tmp3->is_valid())         do_temp(op2->_tmp3);
 752       if (op2->_tmp4->is_valid())         do_temp(op2->_tmp4);
 753       if (op2->_result->is_valid())       do_output(op2->_result);
 754 
 755       break;
 756     }
 757 
 758     case lir_pow: {
 759       assert(op->as_Op2() != NULL, "must be");
 760       LIR_Op2* op2 = (LIR_Op2*)op;
 761 
 762       // On x86 pow needs two temporary fpu stack slots: tmp1 and
 763       // tmp2. Register input operands as temps to guarantee that it
 764       // doesn't overlap with the temporary slots.
 765       assert(op2->_info == NULL, "not used");
 766       assert(op2->_opr1->is_valid() && op2->_opr2->is_valid(), "used");
 767       assert(op2->_tmp1->is_valid() && op2->_tmp2->is_valid() && op2->_tmp3->is_valid()
 768              && op2->_tmp4->is_valid() && op2->_tmp5->is_valid(), "used");
 769       assert(op2->_result->is_valid(), "used");
 770 
 771       do_input(op2->_opr1); do_temp(op2->_opr1);
 772       do_input(op2->_opr2); do_temp(op2->_opr2);
 773       do_temp(op2->_tmp1);
 774       do_temp(op2->_tmp2);
 775       do_temp(op2->_tmp3);
 776       do_temp(op2->_tmp4);
 777       do_temp(op2->_tmp5);
 778       do_output(op2->_result);
 779 
 780       break;
 781     }
 782 
 783 // LIR_Op3
 784     case lir_idiv:
 785     case lir_irem: {
 786       assert(op->as_Op3() != NULL, "must be");
 787       LIR_Op3* op3= (LIR_Op3*)op;
 788 
 789       if (op3->_info)                     do_info(op3->_info);
 790       if (op3->_opr1->is_valid())         do_input(op3->_opr1);
 791 
 792       // second operand is input and temp, so ensure that second operand
 793       // and third operand get not the same register
 794       if (op3->_opr2->is_valid())         do_input(op3->_opr2);
 795       if (op3->_opr2->is_valid())         do_temp(op3->_opr2);
 796       if (op3->_opr3->is_valid())         do_temp(op3->_opr3);
 797 
 798       if (op3->_result->is_valid())       do_output(op3->_result);
 799 
 800       break;
 801     }
 802 
 803 
 804 // LIR_OpJavaCall
 805     case lir_static_call:
 806     case lir_optvirtual_call:
 807     case lir_icvirtual_call:
 808     case lir_virtual_call:
 809     case lir_dynamic_call: {
 810       LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall();
 811       assert(opJavaCall != NULL, "must be");
 812 
 813       if (opJavaCall->_receiver->is_valid())     do_input(opJavaCall->_receiver);
 814 
 815       // only visit register parameters
 816       int n = opJavaCall->_arguments->length();
 817       for (int i = 0; i < n; i++) {
 818         if (!opJavaCall->_arguments->at(i)->is_pointer()) {
 819           do_input(*opJavaCall->_arguments->adr_at(i));
 820         }
 821       }
 822 
 823       if (opJavaCall->_info)                     do_info(opJavaCall->_info);
 824       if (opJavaCall->is_method_handle_invoke()) {
 825         opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr();
 826         do_temp(opJavaCall->_method_handle_invoke_SP_save_opr);
 827       }
 828       do_call();
 829       if (opJavaCall->_result->is_valid())       do_output(opJavaCall->_result);
 830 
 831       break;
 832     }
 833 
 834 
 835 // LIR_OpRTCall
 836     case lir_rtcall: {
 837       assert(op->as_OpRTCall() != NULL, "must be");
 838       LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op;
 839 
 840       // only visit register parameters
 841       int n = opRTCall->_arguments->length();
 842       for (int i = 0; i < n; i++) {
 843         if (!opRTCall->_arguments->at(i)->is_pointer()) {
 844           do_input(*opRTCall->_arguments->adr_at(i));
 845         }
 846       }
 847       if (opRTCall->_info)                     do_info(opRTCall->_info);
 848       if (opRTCall->_tmp->is_valid())          do_temp(opRTCall->_tmp);
 849       do_call();
 850       if (opRTCall->_result->is_valid())       do_output(opRTCall->_result);
 851 
 852       break;
 853     }
 854 
 855 
 856 // LIR_OpArrayCopy
 857     case lir_arraycopy: {
 858       assert(op->as_OpArrayCopy() != NULL, "must be");
 859       LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op;
 860 
 861       assert(opArrayCopy->_result->is_illegal(), "unused");
 862       assert(opArrayCopy->_src->is_valid(), "used");          do_input(opArrayCopy->_src);     do_temp(opArrayCopy->_src);
 863       assert(opArrayCopy->_src_pos->is_valid(), "used");      do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos);
 864       assert(opArrayCopy->_dst->is_valid(), "used");          do_input(opArrayCopy->_dst);     do_temp(opArrayCopy->_dst);
 865       assert(opArrayCopy->_dst_pos->is_valid(), "used");      do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos);
 866       assert(opArrayCopy->_length->is_valid(), "used");       do_input(opArrayCopy->_length);  do_temp(opArrayCopy->_length);
 867       assert(opArrayCopy->_tmp->is_valid(), "used");          do_temp(opArrayCopy->_tmp);
 868       if (opArrayCopy->_info)                     do_info(opArrayCopy->_info);
 869 
 870       // the implementation of arraycopy always has a call into the runtime
 871       do_call();
 872 
 873       break;
 874     }
 875 
 876 
 877 // LIR_OpLock
 878     case lir_lock:
 879     case lir_unlock: {
 880       assert(op->as_OpLock() != NULL, "must be");
 881       LIR_OpLock* opLock = (LIR_OpLock*)op;
 882 
 883       if (opLock->_info)                          do_info(opLock->_info);
 884 
 885       // TODO: check if these operands really have to be temp
 886       // (or if input is sufficient). This may have influence on the oop map!
 887       assert(opLock->_lock->is_valid(), "used");  do_temp(opLock->_lock);
 888       assert(opLock->_hdr->is_valid(),  "used");  do_temp(opLock->_hdr);
 889       assert(opLock->_obj->is_valid(),  "used");  do_temp(opLock->_obj);
 890 
 891       if (opLock->_scratch->is_valid())           do_temp(opLock->_scratch);
 892       assert(opLock->_result->is_illegal(), "unused");
 893 
 894       do_stub(opLock->_stub);
 895 
 896       break;
 897     }
 898 
 899 
 900 // LIR_OpDelay
 901     case lir_delay_slot: {
 902       assert(op->as_OpDelay() != NULL, "must be");
 903       LIR_OpDelay* opDelay = (LIR_OpDelay*)op;
 904 
 905       visit(opDelay->delay_op());
 906       break;
 907     }
 908 
 909 // LIR_OpTypeCheck
 910     case lir_instanceof:
 911     case lir_checkcast:
 912     case lir_store_check: {
 913       assert(op->as_OpTypeCheck() != NULL, "must be");
 914       LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op;
 915 
 916       if (opTypeCheck->_info_for_exception)       do_info(opTypeCheck->_info_for_exception);
 917       if (opTypeCheck->_info_for_patch)           do_info(opTypeCheck->_info_for_patch);
 918       if (opTypeCheck->_object->is_valid())       do_input(opTypeCheck->_object);
 919       if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) {
 920         do_temp(opTypeCheck->_object);
 921       }
 922       if (opTypeCheck->_array->is_valid())        do_input(opTypeCheck->_array);
 923       if (opTypeCheck->_tmp1->is_valid())         do_temp(opTypeCheck->_tmp1);
 924       if (opTypeCheck->_tmp2->is_valid())         do_temp(opTypeCheck->_tmp2);
 925       if (opTypeCheck->_tmp3->is_valid())         do_temp(opTypeCheck->_tmp3);
 926       if (opTypeCheck->_result->is_valid())       do_output(opTypeCheck->_result);
 927                                                   do_stub(opTypeCheck->_stub);
 928       break;
 929     }
 930 
 931 // LIR_OpCompareAndSwap
 932     case lir_cas_long:
 933     case lir_cas_obj:
 934     case lir_cas_int: {
 935       assert(op->as_OpCompareAndSwap() != NULL, "must be");
 936       LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op;
 937 
 938       assert(opCompareAndSwap->_addr->is_valid(),      "used");
 939       assert(opCompareAndSwap->_cmp_value->is_valid(), "used");
 940       assert(opCompareAndSwap->_new_value->is_valid(), "used");
 941       if (opCompareAndSwap->_info)                    do_info(opCompareAndSwap->_info);
 942                                                       do_input(opCompareAndSwap->_addr);
 943                                                       do_temp(opCompareAndSwap->_addr);
 944                                                       do_input(opCompareAndSwap->_cmp_value);
 945                                                       do_temp(opCompareAndSwap->_cmp_value);
 946                                                       do_input(opCompareAndSwap->_new_value);
 947                                                       do_temp(opCompareAndSwap->_new_value);
 948       if (opCompareAndSwap->_tmp1->is_valid())        do_temp(opCompareAndSwap->_tmp1);
 949       if (opCompareAndSwap->_tmp2->is_valid())        do_temp(opCompareAndSwap->_tmp2);
 950       if (opCompareAndSwap->_result->is_valid())      do_output(opCompareAndSwap->_result);
 951 
 952       break;
 953     }
 954 
 955 
 956 // LIR_OpAllocArray;
 957     case lir_alloc_array: {
 958       assert(op->as_OpAllocArray() != NULL, "must be");
 959       LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op;
 960 
 961       if (opAllocArray->_info)                        do_info(opAllocArray->_info);
 962       if (opAllocArray->_klass->is_valid())           do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass);
 963       if (opAllocArray->_len->is_valid())             do_input(opAllocArray->_len);   do_temp(opAllocArray->_len);
 964       if (opAllocArray->_tmp1->is_valid())            do_temp(opAllocArray->_tmp1);
 965       if (opAllocArray->_tmp2->is_valid())            do_temp(opAllocArray->_tmp2);
 966       if (opAllocArray->_tmp3->is_valid())            do_temp(opAllocArray->_tmp3);
 967       if (opAllocArray->_tmp4->is_valid())            do_temp(opAllocArray->_tmp4);
 968       if (opAllocArray->_result->is_valid())          do_output(opAllocArray->_result);
 969                                                       do_stub(opAllocArray->_stub);
 970       break;
 971     }
 972 
 973 // LIR_OpProfileCall:
 974     case lir_profile_call: {
 975       assert(op->as_OpProfileCall() != NULL, "must be");
 976       LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op;
 977 
 978       if (opProfileCall->_recv->is_valid())              do_temp(opProfileCall->_recv);
 979       assert(opProfileCall->_mdo->is_valid(), "used");   do_temp(opProfileCall->_mdo);
 980       assert(opProfileCall->_tmp1->is_valid(), "used");  do_temp(opProfileCall->_tmp1);
 981       break;
 982     }
 983   default:
 984     ShouldNotReachHere();
 985   }
 986 }
 987 
 988 
 989 void LIR_OpVisitState::do_stub(CodeStub* stub) {
 990   if (stub != NULL) {
 991     stub->visit(this);
 992   }
 993 }
 994 
 995 XHandlers* LIR_OpVisitState::all_xhandler() {
 996   XHandlers* result = NULL;
 997 
 998   int i;
 999   for (i = 0; i < info_count(); i++) {
1000     if (info_at(i)->exception_handlers() != NULL) {
1001       result = info_at(i)->exception_handlers();
1002       break;
1003     }
1004   }
1005 
1006 #ifdef ASSERT
1007   for (i = 0; i < info_count(); i++) {
1008     assert(info_at(i)->exception_handlers() == NULL ||
1009            info_at(i)->exception_handlers() == result,
1010            "only one xhandler list allowed per LIR-operation");
1011   }
1012 #endif
1013 
1014   if (result != NULL) {
1015     return result;
1016   } else {
1017     return new XHandlers();
1018   }
1019 
1020   return result;
1021 }
1022 
1023 
1024 #ifdef ASSERT
1025 bool LIR_OpVisitState::no_operands(LIR_Op* op) {
1026   visit(op);
1027 
1028   return opr_count(inputMode) == 0 &&
1029          opr_count(outputMode) == 0 &&
1030          opr_count(tempMode) == 0 &&
1031          info_count() == 0 &&
1032          !has_call() &&
1033          !has_slow_case();
1034 }
1035 #endif
1036 
1037 //---------------------------------------------------
1038 
1039 
1040 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) {
1041   masm->emit_call(this);
1042 }
1043 
1044 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) {
1045   masm->emit_rtcall(this);
1046 }
1047 
1048 void LIR_OpLabel::emit_code(LIR_Assembler* masm) {
1049   masm->emit_opLabel(this);
1050 }
1051 
1052 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
1053   masm->emit_arraycopy(this);
1054   masm->emit_code_stub(stub());
1055 }
1056 
1057 void LIR_Op0::emit_code(LIR_Assembler* masm) {
1058   masm->emit_op0(this);
1059 }
1060 
1061 void LIR_Op1::emit_code(LIR_Assembler* masm) {
1062   masm->emit_op1(this);
1063 }
1064 
1065 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) {
1066   masm->emit_alloc_obj(this);
1067   masm->emit_code_stub(stub());
1068 }
1069 
1070 void LIR_OpBranch::emit_code(LIR_Assembler* masm) {
1071   masm->emit_opBranch(this);
1072   if (stub()) {
1073     masm->emit_code_stub(stub());
1074   }
1075 }
1076 
1077 void LIR_OpConvert::emit_code(LIR_Assembler* masm) {
1078   masm->emit_opConvert(this);
1079   if (stub() != NULL) {
1080     masm->emit_code_stub(stub());
1081   }
1082 }
1083 
1084 void LIR_Op2::emit_code(LIR_Assembler* masm) {
1085   masm->emit_op2(this);
1086 }
1087 
1088 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
1089   masm->emit_alloc_array(this);
1090   masm->emit_code_stub(stub());
1091 }
1092 
1093 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
1094   masm->emit_opTypeCheck(this);
1095   if (stub()) {
1096     masm->emit_code_stub(stub());
1097   }
1098 }
1099 
1100 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
1101   masm->emit_compare_and_swap(this);
1102 }
1103 
1104 void LIR_Op3::emit_code(LIR_Assembler* masm) {
1105   masm->emit_op3(this);
1106 }
1107 
1108 void LIR_OpLock::emit_code(LIR_Assembler* masm) {
1109   masm->emit_lock(this);
1110   if (stub()) {
1111     masm->emit_code_stub(stub());
1112   }
1113 }
1114 
1115 
1116 void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
1117   masm->emit_delay(this);
1118 }
1119 
1120 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
1121   masm->emit_profile_call(this);
1122 }
1123 
1124 // LIR_List
1125 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
1126   : _operations(8)
1127   , _compilation(compilation)
1128 #ifndef PRODUCT
1129   , _block(block)
1130 #endif
1131 #ifdef ASSERT
1132   , _file(NULL)
1133   , _line(0)
1134 #endif
1135 { }
1136 
1137 
1138 #ifdef ASSERT
1139 void LIR_List::set_file_and_line(const char * file, int line) {
1140   const char * f = strrchr(file, '/');
1141   if (f == NULL) f = strrchr(file, '\\');
1142   if (f == NULL) {
1143     f = file;
1144   } else {
1145     f++;
1146   }
1147   _file = f;
1148   _line = line;
1149 }
1150 #endif
1151 
1152 
1153 void LIR_List::append(LIR_InsertionBuffer* buffer) {
1154   assert(this == buffer->lir_list(), "wrong lir list");
1155   const int n = _operations.length();
1156 
1157   if (buffer->number_of_ops() > 0) {
1158     // increase size of instructions list
1159     _operations.at_grow(n + buffer->number_of_ops() - 1, NULL);
1160     // insert ops from buffer into instructions list
1161     int op_index = buffer->number_of_ops() - 1;
1162     int ip_index = buffer->number_of_insertion_points() - 1;
1163     int from_index = n - 1;
1164     int to_index = _operations.length() - 1;
1165     for (; ip_index >= 0; ip_index --) {
1166       int index = buffer->index_at(ip_index);
1167       // make room after insertion point
1168       while (index < from_index) {
1169         _operations.at_put(to_index --, _operations.at(from_index --));
1170       }
1171       // insert ops from buffer
1172       for (int i = buffer->count_at(ip_index); i > 0; i --) {
1173         _operations.at_put(to_index --, buffer->op_at(op_index --));
1174       }
1175     }
1176   }
1177 
1178   buffer->finish();
1179 }
1180 
1181 
1182 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) {
1183   assert(reg->type() == T_OBJECT, "bad reg");
1184   append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o),  reg, T_OBJECT, lir_patch_normal, info));
1185 }
1186 
1187 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) {
1188   assert(reg->type() == T_METADATA, "bad reg");
1189   append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info));
1190 }
1191 
1192 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1193   append(new LIR_Op1(
1194             lir_move,
1195             LIR_OprFact::address(addr),
1196             src,
1197             addr->type(),
1198             patch_code,
1199             info));
1200 }
1201 
1202 
1203 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1204   append(new LIR_Op1(
1205             lir_move,
1206             LIR_OprFact::address(address),
1207             dst,
1208             address->type(),
1209             patch_code,
1210             info, lir_move_volatile));
1211 }
1212 
1213 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1214   append(new LIR_Op1(
1215             lir_move,
1216             LIR_OprFact::address(new LIR_Address(base, offset, type)),
1217             dst,
1218             type,
1219             patch_code,
1220             info, lir_move_volatile));
1221 }
1222 
1223 
1224 void LIR_List::prefetch(LIR_Address* addr, bool is_store) {
1225   append(new LIR_Op1(
1226             is_store ? lir_prefetchw : lir_prefetchr,
1227             LIR_OprFact::address(addr)));
1228 }
1229 
1230 
1231 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1232   append(new LIR_Op1(
1233             lir_move,
1234             LIR_OprFact::intConst(v),
1235             LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1236             type,
1237             patch_code,
1238             info));
1239 }
1240 
1241 
1242 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1243   append(new LIR_Op1(
1244             lir_move,
1245             LIR_OprFact::oopConst(o),
1246             LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1247             type,
1248             patch_code,
1249             info));
1250 }
1251 
1252 
1253 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1254   append(new LIR_Op1(
1255             lir_move,
1256             src,
1257             LIR_OprFact::address(addr),
1258             addr->type(),
1259             patch_code,
1260             info));
1261 }
1262 
1263 
1264 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1265   append(new LIR_Op1(
1266             lir_move,
1267             src,
1268             LIR_OprFact::address(addr),
1269             addr->type(),
1270             patch_code,
1271             info,
1272             lir_move_volatile));
1273 }
1274 
1275 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1276   append(new LIR_Op1(
1277             lir_move,
1278             src,
1279             LIR_OprFact::address(new LIR_Address(base, offset, type)),
1280             type,
1281             patch_code,
1282             info, lir_move_volatile));
1283 }
1284 
1285 
1286 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1287   append(new LIR_Op3(
1288                     lir_idiv,
1289                     left,
1290                     right,
1291                     tmp,
1292                     res,
1293                     info));
1294 }
1295 
1296 
1297 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1298   append(new LIR_Op3(
1299                     lir_idiv,
1300                     left,
1301                     LIR_OprFact::intConst(right),
1302                     tmp,
1303                     res,
1304                     info));
1305 }
1306 
1307 
1308 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1309   append(new LIR_Op3(
1310                     lir_irem,
1311                     left,
1312                     right,
1313                     tmp,
1314                     res,
1315                     info));
1316 }
1317 
1318 
1319 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1320   append(new LIR_Op3(
1321                     lir_irem,
1322                     left,
1323                     LIR_OprFact::intConst(right),
1324                     tmp,
1325                     res,
1326                     info));
1327 }
1328 
1329 
1330 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
1331   append(new LIR_Op2(
1332                     lir_cmp,
1333                     condition,
1334                     LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
1335                     LIR_OprFact::intConst(c),
1336                     info));
1337 }
1338 
1339 
1340 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) {
1341   append(new LIR_Op2(
1342                     lir_cmp,
1343                     condition,
1344                     reg,
1345                     LIR_OprFact::address(addr),
1346                     info));
1347 }
1348 
1349 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1350                                int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) {
1351   append(new LIR_OpAllocObj(
1352                            klass,
1353                            dst,
1354                            t1,
1355                            t2,
1356                            t3,
1357                            t4,
1358                            header_size,
1359                            object_size,
1360                            init_check,
1361                            stub));
1362 }
1363 
1364 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) {
1365   append(new LIR_OpAllocArray(
1366                            klass,
1367                            len,
1368                            dst,
1369                            t1,
1370                            t2,
1371                            t3,
1372                            t4,
1373                            type,
1374                            stub));
1375 }
1376 
1377 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1378  append(new LIR_Op2(
1379                     lir_shl,
1380                     value,
1381                     count,
1382                     dst,
1383                     tmp));
1384 }
1385 
1386 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1387  append(new LIR_Op2(
1388                     lir_shr,
1389                     value,
1390                     count,
1391                     dst,
1392                     tmp));
1393 }
1394 
1395 
1396 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1397  append(new LIR_Op2(
1398                     lir_ushr,
1399                     value,
1400                     count,
1401                     dst,
1402                     tmp));
1403 }
1404 
1405 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) {
1406   append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i,
1407                      left,
1408                      right,
1409                      dst));
1410 }
1411 
1412 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) {
1413   append(new LIR_OpLock(
1414                     lir_lock,
1415                     hdr,
1416                     obj,
1417                     lock,
1418                     scratch,
1419                     stub,
1420                     info));
1421 }
1422 
1423 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) {
1424   append(new LIR_OpLock(
1425                     lir_unlock,
1426                     hdr,
1427                     obj,
1428                     lock,
1429                     scratch,
1430                     stub,
1431                     NULL));
1432 }
1433 
1434 
1435 void check_LIR() {
1436   // cannot do the proper checking as PRODUCT and other modes return different results
1437   // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table");
1438 }
1439 
1440 
1441 
1442 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
1443                           LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1444                           CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1445                           ciMethod* profiled_method, int profiled_bci) {
1446   LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass,
1447                                            tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub);
1448   if (profiled_method != NULL) {
1449     c->set_profiled_method(profiled_method);
1450     c->set_profiled_bci(profiled_bci);
1451     c->set_should_profile(true);
1452   }
1453   append(c);
1454 }
1455 
1456 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) {
1457   LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL);
1458   if (profiled_method != NULL) {
1459     c->set_profiled_method(profiled_method);
1460     c->set_profiled_bci(profiled_bci);
1461     c->set_should_profile(true);
1462   }
1463   append(c);
1464 }
1465 
1466 
1467 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
1468                            CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) {
1469   LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception);
1470   if (profiled_method != NULL) {
1471     c->set_profiled_method(profiled_method);
1472     c->set_profiled_bci(profiled_bci);
1473     c->set_should_profile(true);
1474   }
1475   append(c);
1476 }
1477 
1478 
1479 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1480                         LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1481   append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result));
1482 }
1483 
1484 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1485                        LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1486   append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result));
1487 }
1488 
1489 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1490                        LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1491   append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result));
1492 }
1493 
1494 
1495 #ifdef PRODUCT
1496 
1497 void print_LIR(BlockList* blocks) {
1498 }
1499 
1500 #else
1501 // LIR_OprDesc
1502 void LIR_OprDesc::print() const {
1503   print(tty);
1504 }
1505 
1506 void LIR_OprDesc::print(outputStream* out) const {
1507   if (is_illegal()) {
1508     return;
1509   }
1510 
1511   out->print("[");
1512   if (is_pointer()) {
1513     pointer()->print_value_on(out);
1514   } else if (is_single_stack()) {
1515     out->print("stack:%d", single_stack_ix());
1516   } else if (is_double_stack()) {
1517     out->print("dbl_stack:%d",double_stack_ix());
1518   } else if (is_virtual()) {
1519     out->print("R%d", vreg_number());
1520   } else if (is_single_cpu()) {
1521     out->print(as_register()->name());
1522   } else if (is_double_cpu()) {
1523     out->print(as_register_hi()->name());
1524     out->print(as_register_lo()->name());
1525 #if defined(X86)
1526   } else if (is_single_xmm()) {
1527     out->print(as_xmm_float_reg()->name());
1528   } else if (is_double_xmm()) {
1529     out->print(as_xmm_double_reg()->name());
1530   } else if (is_single_fpu()) {
1531     out->print("fpu%d", fpu_regnr());
1532   } else if (is_double_fpu()) {
1533     out->print("fpu%d", fpu_regnrLo());
1534 #elif defined(ARM)
1535   } else if (is_single_fpu()) {
1536     out->print("s%d", fpu_regnr());
1537   } else if (is_double_fpu()) {
1538     out->print("d%d", fpu_regnrLo() >> 1);
1539 #else
1540   } else if (is_single_fpu()) {
1541     out->print(as_float_reg()->name());
1542   } else if (is_double_fpu()) {
1543     out->print(as_double_reg()->name());
1544 #endif
1545 
1546   } else if (is_illegal()) {
1547     out->print("-");
1548   } else {
1549     out->print("Unknown Operand");
1550   }
1551   if (!is_illegal()) {
1552     out->print("|%c", type_char());
1553   }
1554   if (is_register() && is_last_use()) {
1555     out->print("(last_use)");
1556   }
1557   out->print("]");
1558 }
1559 
1560 
1561 // LIR_Address
1562 void LIR_Const::print_value_on(outputStream* out) const {
1563   switch (type()) {
1564     case T_ADDRESS:out->print("address:%d",as_jint());          break;
1565     case T_INT:    out->print("int:%d",   as_jint());           break;
1566     case T_LONG:   out->print("lng:" JLONG_FORMAT, as_jlong()); break;
1567     case T_FLOAT:  out->print("flt:%f",   as_jfloat());         break;
1568     case T_DOUBLE: out->print("dbl:%f",   as_jdouble());        break;
1569     case T_OBJECT: out->print("obj:0x%x", as_jobject());        break;
1570     case T_METADATA: out->print("metadata:0x%x", as_metadata());break;
1571     default:       out->print("%3d:0x%x",type(), as_jdouble()); break;
1572   }
1573 }
1574 
1575 // LIR_Address
1576 void LIR_Address::print_value_on(outputStream* out) const {
1577   out->print("Base:"); _base->print(out);
1578   if (!_index->is_illegal()) {
1579     out->print(" Index:"); _index->print(out);
1580     switch (scale()) {
1581     case times_1: break;
1582     case times_2: out->print(" * 2"); break;
1583     case times_4: out->print(" * 4"); break;
1584     case times_8: out->print(" * 8"); break;
1585     }
1586   }
1587   out->print(" Disp: %d", _disp);
1588 }
1589 
1590 // debug output of block header without InstructionPrinter
1591 //       (because phi functions are not necessary for LIR)
1592 static void print_block(BlockBegin* x) {
1593   // print block id
1594   BlockEnd* end = x->end();
1595   tty->print("B%d ", x->block_id());
1596 
1597   // print flags
1598   if (x->is_set(BlockBegin::std_entry_flag))               tty->print("std ");
1599   if (x->is_set(BlockBegin::osr_entry_flag))               tty->print("osr ");
1600   if (x->is_set(BlockBegin::exception_entry_flag))         tty->print("ex ");
1601   if (x->is_set(BlockBegin::subroutine_entry_flag))        tty->print("jsr ");
1602   if (x->is_set(BlockBegin::backward_branch_target_flag))  tty->print("bb ");
1603   if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh ");
1604   if (x->is_set(BlockBegin::linear_scan_loop_end_flag))    tty->print("le ");
1605 
1606   // print block bci range
1607   tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci()));
1608 
1609   // print predecessors and successors
1610   if (x->number_of_preds() > 0) {
1611     tty->print("preds: ");
1612     for (int i = 0; i < x->number_of_preds(); i ++) {
1613       tty->print("B%d ", x->pred_at(i)->block_id());
1614     }
1615   }
1616 
1617   if (x->number_of_sux() > 0) {
1618     tty->print("sux: ");
1619     for (int i = 0; i < x->number_of_sux(); i ++) {
1620       tty->print("B%d ", x->sux_at(i)->block_id());
1621     }
1622   }
1623 
1624   // print exception handlers
1625   if (x->number_of_exception_handlers() > 0) {
1626     tty->print("xhandler: ");
1627     for (int i = 0; i < x->number_of_exception_handlers();  i++) {
1628       tty->print("B%d ", x->exception_handler_at(i)->block_id());
1629     }
1630   }
1631 
1632   tty->cr();
1633 }
1634 
1635 void print_LIR(BlockList* blocks) {
1636   tty->print_cr("LIR:");
1637   int i;
1638   for (i = 0; i < blocks->length(); i++) {
1639     BlockBegin* bb = blocks->at(i);
1640     print_block(bb);
1641     tty->print("__id_Instruction___________________________________________"); tty->cr();
1642     bb->lir()->print_instructions();
1643   }
1644 }
1645 
1646 void LIR_List::print_instructions() {
1647   for (int i = 0; i < _operations.length(); i++) {
1648     _operations.at(i)->print(); tty->cr();
1649   }
1650   tty->cr();
1651 }
1652 
1653 // LIR_Ops printing routines
1654 // LIR_Op
1655 void LIR_Op::print_on(outputStream* out) const {
1656   if (id() != -1 || PrintCFGToFile) {
1657     out->print("%4d ", id());
1658   } else {
1659     out->print("     ");
1660   }
1661   out->print(name()); out->print(" ");
1662   print_instr(out);
1663   if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci());
1664 #ifdef ASSERT
1665   if (Verbose && _file != NULL) {
1666     out->print(" (%s:%d)", _file, _line);
1667   }
1668 #endif
1669 }
1670 
1671 const char * LIR_Op::name() const {
1672   const char* s = NULL;
1673   switch(code()) {
1674      // LIR_Op0
1675      case lir_membar:                s = "membar";        break;
1676      case lir_membar_acquire:        s = "membar_acquire"; break;
1677      case lir_membar_release:        s = "membar_release"; break;
1678      case lir_membar_loadload:       s = "membar_loadload";   break;
1679      case lir_membar_storestore:     s = "membar_storestore"; break;
1680      case lir_membar_loadstore:      s = "membar_loadstore";  break;
1681      case lir_membar_storeload:      s = "membar_storeload";  break;
1682      case lir_word_align:            s = "word_align";    break;
1683      case lir_label:                 s = "label";         break;
1684      case lir_nop:                   s = "nop";           break;
1685      case lir_backwardbranch_target: s = "backbranch";    break;
1686      case lir_std_entry:             s = "std_entry";     break;
1687      case lir_osr_entry:             s = "osr_entry";     break;
1688      case lir_build_frame:           s = "build_frm";     break;
1689      case lir_fpop_raw:              s = "fpop_raw";      break;
1690      case lir_24bit_FPU:             s = "24bit_FPU";     break;
1691      case lir_reset_FPU:             s = "reset_FPU";     break;
1692      case lir_breakpoint:            s = "breakpoint";    break;
1693      case lir_get_thread:            s = "get_thread";    break;
1694      // LIR_Op1
1695      case lir_fxch:                  s = "fxch";          break;
1696      case lir_fld:                   s = "fld";           break;
1697      case lir_ffree:                 s = "ffree";         break;
1698      case lir_push:                  s = "push";          break;
1699      case lir_pop:                   s = "pop";           break;
1700      case lir_null_check:            s = "null_check";    break;
1701      case lir_return:                s = "return";        break;
1702      case lir_safepoint:             s = "safepoint";     break;
1703      case lir_neg:                   s = "neg";           break;
1704      case lir_leal:                  s = "leal";          break;
1705      case lir_branch:                s = "branch";        break;
1706      case lir_cond_float_branch:     s = "flt_cond_br";   break;
1707      case lir_move:                  s = "move";          break;
1708      case lir_roundfp:               s = "roundfp";       break;
1709      case lir_rtcall:                s = "rtcall";        break;
1710      case lir_throw:                 s = "throw";         break;
1711      case lir_unwind:                s = "unwind";        break;
1712      case lir_convert:               s = "convert";       break;
1713      case lir_alloc_object:          s = "alloc_obj";     break;
1714      case lir_monaddr:               s = "mon_addr";      break;
1715      case lir_pack64:                s = "pack64";        break;
1716      case lir_unpack64:              s = "unpack64";      break;
1717      // LIR_Op2
1718      case lir_cmp:                   s = "cmp";           break;
1719      case lir_cmp_l2i:               s = "cmp_l2i";       break;
1720      case lir_ucmp_fd2i:             s = "ucomp_fd2i";    break;
1721      case lir_cmp_fd2i:              s = "comp_fd2i";     break;
1722      case lir_cmove:                 s = "cmove";         break;
1723      case lir_add:                   s = "add";           break;
1724      case lir_sub:                   s = "sub";           break;
1725      case lir_mul:                   s = "mul";           break;
1726      case lir_mul_strictfp:          s = "mul_strictfp";  break;
1727      case lir_div:                   s = "div";           break;
1728      case lir_div_strictfp:          s = "div_strictfp";  break;
1729      case lir_rem:                   s = "rem";           break;
1730      case lir_abs:                   s = "abs";           break;
1731      case lir_sqrt:                  s = "sqrt";          break;
1732      case lir_sin:                   s = "sin";           break;
1733      case lir_cos:                   s = "cos";           break;
1734      case lir_tan:                   s = "tan";           break;
1735      case lir_log:                   s = "log";           break;
1736      case lir_log10:                 s = "log10";         break;
1737      case lir_exp:                   s = "exp";           break;
1738      case lir_pow:                   s = "pow";           break;
1739      case lir_logic_and:             s = "logic_and";     break;
1740      case lir_logic_or:              s = "logic_or";      break;
1741      case lir_logic_xor:             s = "logic_xor";     break;
1742      case lir_shl:                   s = "shift_left";    break;
1743      case lir_shr:                   s = "shift_right";   break;
1744      case lir_ushr:                  s = "ushift_right";  break;
1745      case lir_alloc_array:           s = "alloc_array";   break;
1746      case lir_xadd:                  s = "xadd";          break;
1747      case lir_xchg:                  s = "xchg";          break;
1748      // LIR_Op3
1749      case lir_idiv:                  s = "idiv";          break;
1750      case lir_irem:                  s = "irem";          break;
1751      // LIR_OpJavaCall
1752      case lir_static_call:           s = "static";        break;
1753      case lir_optvirtual_call:       s = "optvirtual";    break;
1754      case lir_icvirtual_call:        s = "icvirtual";     break;
1755      case lir_virtual_call:          s = "virtual";       break;
1756      case lir_dynamic_call:          s = "dynamic";       break;
1757      // LIR_OpArrayCopy
1758      case lir_arraycopy:             s = "arraycopy";     break;
1759      // LIR_OpLock
1760      case lir_lock:                  s = "lock";          break;
1761      case lir_unlock:                s = "unlock";        break;
1762      // LIR_OpDelay
1763      case lir_delay_slot:            s = "delay";         break;
1764      // LIR_OpTypeCheck
1765      case lir_instanceof:            s = "instanceof";    break;
1766      case lir_checkcast:             s = "checkcast";     break;
1767      case lir_store_check:           s = "store_check";   break;
1768      // LIR_OpCompareAndSwap
1769      case lir_cas_long:              s = "cas_long";      break;
1770      case lir_cas_obj:               s = "cas_obj";      break;
1771      case lir_cas_int:               s = "cas_int";      break;
1772      // LIR_OpProfileCall
1773      case lir_profile_call:          s = "profile_call";  break;
1774      case lir_none:                  ShouldNotReachHere();break;
1775     default:                         s = "illegal_op";    break;
1776   }
1777   return s;
1778 }
1779 
1780 // LIR_OpJavaCall
1781 void LIR_OpJavaCall::print_instr(outputStream* out) const {
1782   out->print("call: ");
1783   out->print("[addr: 0x%x]", address());
1784   if (receiver()->is_valid()) {
1785     out->print(" [recv: ");   receiver()->print(out);   out->print("]");
1786   }
1787   if (result_opr()->is_valid()) {
1788     out->print(" [result: "); result_opr()->print(out); out->print("]");
1789   }
1790 }
1791 
1792 // LIR_OpLabel
1793 void LIR_OpLabel::print_instr(outputStream* out) const {
1794   out->print("[label:0x%x]", _label);
1795 }
1796 
1797 // LIR_OpArrayCopy
1798 void LIR_OpArrayCopy::print_instr(outputStream* out) const {
1799   src()->print(out);     out->print(" ");
1800   src_pos()->print(out); out->print(" ");
1801   dst()->print(out);     out->print(" ");
1802   dst_pos()->print(out); out->print(" ");
1803   length()->print(out);  out->print(" ");
1804   tmp()->print(out);     out->print(" ");
1805 }
1806 
1807 // LIR_OpCompareAndSwap
1808 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
1809   addr()->print(out);      out->print(" ");
1810   cmp_value()->print(out); out->print(" ");
1811   new_value()->print(out); out->print(" ");
1812   tmp1()->print(out);      out->print(" ");
1813   tmp2()->print(out);      out->print(" ");
1814 
1815 }
1816 
1817 // LIR_Op0
1818 void LIR_Op0::print_instr(outputStream* out) const {
1819   result_opr()->print(out);
1820 }
1821 
1822 // LIR_Op1
1823 const char * LIR_Op1::name() const {
1824   if (code() == lir_move) {
1825     switch (move_kind()) {
1826     case lir_move_normal:
1827       return "move";
1828     case lir_move_unaligned:
1829       return "unaligned move";
1830     case lir_move_volatile:
1831       return "volatile_move";
1832     case lir_move_wide:
1833       return "wide_move";
1834     default:
1835       ShouldNotReachHere();
1836     return "illegal_op";
1837     }
1838   } else {
1839     return LIR_Op::name();
1840   }
1841 }
1842 
1843 
1844 void LIR_Op1::print_instr(outputStream* out) const {
1845   _opr->print(out);         out->print(" ");
1846   result_opr()->print(out); out->print(" ");
1847   print_patch_code(out, patch_code());
1848 }
1849 
1850 
1851 // LIR_Op1
1852 void LIR_OpRTCall::print_instr(outputStream* out) const {
1853   intx a = (intx)addr();
1854   out->print(Runtime1::name_for_address(addr()));
1855   out->print(" ");
1856   tmp()->print(out);
1857 }
1858 
1859 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
1860   switch(code) {
1861     case lir_patch_none:                                 break;
1862     case lir_patch_low:    out->print("[patch_low]");    break;
1863     case lir_patch_high:   out->print("[patch_high]");   break;
1864     case lir_patch_normal: out->print("[patch_normal]"); break;
1865     default: ShouldNotReachHere();
1866   }
1867 }
1868 
1869 // LIR_OpBranch
1870 void LIR_OpBranch::print_instr(outputStream* out) const {
1871   print_condition(out, cond());             out->print(" ");
1872   if (block() != NULL) {
1873     out->print("[B%d] ", block()->block_id());
1874   } else if (stub() != NULL) {
1875     out->print("[");
1876     stub()->print_name(out);
1877     out->print(": 0x%x]", stub());
1878     if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci());
1879   } else {
1880     out->print("[label:0x%x] ", label());
1881   }
1882   if (ublock() != NULL) {
1883     out->print("unordered: [B%d] ", ublock()->block_id());
1884   }
1885 }
1886 
1887 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
1888   switch(cond) {
1889     case lir_cond_equal:           out->print("[EQ]");      break;
1890     case lir_cond_notEqual:        out->print("[NE]");      break;
1891     case lir_cond_less:            out->print("[LT]");      break;
1892     case lir_cond_lessEqual:       out->print("[LE]");      break;
1893     case lir_cond_greaterEqual:    out->print("[GE]");      break;
1894     case lir_cond_greater:         out->print("[GT]");      break;
1895     case lir_cond_belowEqual:      out->print("[BE]");      break;
1896     case lir_cond_aboveEqual:      out->print("[AE]");      break;
1897     case lir_cond_always:          out->print("[AL]");      break;
1898     default:                       out->print("[%d]",cond); break;
1899   }
1900 }
1901 
1902 // LIR_OpConvert
1903 void LIR_OpConvert::print_instr(outputStream* out) const {
1904   print_bytecode(out, bytecode());
1905   in_opr()->print(out);                  out->print(" ");
1906   result_opr()->print(out);              out->print(" ");
1907 #ifdef PPC
1908   if(tmp1()->is_valid()) {
1909     tmp1()->print(out); out->print(" ");
1910     tmp2()->print(out); out->print(" ");
1911   }
1912 #endif
1913 }
1914 
1915 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
1916   switch(code) {
1917     case Bytecodes::_d2f: out->print("[d2f] "); break;
1918     case Bytecodes::_d2i: out->print("[d2i] "); break;
1919     case Bytecodes::_d2l: out->print("[d2l] "); break;
1920     case Bytecodes::_f2d: out->print("[f2d] "); break;
1921     case Bytecodes::_f2i: out->print("[f2i] "); break;
1922     case Bytecodes::_f2l: out->print("[f2l] "); break;
1923     case Bytecodes::_i2b: out->print("[i2b] "); break;
1924     case Bytecodes::_i2c: out->print("[i2c] "); break;
1925     case Bytecodes::_i2d: out->print("[i2d] "); break;
1926     case Bytecodes::_i2f: out->print("[i2f] "); break;
1927     case Bytecodes::_i2l: out->print("[i2l] "); break;
1928     case Bytecodes::_i2s: out->print("[i2s] "); break;
1929     case Bytecodes::_l2i: out->print("[l2i] "); break;
1930     case Bytecodes::_l2f: out->print("[l2f] "); break;
1931     case Bytecodes::_l2d: out->print("[l2d] "); break;
1932     default:
1933       out->print("[?%d]",code);
1934     break;
1935   }
1936 }
1937 
1938 void LIR_OpAllocObj::print_instr(outputStream* out) const {
1939   klass()->print(out);                      out->print(" ");
1940   obj()->print(out);                        out->print(" ");
1941   tmp1()->print(out);                       out->print(" ");
1942   tmp2()->print(out);                       out->print(" ");
1943   tmp3()->print(out);                       out->print(" ");
1944   tmp4()->print(out);                       out->print(" ");
1945   out->print("[hdr:%d]", header_size()); out->print(" ");
1946   out->print("[obj:%d]", object_size()); out->print(" ");
1947   out->print("[lbl:0x%x]", stub()->entry());
1948 }
1949 
1950 void LIR_OpRoundFP::print_instr(outputStream* out) const {
1951   _opr->print(out);         out->print(" ");
1952   tmp()->print(out);        out->print(" ");
1953   result_opr()->print(out); out->print(" ");
1954 }
1955 
1956 // LIR_Op2
1957 void LIR_Op2::print_instr(outputStream* out) const {
1958   if (code() == lir_cmove) {
1959     print_condition(out, condition());         out->print(" ");
1960   }
1961   in_opr1()->print(out);    out->print(" ");
1962   in_opr2()->print(out);    out->print(" ");
1963   if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out);    out->print(" "); }
1964   if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out);    out->print(" "); }
1965   if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out);    out->print(" "); }
1966   if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out);    out->print(" "); }
1967   if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out);    out->print(" "); }
1968   result_opr()->print(out);
1969 }
1970 
1971 void LIR_OpAllocArray::print_instr(outputStream* out) const {
1972   klass()->print(out);                   out->print(" ");
1973   len()->print(out);                     out->print(" ");
1974   obj()->print(out);                     out->print(" ");
1975   tmp1()->print(out);                    out->print(" ");
1976   tmp2()->print(out);                    out->print(" ");
1977   tmp3()->print(out);                    out->print(" ");
1978   tmp4()->print(out);                    out->print(" ");
1979   out->print("[type:0x%x]", type());     out->print(" ");
1980   out->print("[label:0x%x]", stub()->entry());
1981 }
1982 
1983 
1984 void LIR_OpTypeCheck::print_instr(outputStream* out) const {
1985   object()->print(out);                  out->print(" ");
1986   if (code() == lir_store_check) {
1987     array()->print(out);                 out->print(" ");
1988   }
1989   if (code() != lir_store_check) {
1990     klass()->print_name_on(out);         out->print(" ");
1991     if (fast_check())                 out->print("fast_check ");
1992   }
1993   tmp1()->print(out);                    out->print(" ");
1994   tmp2()->print(out);                    out->print(" ");
1995   tmp3()->print(out);                    out->print(" ");
1996   result_opr()->print(out);              out->print(" ");
1997   if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci());
1998 }
1999 
2000 
2001 // LIR_Op3
2002 void LIR_Op3::print_instr(outputStream* out) const {
2003   in_opr1()->print(out);    out->print(" ");
2004   in_opr2()->print(out);    out->print(" ");
2005   in_opr3()->print(out);    out->print(" ");
2006   result_opr()->print(out);
2007 }
2008 
2009 
2010 void LIR_OpLock::print_instr(outputStream* out) const {
2011   hdr_opr()->print(out);   out->print(" ");
2012   obj_opr()->print(out);   out->print(" ");
2013   lock_opr()->print(out);  out->print(" ");
2014   if (_scratch->is_valid()) {
2015     _scratch->print(out);  out->print(" ");
2016   }
2017   out->print("[lbl:0x%x]", stub()->entry());
2018 }
2019 
2020 
2021 void LIR_OpDelay::print_instr(outputStream* out) const {
2022   _op->print_on(out);
2023 }
2024 
2025 
2026 // LIR_OpProfileCall
2027 void LIR_OpProfileCall::print_instr(outputStream* out) const {
2028   profiled_method()->name()->print_symbol_on(out);
2029   out->print(".");
2030   profiled_method()->holder()->name()->print_symbol_on(out);
2031   out->print(" @ %d ", profiled_bci());
2032   mdo()->print(out);           out->print(" ");
2033   recv()->print(out);          out->print(" ");
2034   tmp1()->print(out);          out->print(" ");
2035 }
2036 
2037 #endif // PRODUCT
2038 
2039 // Implementation of LIR_InsertionBuffer
2040 
2041 void LIR_InsertionBuffer::append(int index, LIR_Op* op) {
2042   assert(_index_and_count.length() % 2 == 0, "must have a count for each index");
2043 
2044   int i = number_of_insertion_points() - 1;
2045   if (i < 0 || index_at(i) < index) {
2046     append_new(index, 1);
2047   } else {
2048     assert(index_at(i) == index, "can append LIR_Ops in ascending order only");
2049     assert(count_at(i) > 0, "check");
2050     set_count_at(i, count_at(i) + 1);
2051   }
2052   _ops.push(op);
2053 
2054   DEBUG_ONLY(verify());
2055 }
2056 
2057 #ifdef ASSERT
2058 void LIR_InsertionBuffer::verify() {
2059   int sum = 0;
2060   int prev_idx = -1;
2061 
2062   for (int i = 0; i < number_of_insertion_points(); i++) {
2063     assert(prev_idx < index_at(i), "index must be ordered ascending");
2064     sum += count_at(i);
2065   }
2066   assert(sum == number_of_ops(), "wrong total sum");
2067 }
2068 #endif