616 // LIR_Op2
617 case lir_cmp:
618 case lir_cmp_l2i:
619 case lir_ucmp_fd2i:
620 case lir_cmp_fd2i:
621 case lir_add:
622 case lir_sub:
623 case lir_mul:
624 case lir_div:
625 case lir_rem:
626 case lir_sqrt:
627 case lir_abs:
628 case lir_logic_and:
629 case lir_logic_or:
630 case lir_logic_xor:
631 case lir_shl:
632 case lir_shr:
633 case lir_ushr:
634 case lir_xadd:
635 case lir_xchg:
636 {
637 assert(op->as_Op2() != NULL, "must be");
638 LIR_Op2* op2 = (LIR_Op2*)op;
639 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
640 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
641
642 if (op2->_info) do_info(op2->_info);
643 if (op2->_opr1->is_valid()) do_input(op2->_opr1);
644 if (op2->_opr2->is_valid()) do_input(op2->_opr2);
645 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
646 if (op2->_result->is_valid()) do_output(op2->_result);
647 if (op->code() == lir_xchg || op->code() == lir_xadd) {
648 // on ARM and PPC, return value is loaded first so could
649 // destroy inputs. On other platforms that implement those
650 // (x86, sparc), the extra constrainsts are harmless.
651 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
652 if (op2->_opr2->is_valid()) do_temp(op2->_opr2);
653 }
654
655 break;
1095 if (stub()) {
1096 masm->emit_code_stub(stub());
1097 }
1098 }
1099
1100 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
1101 masm->emit_compare_and_swap(this);
1102 }
1103
1104 void LIR_Op3::emit_code(LIR_Assembler* masm) {
1105 masm->emit_op3(this);
1106 }
1107
1108 void LIR_OpLock::emit_code(LIR_Assembler* masm) {
1109 masm->emit_lock(this);
1110 if (stub()) {
1111 masm->emit_code_stub(stub());
1112 }
1113 }
1114
1115
1116 void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
1117 masm->emit_delay(this);
1118 }
1119
1120 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
1121 masm->emit_profile_call(this);
1122 }
1123
1124 // LIR_List
1125 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
1126 : _operations(8)
1127 , _compilation(compilation)
1128 #ifndef PRODUCT
1129 , _block(block)
1130 #endif
1131 #ifdef ASSERT
1132 , _file(NULL)
1133 , _line(0)
1134 #endif
1754 case lir_icvirtual_call: s = "icvirtual"; break;
1755 case lir_virtual_call: s = "virtual"; break;
1756 case lir_dynamic_call: s = "dynamic"; break;
1757 // LIR_OpArrayCopy
1758 case lir_arraycopy: s = "arraycopy"; break;
1759 // LIR_OpLock
1760 case lir_lock: s = "lock"; break;
1761 case lir_unlock: s = "unlock"; break;
1762 // LIR_OpDelay
1763 case lir_delay_slot: s = "delay"; break;
1764 // LIR_OpTypeCheck
1765 case lir_instanceof: s = "instanceof"; break;
1766 case lir_checkcast: s = "checkcast"; break;
1767 case lir_store_check: s = "store_check"; break;
1768 // LIR_OpCompareAndSwap
1769 case lir_cas_long: s = "cas_long"; break;
1770 case lir_cas_obj: s = "cas_obj"; break;
1771 case lir_cas_int: s = "cas_int"; break;
1772 // LIR_OpProfileCall
1773 case lir_profile_call: s = "profile_call"; break;
1774 case lir_none: ShouldNotReachHere();break;
1775 default: s = "illegal_op"; break;
1776 }
1777 return s;
1778 }
1779
1780 // LIR_OpJavaCall
1781 void LIR_OpJavaCall::print_instr(outputStream* out) const {
1782 out->print("call: ");
1783 out->print("[addr: 0x%x]", address());
1784 if (receiver()->is_valid()) {
1785 out->print(" [recv: "); receiver()->print(out); out->print("]");
1786 }
1787 if (result_opr()->is_valid()) {
1788 out->print(" [result: "); result_opr()->print(out); out->print("]");
1789 }
1790 }
1791
1792 // LIR_OpLabel
1793 void LIR_OpLabel::print_instr(outputStream* out) const {
1998 }
1999
2000
2001 // LIR_Op3
2002 void LIR_Op3::print_instr(outputStream* out) const {
2003 in_opr1()->print(out); out->print(" ");
2004 in_opr2()->print(out); out->print(" ");
2005 in_opr3()->print(out); out->print(" ");
2006 result_opr()->print(out);
2007 }
2008
2009
2010 void LIR_OpLock::print_instr(outputStream* out) const {
2011 hdr_opr()->print(out); out->print(" ");
2012 obj_opr()->print(out); out->print(" ");
2013 lock_opr()->print(out); out->print(" ");
2014 if (_scratch->is_valid()) {
2015 _scratch->print(out); out->print(" ");
2016 }
2017 out->print("[lbl:0x%x]", stub()->entry());
2018 }
2019
2020
2021 void LIR_OpDelay::print_instr(outputStream* out) const {
2022 _op->print_on(out);
2023 }
2024
2025
2026 // LIR_OpProfileCall
2027 void LIR_OpProfileCall::print_instr(outputStream* out) const {
2028 profiled_method()->name()->print_symbol_on(out);
2029 out->print(".");
2030 profiled_method()->holder()->name()->print_symbol_on(out);
2031 out->print(" @ %d ", profiled_bci());
2032 mdo()->print(out); out->print(" ");
2033 recv()->print(out); out->print(" ");
2034 tmp1()->print(out); out->print(" ");
2035 }
2036
2037 #endif // PRODUCT
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616 // LIR_Op2
617 case lir_cmp:
618 case lir_cmp_l2i:
619 case lir_ucmp_fd2i:
620 case lir_cmp_fd2i:
621 case lir_add:
622 case lir_sub:
623 case lir_mul:
624 case lir_div:
625 case lir_rem:
626 case lir_sqrt:
627 case lir_abs:
628 case lir_logic_and:
629 case lir_logic_or:
630 case lir_logic_xor:
631 case lir_shl:
632 case lir_shr:
633 case lir_ushr:
634 case lir_xadd:
635 case lir_xchg:
636 case lir_assert:
637 {
638 assert(op->as_Op2() != NULL, "must be");
639 LIR_Op2* op2 = (LIR_Op2*)op;
640 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
641 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
642
643 if (op2->_info) do_info(op2->_info);
644 if (op2->_opr1->is_valid()) do_input(op2->_opr1);
645 if (op2->_opr2->is_valid()) do_input(op2->_opr2);
646 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
647 if (op2->_result->is_valid()) do_output(op2->_result);
648 if (op->code() == lir_xchg || op->code() == lir_xadd) {
649 // on ARM and PPC, return value is loaded first so could
650 // destroy inputs. On other platforms that implement those
651 // (x86, sparc), the extra constrainsts are harmless.
652 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
653 if (op2->_opr2->is_valid()) do_temp(op2->_opr2);
654 }
655
656 break;
1096 if (stub()) {
1097 masm->emit_code_stub(stub());
1098 }
1099 }
1100
1101 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
1102 masm->emit_compare_and_swap(this);
1103 }
1104
1105 void LIR_Op3::emit_code(LIR_Assembler* masm) {
1106 masm->emit_op3(this);
1107 }
1108
1109 void LIR_OpLock::emit_code(LIR_Assembler* masm) {
1110 masm->emit_lock(this);
1111 if (stub()) {
1112 masm->emit_code_stub(stub());
1113 }
1114 }
1115
1116 #ifndef PRODUCT
1117 void LIR_OpAssert::emit_code(LIR_Assembler* masm) {
1118 masm->emit_assert(this);
1119 }
1120 #endif
1121
1122 void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
1123 masm->emit_delay(this);
1124 }
1125
1126 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
1127 masm->emit_profile_call(this);
1128 }
1129
1130 // LIR_List
1131 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
1132 : _operations(8)
1133 , _compilation(compilation)
1134 #ifndef PRODUCT
1135 , _block(block)
1136 #endif
1137 #ifdef ASSERT
1138 , _file(NULL)
1139 , _line(0)
1140 #endif
1760 case lir_icvirtual_call: s = "icvirtual"; break;
1761 case lir_virtual_call: s = "virtual"; break;
1762 case lir_dynamic_call: s = "dynamic"; break;
1763 // LIR_OpArrayCopy
1764 case lir_arraycopy: s = "arraycopy"; break;
1765 // LIR_OpLock
1766 case lir_lock: s = "lock"; break;
1767 case lir_unlock: s = "unlock"; break;
1768 // LIR_OpDelay
1769 case lir_delay_slot: s = "delay"; break;
1770 // LIR_OpTypeCheck
1771 case lir_instanceof: s = "instanceof"; break;
1772 case lir_checkcast: s = "checkcast"; break;
1773 case lir_store_check: s = "store_check"; break;
1774 // LIR_OpCompareAndSwap
1775 case lir_cas_long: s = "cas_long"; break;
1776 case lir_cas_obj: s = "cas_obj"; break;
1777 case lir_cas_int: s = "cas_int"; break;
1778 // LIR_OpProfileCall
1779 case lir_profile_call: s = "profile_call"; break;
1780 // LIR_OpAssert
1781 case lir_assert: s = "assert"; break;
1782 case lir_none: ShouldNotReachHere();break;
1783 default: s = "illegal_op"; break;
1784 }
1785 return s;
1786 }
1787
1788 // LIR_OpJavaCall
1789 void LIR_OpJavaCall::print_instr(outputStream* out) const {
1790 out->print("call: ");
1791 out->print("[addr: 0x%x]", address());
1792 if (receiver()->is_valid()) {
1793 out->print(" [recv: "); receiver()->print(out); out->print("]");
1794 }
1795 if (result_opr()->is_valid()) {
1796 out->print(" [result: "); result_opr()->print(out); out->print("]");
1797 }
1798 }
1799
1800 // LIR_OpLabel
1801 void LIR_OpLabel::print_instr(outputStream* out) const {
2006 }
2007
2008
2009 // LIR_Op3
2010 void LIR_Op3::print_instr(outputStream* out) const {
2011 in_opr1()->print(out); out->print(" ");
2012 in_opr2()->print(out); out->print(" ");
2013 in_opr3()->print(out); out->print(" ");
2014 result_opr()->print(out);
2015 }
2016
2017
2018 void LIR_OpLock::print_instr(outputStream* out) const {
2019 hdr_opr()->print(out); out->print(" ");
2020 obj_opr()->print(out); out->print(" ");
2021 lock_opr()->print(out); out->print(" ");
2022 if (_scratch->is_valid()) {
2023 _scratch->print(out); out->print(" ");
2024 }
2025 out->print("[lbl:0x%x]", stub()->entry());
2026 }
2027
2028 void LIR_OpAssert::print_instr(outputStream* out) const {
2029 print_condition(out, condition()); out->print(" ");
2030 in_opr1()->print(out); out->print(" ");
2031 in_opr2()->print(out); out->print(", \"");
2032 out->print(msg()); out->print("\"");
2033 }
2034
2035
2036 void LIR_OpDelay::print_instr(outputStream* out) const {
2037 _op->print_on(out);
2038 }
2039
2040
2041 // LIR_OpProfileCall
2042 void LIR_OpProfileCall::print_instr(outputStream* out) const {
2043 profiled_method()->name()->print_symbol_on(out);
2044 out->print(".");
2045 profiled_method()->holder()->name()->print_symbol_on(out);
2046 out->print(" @ %d ", profiled_bci());
2047 mdo()->print(out); out->print(" ");
2048 recv()->print(out); out->print(" ");
2049 tmp1()->print(out); out->print(" ");
2050 }
2051
2052 #endif // PRODUCT
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