*** old/src/cpu/sparc/vm/interp_masm_sparc.cpp	Mon Mar  3 22:46:20 2014
--- new/src/cpu/sparc/vm/interp_masm_sparc.cpp	Mon Mar  3 22:46:20 2014

*** 2495,2504 ****
--- 2495,2522 ----
  
  
  void InterpreterMacroAssembler::verify_FPU(int stack_depth, TosState state) {
    if (state == ftos || state == dtos) MacroAssembler::verify_FPU(stack_depth);
  }
+ 
+ 
+ // Jump if ((*counter_addr += increment) & mask) satisfies the condition.
+ void InterpreterMacroAssembler::increment_mask_and_jump(Address counter_addr,
+                                                         int increment, int mask,
+                                                         Register scratch1, Register scratch2,
+                                                         Condition cond, Label *where) {
+   ld(counter_addr, scratch1);
+   add(scratch1, increment, scratch1);
+   if (is_simm13(mask)) {
+     andcc(scratch1, mask, G0);
+   } else {
+     set(mask, scratch2);
+     andcc(scratch1, scratch2,  G0);
+   }
+   br(cond, false, Assembler::pn, *where);
+   delayed()->st(scratch1, counter_addr);
+ }
  #endif /* CC_INTERP */
  
  // Inline assembly for:
  //
  // if (thread is in interp_only_mode) {

*** 2644,2665 ****
--- 2662,2666 ----
    } else {
      pop(state);
    }
  #endif // CC_INTERP
  }
  
  // Jump if ((*counter_addr += increment) & mask) satisfies the condition.
  void InterpreterMacroAssembler::increment_mask_and_jump(Address counter_addr,
                                                          int increment, int mask,
                                                          Register scratch1, Register scratch2,
                                                          Condition cond, Label *where) {
    ld(counter_addr, scratch1);
    add(scratch1, increment, scratch1);
    if (is_simm13(mask)) {
      andcc(scratch1, mask, G0);
    } else {
      set(mask, scratch2);
      andcc(scratch1, scratch2,  G0);
    }
    br(cond, false, Assembler::pn, *where);
    delayed()->st(scratch1, counter_addr);
  }