src/cpu/x86/vm/interp_masm_x86_32.cpp
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*** old/src/cpu/x86/vm/interp_masm_x86_32.cpp Mon Mar 3 22:46:20 2014
--- new/src/cpu/x86/vm/interp_masm_x86_32.cpp Mon Mar 3 22:46:20 2014
*** 264,287 ****
--- 264,273 ----
// skip past the header
addptr(cache, in_bytes(ConstantPoolCache::base_offset()));
addptr(cache, tmp); // construct pointer to cache entry
}
void InterpreterMacroAssembler::get_method_counters(Register method,
Register mcs, Label& skip) {
Label has_counters;
movptr(mcs, Address(method, Method::method_counters_offset()));
testptr(mcs, mcs);
jcc(Assembler::notZero, has_counters);
call_VM(noreg, CAST_FROM_FN_PTR(address,
InterpreterRuntime::build_method_counters), method);
movptr(mcs, Address(method,Method::method_counters_offset()));
testptr(mcs, mcs);
jcc(Assembler::zero, skip); // No MethodCounters allocated, OutOfMemory
bind(has_counters);
}
// Load object from cpool->resolved_references(index)
void InterpreterMacroAssembler::load_resolved_reference_at_index(
Register result, Register index) {
assert_different_registers(result, index);
// convert from field index to resolved_references() index and from
*** 676,685 ****
--- 662,685 ----
}
}
#endif /* !CC_INTERP */
+ void InterpreterMacroAssembler::get_method_counters(Register method,
+ Register mcs, Label& skip) {
+ Label has_counters;
+ movptr(mcs, Address(method, Method::method_counters_offset()));
+ testptr(mcs, mcs);
+ jcc(Assembler::notZero, has_counters);
+ call_VM(noreg, CAST_FROM_FN_PTR(address,
+ InterpreterRuntime::build_method_counters), method);
+ movptr(mcs, Address(method,Method::method_counters_offset()));
+ testptr(mcs, mcs);
+ jcc(Assembler::zero, skip); // No MethodCounters allocated, OutOfMemory
+ bind(has_counters);
+ }
+
// Lock object
//
// Argument: rdx : Points to BasicObjectLock to be used for locking. Must
// be initialized with object to lock
*** 1357,1366 ****
--- 1357,1379 ----
#ifndef CC_INTERP
void InterpreterMacroAssembler::verify_FPU(int stack_depth, TosState state) {
if (state == ftos || state == dtos) MacroAssembler::verify_FPU(stack_depth);
}
+ // Jump if ((*counter_addr += increment) & mask) satisfies the condition.
+ void InterpreterMacroAssembler::increment_mask_and_jump(Address counter_addr,
+ int increment, int mask,
+ Register scratch, bool preloaded,
+ Condition cond, Label* where) {
+ if (!preloaded) {
+ movl(scratch, counter_addr);
+ }
+ incrementl(scratch, increment);
+ movl(counter_addr, scratch);
+ andl(scratch, mask);
+ jcc(cond, *where);
+ }
#endif /* CC_INTERP */
void InterpreterMacroAssembler::notify_method_entry() {
// Whenever JVMTI is interp_only_mode, method entry/exit events are sent to
*** 1428,1446 ****
--- 1441,1445 ----
CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
rbx, rcx);
NOT_CC_INTERP(pop(state));
}
}
// Jump if ((*counter_addr += increment) & mask) satisfies the condition.
void InterpreterMacroAssembler::increment_mask_and_jump(Address counter_addr,
int increment, int mask,
Register scratch, bool preloaded,
Condition cond, Label* where) {
if (!preloaded) {
movl(scratch, counter_addr);
}
incrementl(scratch, increment);
movl(counter_addr, scratch);
andl(scratch, mask);
jcc(cond, *where);
}
src/cpu/x86/vm/interp_masm_x86_32.cpp
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