1 /*
2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "memory/allocation.inline.hpp"
27 #include "opto/addnode.hpp"
28 #include "opto/connode.hpp"
29 #include "opto/convertnode.hpp"
30 #include "opto/memnode.hpp"
31 #include "opto/mulnode.hpp"
32 #include "opto/phaseX.hpp"
33 #include "opto/subnode.hpp"
34
35 // Portions of code courtesy of Clifford Click
36
37
38 //=============================================================================
39 //------------------------------hash-------------------------------------------
40 // Hash function over MulNodes. Needs to be commutative; i.e., I swap
41 // (commute) inputs to MulNodes willy-nilly so the hash function must return
42 // the same value in the presence of edge swapping.
43 uint MulNode::hash() const {
44 return (uintptr_t)in(1) + (uintptr_t)in(2) + Opcode();
45 }
46
47 //------------------------------Identity---------------------------------------
48 // Multiplying a one preserves the other argument
49 Node* MulNode::Identity(PhaseGVN* phase) {
50 register const Type *one = mul_id(); // The multiplicative identity
51 if( phase->type( in(1) )->higher_equal( one ) ) return in(2);
52 if( phase->type( in(2) )->higher_equal( one ) ) return in(1);
53
54 return this;
55 }
56
57 //------------------------------Ideal------------------------------------------
58 // We also canonicalize the Node, moving constants to the right input,
59 // and flatten expressions (so that 1+x+2 becomes x+3).
60 Node *MulNode::Ideal(PhaseGVN *phase, bool can_reshape) {
61 const Type *t1 = phase->type( in(1) );
62 const Type *t2 = phase->type( in(2) );
63 Node *progress = NULL; // Progress flag
64 // We are OK if right is a constant, or right is a load and
65 // left is a non-constant.
66 if( !(t2->singleton() ||
67 (in(2)->is_Load() && !(t1->singleton() || in(1)->is_Load())) ) ) {
68 if( t1->singleton() || // Left input is a constant?
69 // Otherwise, sort inputs (commutativity) to help value numbering.
70 (in(1)->_idx > in(2)->_idx) ) {
71 swap_edges(1, 2);
72 const Type *t = t1;
73 t1 = t2;
74 t2 = t;
75 progress = this; // Made progress
76 }
77 }
78
79 // If the right input is a constant, and the left input is a product of a
80 // constant, flatten the expression tree.
81 uint op = Opcode();
82 if( t2->singleton() && // Right input is a constant?
83 op != Op_MulF && // Float & double cannot reassociate
84 op != Op_MulD ) {
85 if( t2 == Type::TOP ) return NULL;
86 Node *mul1 = in(1);
87 #ifdef ASSERT
88 // Check for dead loop
89 int op1 = mul1->Opcode();
90 if( phase->eqv( mul1, this ) || phase->eqv( in(2), this ) ||
91 ( op1 == mul_opcode() || op1 == add_opcode() ) &&
92 ( phase->eqv( mul1->in(1), this ) || phase->eqv( mul1->in(2), this ) ||
93 phase->eqv( mul1->in(1), mul1 ) || phase->eqv( mul1->in(2), mul1 ) ) )
94 assert(false, "dead loop in MulNode::Ideal");
95 #endif
96
97 if( mul1->Opcode() == mul_opcode() ) { // Left input is a multiply?
98 // Mul of a constant?
99 const Type *t12 = phase->type( mul1->in(2) );
100 if( t12->singleton() && t12 != Type::TOP) { // Left input is an add of a constant?
101 // Compute new constant; check for overflow
102 const Type *tcon01 = ((MulNode*)mul1)->mul_ring(t2,t12);
103 if( tcon01->singleton() ) {
104 // The Mul of the flattened expression
105 set_req(1, mul1->in(1));
106 set_req(2, phase->makecon( tcon01 ));
107 t2 = tcon01;
108 progress = this; // Made progress
109 }
110 }
111 }
112 // If the right input is a constant, and the left input is an add of a
113 // constant, flatten the tree: (X+con1)*con0 ==> X*con0 + con1*con0
114 const Node *add1 = in(1);
115 if( add1->Opcode() == add_opcode() ) { // Left input is an add?
116 // Add of a constant?
117 const Type *t12 = phase->type( add1->in(2) );
118 if( t12->singleton() && t12 != Type::TOP ) { // Left input is an add of a constant?
119 assert( add1->in(1) != add1, "dead loop in MulNode::Ideal" );
120 // Compute new constant; check for overflow
121 const Type *tcon01 = mul_ring(t2,t12);
122 if( tcon01->singleton() ) {
123
124 // Convert (X+con1)*con0 into X*con0
125 Node *mul = clone(); // mul = ()*con0
126 mul->set_req(1,add1->in(1)); // mul = X*con0
127 mul = phase->transform(mul);
128
129 Node *add2 = add1->clone();
130 add2->set_req(1, mul); // X*con0 + con0*con1
131 add2->set_req(2, phase->makecon(tcon01) );
132 progress = add2;
133 }
134 }
135 } // End of is left input an add
136 } // End of is right input a Mul
137
138 return progress;
139 }
140
141 //------------------------------Value-----------------------------------------
142 const Type* MulNode::Value(PhaseGVN* phase) const {
143 const Type *t1 = phase->type( in(1) );
144 const Type *t2 = phase->type( in(2) );
145 // Either input is TOP ==> the result is TOP
146 if( t1 == Type::TOP ) return Type::TOP;
147 if( t2 == Type::TOP ) return Type::TOP;
148
149 // Either input is ZERO ==> the result is ZERO.
150 // Not valid for floats or doubles since +0.0 * -0.0 --> +0.0
151 int op = Opcode();
152 if( op == Op_MulI || op == Op_AndI || op == Op_MulL || op == Op_AndL ) {
153 const Type *zero = add_id(); // The multiplicative zero
154 if( t1->higher_equal( zero ) ) return zero;
155 if( t2->higher_equal( zero ) ) return zero;
156 }
157
158 // Either input is BOTTOM ==> the result is the local BOTTOM
159 if( t1 == Type::BOTTOM || t2 == Type::BOTTOM )
160 return bottom_type();
161
162 #if defined(IA32)
163 // Can't trust native compilers to properly fold strict double
164 // multiplication with round-to-zero on this platform.
165 if (op == Op_MulD && phase->C->method()->is_strict()) {
166 return TypeD::DOUBLE;
167 }
168 #endif
169
170 return mul_ring(t1,t2); // Local flavor of type multiplication
171 }
172
173
174 //=============================================================================
175 //------------------------------Ideal------------------------------------------
176 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
177 Node *MulINode::Ideal(PhaseGVN *phase, bool can_reshape) {
178 // Swap constant to right
179 jint con;
180 if ((con = in(1)->find_int_con(0)) != 0) {
181 swap_edges(1, 2);
182 // Finish rest of method to use info in 'con'
183 } else if ((con = in(2)->find_int_con(0)) == 0) {
184 return MulNode::Ideal(phase, can_reshape);
185 }
186
187 // Now we have a constant Node on the right and the constant in con
188 if( con == 0 ) return NULL; // By zero is handled by Value call
189 if( con == 1 ) return NULL; // By one is handled by Identity call
190
191 // Check for negative constant; if so negate the final result
192 bool sign_flip = false;
193 if( con < 0 ) {
194 con = -con;
195 sign_flip = true;
196 }
197
198 // Get low bit; check for being the only bit
199 Node *res = NULL;
200 jint bit1 = con & -con; // Extract low bit
201 if( bit1 == con ) { // Found a power of 2?
202 res = new LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) );
203 } else {
204
205 // Check for constant with 2 bits set
206 jint bit2 = con-bit1;
207 bit2 = bit2 & -bit2; // Extract 2nd bit
208 if( bit2 + bit1 == con ) { // Found all bits in con?
209 Node *n1 = phase->transform( new LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ) );
210 Node *n2 = phase->transform( new LShiftINode( in(1), phase->intcon(log2_intptr(bit2)) ) );
211 res = new AddINode( n2, n1 );
212
213 } else if (is_power_of_2(con+1)) {
214 // Sleezy: power-of-2 -1. Next time be generic.
215 jint temp = (jint) (con + 1);
216 Node *n1 = phase->transform( new LShiftINode( in(1), phase->intcon(log2_intptr(temp)) ) );
217 res = new SubINode( n1, in(1) );
218 } else {
219 return MulNode::Ideal(phase, can_reshape);
220 }
221 }
222
223 if( sign_flip ) { // Need to negate result?
224 res = phase->transform(res);// Transform, before making the zero con
225 res = new SubINode(phase->intcon(0),res);
226 }
227
228 return res; // Return final result
229 }
230
231 //------------------------------mul_ring---------------------------------------
232 // Compute the product type of two integer ranges into this node.
233 const Type *MulINode::mul_ring(const Type *t0, const Type *t1) const {
234 const TypeInt *r0 = t0->is_int(); // Handy access
235 const TypeInt *r1 = t1->is_int();
236
237 // Fetch endpoints of all ranges
238 int32_t lo0 = r0->_lo;
239 double a = (double)lo0;
240 int32_t hi0 = r0->_hi;
241 double b = (double)hi0;
242 int32_t lo1 = r1->_lo;
243 double c = (double)lo1;
244 int32_t hi1 = r1->_hi;
245 double d = (double)hi1;
246
247 // Compute all endpoints & check for overflow
248 int32_t A = java_multiply(lo0, lo1);
249 if( (double)A != a*c ) return TypeInt::INT; // Overflow?
250 int32_t B = java_multiply(lo0, hi1);
251 if( (double)B != a*d ) return TypeInt::INT; // Overflow?
252 int32_t C = java_multiply(hi0, lo1);
253 if( (double)C != b*c ) return TypeInt::INT; // Overflow?
254 int32_t D = java_multiply(hi0, hi1);
255 if( (double)D != b*d ) return TypeInt::INT; // Overflow?
256
257 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
258 else { lo0 = B; hi0 = A; }
259 if( C < D ) {
260 if( C < lo0 ) lo0 = C;
261 if( D > hi0 ) hi0 = D;
262 } else {
263 if( D < lo0 ) lo0 = D;
264 if( C > hi0 ) hi0 = C;
265 }
266 return TypeInt::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
267 }
268
269
270 //=============================================================================
271 //------------------------------Ideal------------------------------------------
272 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
273 Node *MulLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
274 // Swap constant to right
275 jlong con;
276 if ((con = in(1)->find_long_con(0)) != 0) {
277 swap_edges(1, 2);
278 // Finish rest of method to use info in 'con'
279 } else if ((con = in(2)->find_long_con(0)) == 0) {
280 return MulNode::Ideal(phase, can_reshape);
281 }
282
283 // Now we have a constant Node on the right and the constant in con
284 if( con == CONST64(0) ) return NULL; // By zero is handled by Value call
285 if( con == CONST64(1) ) return NULL; // By one is handled by Identity call
286
287 // Check for negative constant; if so negate the final result
288 bool sign_flip = false;
289 if( con < 0 ) {
290 con = -con;
291 sign_flip = true;
292 }
293
294 // Get low bit; check for being the only bit
295 Node *res = NULL;
296 jlong bit1 = con & -con; // Extract low bit
297 if( bit1 == con ) { // Found a power of 2?
298 res = new LShiftLNode( in(1), phase->intcon(log2_long(bit1)) );
299 } else {
300
301 // Check for constant with 2 bits set
302 jlong bit2 = con-bit1;
303 bit2 = bit2 & -bit2; // Extract 2nd bit
304 if( bit2 + bit1 == con ) { // Found all bits in con?
305 Node *n1 = phase->transform( new LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ) );
306 Node *n2 = phase->transform( new LShiftLNode( in(1), phase->intcon(log2_long(bit2)) ) );
307 res = new AddLNode( n2, n1 );
308
309 } else if (is_power_of_2_long(con+1)) {
310 // Sleezy: power-of-2 -1. Next time be generic.
311 jlong temp = (jlong) (con + 1);
312 Node *n1 = phase->transform( new LShiftLNode( in(1), phase->intcon(log2_long(temp)) ) );
313 res = new SubLNode( n1, in(1) );
314 } else {
315 return MulNode::Ideal(phase, can_reshape);
316 }
317 }
318
319 if( sign_flip ) { // Need to negate result?
320 res = phase->transform(res);// Transform, before making the zero con
321 res = new SubLNode(phase->longcon(0),res);
322 }
323
324 return res; // Return final result
325 }
326
327 //------------------------------mul_ring---------------------------------------
328 // Compute the product type of two integer ranges into this node.
329 const Type *MulLNode::mul_ring(const Type *t0, const Type *t1) const {
330 const TypeLong *r0 = t0->is_long(); // Handy access
331 const TypeLong *r1 = t1->is_long();
332
333 // Fetch endpoints of all ranges
334 jlong lo0 = r0->_lo;
335 double a = (double)lo0;
336 jlong hi0 = r0->_hi;
337 double b = (double)hi0;
338 jlong lo1 = r1->_lo;
339 double c = (double)lo1;
340 jlong hi1 = r1->_hi;
341 double d = (double)hi1;
342
343 // Compute all endpoints & check for overflow
344 jlong A = java_multiply(lo0, lo1);
345 if( (double)A != a*c ) return TypeLong::LONG; // Overflow?
346 jlong B = java_multiply(lo0, hi1);
347 if( (double)B != a*d ) return TypeLong::LONG; // Overflow?
348 jlong C = java_multiply(hi0, lo1);
349 if( (double)C != b*c ) return TypeLong::LONG; // Overflow?
350 jlong D = java_multiply(hi0, hi1);
351 if( (double)D != b*d ) return TypeLong::LONG; // Overflow?
352
353 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
354 else { lo0 = B; hi0 = A; }
355 if( C < D ) {
356 if( C < lo0 ) lo0 = C;
357 if( D > hi0 ) hi0 = D;
358 } else {
359 if( D < lo0 ) lo0 = D;
360 if( C > hi0 ) hi0 = C;
361 }
362 return TypeLong::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
363 }
364
365 //=============================================================================
366 //------------------------------mul_ring---------------------------------------
367 // Compute the product type of two double ranges into this node.
368 const Type *MulFNode::mul_ring(const Type *t0, const Type *t1) const {
369 if( t0 == Type::FLOAT || t1 == Type::FLOAT ) return Type::FLOAT;
370 return TypeF::make( t0->getf() * t1->getf() );
371 }
372
373 //=============================================================================
374 //------------------------------mul_ring---------------------------------------
375 // Compute the product type of two double ranges into this node.
376 const Type *MulDNode::mul_ring(const Type *t0, const Type *t1) const {
377 if( t0 == Type::DOUBLE || t1 == Type::DOUBLE ) return Type::DOUBLE;
378 // We must be multiplying 2 double constants.
379 return TypeD::make( t0->getd() * t1->getd() );
380 }
381
382 //=============================================================================
383 //------------------------------Value------------------------------------------
384 const Type* MulHiLNode::Value(PhaseGVN* phase) const {
385 // Either input is TOP ==> the result is TOP
386 const Type *t1 = phase->type( in(1) );
387 const Type *t2 = phase->type( in(2) );
388 if( t1 == Type::TOP ) return Type::TOP;
389 if( t2 == Type::TOP ) return Type::TOP;
390
391 // Either input is BOTTOM ==> the result is the local BOTTOM
392 const Type *bot = bottom_type();
393 if( (t1 == bot) || (t2 == bot) ||
394 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
395 return bot;
396
397 // It is not worth trying to constant fold this stuff!
398 return TypeLong::LONG;
399 }
400
401 //=============================================================================
402 //------------------------------mul_ring---------------------------------------
403 // Supplied function returns the product of the inputs IN THE CURRENT RING.
404 // For the logical operations the ring's MUL is really a logical AND function.
405 // This also type-checks the inputs for sanity. Guaranteed never to
406 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
407 const Type *AndINode::mul_ring( const Type *t0, const Type *t1 ) const {
408 const TypeInt *r0 = t0->is_int(); // Handy access
409 const TypeInt *r1 = t1->is_int();
410 int widen = MAX2(r0->_widen,r1->_widen);
411
412 // If either input is a constant, might be able to trim cases
413 if( !r0->is_con() && !r1->is_con() )
414 return TypeInt::INT; // No constants to be had
415
416 // Both constants? Return bits
417 if( r0->is_con() && r1->is_con() )
418 return TypeInt::make( r0->get_con() & r1->get_con() );
419
420 if( r0->is_con() && r0->get_con() > 0 )
421 return TypeInt::make(0, r0->get_con(), widen);
422
423 if( r1->is_con() && r1->get_con() > 0 )
424 return TypeInt::make(0, r1->get_con(), widen);
425
426 if( r0 == TypeInt::BOOL || r1 == TypeInt::BOOL ) {
427 return TypeInt::BOOL;
428 }
429
430 return TypeInt::INT; // No constants to be had
431 }
432
433 //------------------------------Identity---------------------------------------
434 // Masking off the high bits of an unsigned load is not required
435 Node* AndINode::Identity(PhaseGVN* phase) {
436
437 // x & x => x
438 if (phase->eqv(in(1), in(2))) return in(1);
439
440 Node* in1 = in(1);
441 uint op = in1->Opcode();
442 const TypeInt* t2 = phase->type(in(2))->isa_int();
443 if (t2 && t2->is_con()) {
444 int con = t2->get_con();
445 // Masking off high bits which are always zero is useless.
446 const TypeInt* t1 = phase->type( in(1) )->isa_int();
447 if (t1 != NULL && t1->_lo >= 0) {
448 jint t1_support = right_n_bits(1 + log2_intptr(t1->_hi));
449 if ((t1_support & con) == t1_support)
450 return in1;
451 }
452 // Masking off the high bits of a unsigned-shift-right is not
453 // needed either.
454 if (op == Op_URShiftI) {
455 const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
456 if (t12 && t12->is_con()) { // Shift is by a constant
457 int shift = t12->get_con();
458 shift &= BitsPerJavaInteger - 1; // semantics of Java shifts
459 int mask = max_juint >> shift;
460 if ((mask & con) == mask) // If AND is useless, skip it
461 return in1;
462 }
463 }
464 }
465 return MulNode::Identity(phase);
466 }
467
468 //------------------------------Ideal------------------------------------------
469 Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) {
470 // Special case constant AND mask
471 const TypeInt *t2 = phase->type( in(2) )->isa_int();
472 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
473 const int mask = t2->get_con();
474 Node *load = in(1);
475 uint lop = load->Opcode();
476
477 // Masking bits off of a Character? Hi bits are already zero.
478 if( lop == Op_LoadUS &&
479 (mask & 0xFFFF0000) ) // Can we make a smaller mask?
480 return new AndINode(load,phase->intcon(mask&0xFFFF));
481
482 // Masking bits off of a Short? Loading a Character does some masking
483 if (can_reshape &&
484 load->outcnt() == 1 && load->unique_out() == this) {
485 if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) {
486 Node *ldus = new LoadUSNode(load->in(MemNode::Control),
487 load->in(MemNode::Memory),
488 load->in(MemNode::Address),
489 load->adr_type(),
490 TypeInt::CHAR, MemNode::unordered);
491 ldus = phase->transform(ldus);
492 return new AndINode(ldus, phase->intcon(mask & 0xFFFF));
493 }
494
495 // Masking sign bits off of a Byte? Do an unsigned byte load plus
496 // an and.
497 if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) {
498 Node* ldub = new LoadUBNode(load->in(MemNode::Control),
499 load->in(MemNode::Memory),
500 load->in(MemNode::Address),
501 load->adr_type(),
502 TypeInt::UBYTE, MemNode::unordered);
503 ldub = phase->transform(ldub);
504 return new AndINode(ldub, phase->intcon(mask));
505 }
506 }
507
508 // Masking off sign bits? Dont make them!
509 if( lop == Op_RShiftI ) {
510 const TypeInt *t12 = phase->type(load->in(2))->isa_int();
511 if( t12 && t12->is_con() ) { // Shift is by a constant
512 int shift = t12->get_con();
513 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
514 const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift);
515 // If the AND'ing of the 2 masks has no bits, then only original shifted
516 // bits survive. NO sign-extension bits survive the maskings.
517 if( (sign_bits_mask & mask) == 0 ) {
518 // Use zero-fill shift instead
519 Node *zshift = phase->transform(new URShiftINode(load->in(1),load->in(2)));
520 return new AndINode( zshift, in(2) );
521 }
522 }
523 }
524
525 // Check for 'negate/and-1', a pattern emitted when someone asks for
526 // 'mod 2'. Negate leaves the low order bit unchanged (think: complement
527 // plus 1) and the mask is of the low order bit. Skip the negate.
528 if( lop == Op_SubI && mask == 1 && load->in(1) &&
529 phase->type(load->in(1)) == TypeInt::ZERO )
530 return new AndINode( load->in(2), in(2) );
531
532 return MulNode::Ideal(phase, can_reshape);
533 }
534
535 //=============================================================================
536 //------------------------------mul_ring---------------------------------------
537 // Supplied function returns the product of the inputs IN THE CURRENT RING.
538 // For the logical operations the ring's MUL is really a logical AND function.
539 // This also type-checks the inputs for sanity. Guaranteed never to
540 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
541 const Type *AndLNode::mul_ring( const Type *t0, const Type *t1 ) const {
542 const TypeLong *r0 = t0->is_long(); // Handy access
543 const TypeLong *r1 = t1->is_long();
544 int widen = MAX2(r0->_widen,r1->_widen);
545
546 // If either input is a constant, might be able to trim cases
547 if( !r0->is_con() && !r1->is_con() )
548 return TypeLong::LONG; // No constants to be had
549
550 // Both constants? Return bits
551 if( r0->is_con() && r1->is_con() )
552 return TypeLong::make( r0->get_con() & r1->get_con() );
553
554 if( r0->is_con() && r0->get_con() > 0 )
555 return TypeLong::make(CONST64(0), r0->get_con(), widen);
556
557 if( r1->is_con() && r1->get_con() > 0 )
558 return TypeLong::make(CONST64(0), r1->get_con(), widen);
559
560 return TypeLong::LONG; // No constants to be had
561 }
562
563 //------------------------------Identity---------------------------------------
564 // Masking off the high bits of an unsigned load is not required
565 Node* AndLNode::Identity(PhaseGVN* phase) {
566
567 // x & x => x
568 if (phase->eqv(in(1), in(2))) return in(1);
569
570 Node *usr = in(1);
571 const TypeLong *t2 = phase->type( in(2) )->isa_long();
572 if( t2 && t2->is_con() ) {
573 jlong con = t2->get_con();
574 // Masking off high bits which are always zero is useless.
575 const TypeLong* t1 = phase->type( in(1) )->isa_long();
576 if (t1 != NULL && t1->_lo >= 0) {
577 int bit_count = log2_long(t1->_hi) + 1;
578 jlong t1_support = jlong(max_julong >> (BitsPerJavaLong - bit_count));
579 if ((t1_support & con) == t1_support)
580 return usr;
581 }
582 uint lop = usr->Opcode();
583 // Masking off the high bits of a unsigned-shift-right is not
584 // needed either.
585 if( lop == Op_URShiftL ) {
586 const TypeInt *t12 = phase->type( usr->in(2) )->isa_int();
587 if( t12 && t12->is_con() ) { // Shift is by a constant
588 int shift = t12->get_con();
589 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
590 jlong mask = max_julong >> shift;
591 if( (mask&con) == mask ) // If AND is useless, skip it
592 return usr;
593 }
594 }
595 }
596 return MulNode::Identity(phase);
597 }
598
599 //------------------------------Ideal------------------------------------------
600 Node *AndLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
601 // Special case constant AND mask
602 const TypeLong *t2 = phase->type( in(2) )->isa_long();
603 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
604 const jlong mask = t2->get_con();
605
606 Node* in1 = in(1);
607 uint op = in1->Opcode();
608
609 // Are we masking a long that was converted from an int with a mask
610 // that fits in 32-bits? Commute them and use an AndINode. Don't
611 // convert masks which would cause a sign extension of the integer
612 // value. This check includes UI2L masks (0x00000000FFFFFFFF) which
613 // would be optimized away later in Identity.
614 if (op == Op_ConvI2L && (mask & UCONST64(0xFFFFFFFF80000000)) == 0) {
615 Node* andi = new AndINode(in1->in(1), phase->intcon(mask));
616 andi = phase->transform(andi);
617 return new ConvI2LNode(andi);
618 }
619
620 // Masking off sign bits? Dont make them!
621 if (op == Op_RShiftL) {
622 const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
623 if( t12 && t12->is_con() ) { // Shift is by a constant
624 int shift = t12->get_con();
625 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
626 const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - shift)) -1);
627 // If the AND'ing of the 2 masks has no bits, then only original shifted
628 // bits survive. NO sign-extension bits survive the maskings.
629 if( (sign_bits_mask & mask) == 0 ) {
630 // Use zero-fill shift instead
631 Node *zshift = phase->transform(new URShiftLNode(in1->in(1), in1->in(2)));
632 return new AndLNode(zshift, in(2));
633 }
634 }
635 }
636
637 return MulNode::Ideal(phase, can_reshape);
638 }
639
640 //=============================================================================
641 //------------------------------Identity---------------------------------------
642 Node* LShiftINode::Identity(PhaseGVN* phase) {
643 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
644 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) ? in(1) : this;
645 }
646
647 //------------------------------Ideal------------------------------------------
648 // If the right input is a constant, and the left input is an add of a
649 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
650 Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
651 const Type *t = phase->type( in(2) );
652 if( t == Type::TOP ) return NULL; // Right input is dead
653 const TypeInt *t2 = t->isa_int();
654 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
655 const int con = t2->get_con() & ( BitsPerInt - 1 ); // masked shift count
656
657 if ( con == 0 ) return NULL; // let Identity() handle 0 shift count
658
659 // Left input is an add of a constant?
660 Node *add1 = in(1);
661 int add1_op = add1->Opcode();
662 if( add1_op == Op_AddI ) { // Left input is an add?
663 assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" );
664 const TypeInt *t12 = phase->type(add1->in(2))->isa_int();
665 if( t12 && t12->is_con() ){ // Left input is an add of a con?
666 // Transform is legal, but check for profit. Avoid breaking 'i2s'
667 // and 'i2b' patterns which typically fold into 'StoreC/StoreB'.
668 if( con < 16 ) {
669 // Compute X << con0
670 Node *lsh = phase->transform( new LShiftINode( add1->in(1), in(2) ) );
671 // Compute X<<con0 + (con1<<con0)
672 return new AddINode( lsh, phase->intcon(t12->get_con() << con));
673 }
674 }
675 }
676
677 // Check for "(x>>c0)<<c0" which just masks off low bits
678 if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) &&
679 add1->in(2) == in(2) )
680 // Convert to "(x & -(1<<c0))"
681 return new AndINode(add1->in(1),phase->intcon( -(1<<con)));
682
683 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
684 if( add1_op == Op_AndI ) {
685 Node *add2 = add1->in(1);
686 int add2_op = add2->Opcode();
687 if( (add2_op == Op_RShiftI || add2_op == Op_URShiftI ) &&
688 add2->in(2) == in(2) ) {
689 // Convert to "(x & (Y<<c0))"
690 Node *y_sh = phase->transform( new LShiftINode( add1->in(2), in(2) ) );
691 return new AndINode( add2->in(1), y_sh );
692 }
693 }
694
695 // Check for ((x & ((1<<(32-c0))-1)) << c0) which ANDs off high bits
696 // before shifting them away.
697 const jint bits_mask = right_n_bits(BitsPerJavaInteger-con);
698 if( add1_op == Op_AndI &&
699 phase->type(add1->in(2)) == TypeInt::make( bits_mask ) )
700 return new LShiftINode( add1->in(1), in(2) );
701
702 return NULL;
703 }
704
705 //------------------------------Value------------------------------------------
706 // A LShiftINode shifts its input2 left by input1 amount.
707 const Type* LShiftINode::Value(PhaseGVN* phase) const {
708 const Type *t1 = phase->type( in(1) );
709 const Type *t2 = phase->type( in(2) );
710 // Either input is TOP ==> the result is TOP
711 if( t1 == Type::TOP ) return Type::TOP;
712 if( t2 == Type::TOP ) return Type::TOP;
713
714 // Left input is ZERO ==> the result is ZERO.
715 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
716 // Shift by zero does nothing
717 if( t2 == TypeInt::ZERO ) return t1;
718
719 // Either input is BOTTOM ==> the result is BOTTOM
720 if( (t1 == TypeInt::INT) || (t2 == TypeInt::INT) ||
721 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
722 return TypeInt::INT;
723
724 const TypeInt *r1 = t1->is_int(); // Handy access
725 const TypeInt *r2 = t2->is_int(); // Handy access
726
727 if (!r2->is_con())
728 return TypeInt::INT;
729
730 uint shift = r2->get_con();
731 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
732 // Shift by a multiple of 32 does nothing:
733 if (shift == 0) return t1;
734
735 // If the shift is a constant, shift the bounds of the type,
736 // unless this could lead to an overflow.
737 if (!r1->is_con()) {
738 jint lo = r1->_lo, hi = r1->_hi;
739 if (((lo << shift) >> shift) == lo &&
740 ((hi << shift) >> shift) == hi) {
741 // No overflow. The range shifts up cleanly.
742 return TypeInt::make((jint)lo << (jint)shift,
743 (jint)hi << (jint)shift,
744 MAX2(r1->_widen,r2->_widen));
745 }
746 return TypeInt::INT;
747 }
748
749 return TypeInt::make( (jint)r1->get_con() << (jint)shift );
750 }
751
752 //=============================================================================
753 //------------------------------Identity---------------------------------------
754 Node* LShiftLNode::Identity(PhaseGVN* phase) {
755 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
756 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
757 }
758
759 //------------------------------Ideal------------------------------------------
760 // If the right input is a constant, and the left input is an add of a
761 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
762 Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
763 const Type *t = phase->type( in(2) );
764 if( t == Type::TOP ) return NULL; // Right input is dead
765 const TypeInt *t2 = t->isa_int();
766 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
767 const int con = t2->get_con() & ( BitsPerLong - 1 ); // masked shift count
768
769 if ( con == 0 ) return NULL; // let Identity() handle 0 shift count
770
771 // Left input is an add of a constant?
772 Node *add1 = in(1);
773 int add1_op = add1->Opcode();
774 if( add1_op == Op_AddL ) { // Left input is an add?
775 // Avoid dead data cycles from dead loops
776 assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" );
777 const TypeLong *t12 = phase->type(add1->in(2))->isa_long();
778 if( t12 && t12->is_con() ){ // Left input is an add of a con?
779 // Compute X << con0
780 Node *lsh = phase->transform( new LShiftLNode( add1->in(1), in(2) ) );
781 // Compute X<<con0 + (con1<<con0)
782 return new AddLNode( lsh, phase->longcon(t12->get_con() << con));
783 }
784 }
785
786 // Check for "(x>>c0)<<c0" which just masks off low bits
787 if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) &&
788 add1->in(2) == in(2) )
789 // Convert to "(x & -(1<<c0))"
790 return new AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con)));
791
792 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
793 if( add1_op == Op_AndL ) {
794 Node *add2 = add1->in(1);
795 int add2_op = add2->Opcode();
796 if( (add2_op == Op_RShiftL || add2_op == Op_URShiftL ) &&
797 add2->in(2) == in(2) ) {
798 // Convert to "(x & (Y<<c0))"
799 Node *y_sh = phase->transform( new LShiftLNode( add1->in(2), in(2) ) );
800 return new AndLNode( add2->in(1), y_sh );
801 }
802 }
803
804 // Check for ((x & ((CONST64(1)<<(64-c0))-1)) << c0) which ANDs off high bits
805 // before shifting them away.
806 const jlong bits_mask = jlong(max_julong >> con);
807 if( add1_op == Op_AndL &&
808 phase->type(add1->in(2)) == TypeLong::make( bits_mask ) )
809 return new LShiftLNode( add1->in(1), in(2) );
810
811 return NULL;
812 }
813
814 //------------------------------Value------------------------------------------
815 // A LShiftLNode shifts its input2 left by input1 amount.
816 const Type* LShiftLNode::Value(PhaseGVN* phase) const {
817 const Type *t1 = phase->type( in(1) );
818 const Type *t2 = phase->type( in(2) );
819 // Either input is TOP ==> the result is TOP
820 if( t1 == Type::TOP ) return Type::TOP;
821 if( t2 == Type::TOP ) return Type::TOP;
822
823 // Left input is ZERO ==> the result is ZERO.
824 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
825 // Shift by zero does nothing
826 if( t2 == TypeInt::ZERO ) return t1;
827
828 // Either input is BOTTOM ==> the result is BOTTOM
829 if( (t1 == TypeLong::LONG) || (t2 == TypeInt::INT) ||
830 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
831 return TypeLong::LONG;
832
833 const TypeLong *r1 = t1->is_long(); // Handy access
834 const TypeInt *r2 = t2->is_int(); // Handy access
835
836 if (!r2->is_con())
837 return TypeLong::LONG;
838
839 uint shift = r2->get_con();
840 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
841 // Shift by a multiple of 64 does nothing:
842 if (shift == 0) return t1;
843
844 // If the shift is a constant, shift the bounds of the type,
845 // unless this could lead to an overflow.
846 if (!r1->is_con()) {
847 jlong lo = r1->_lo, hi = r1->_hi;
848 if (((lo << shift) >> shift) == lo &&
849 ((hi << shift) >> shift) == hi) {
850 // No overflow. The range shifts up cleanly.
851 return TypeLong::make((jlong)lo << (jint)shift,
852 (jlong)hi << (jint)shift,
853 MAX2(r1->_widen,r2->_widen));
854 }
855 return TypeLong::LONG;
856 }
857
858 return TypeLong::make( (jlong)r1->get_con() << (jint)shift );
859 }
860
861 //=============================================================================
862 //------------------------------Identity---------------------------------------
863 Node* RShiftINode::Identity(PhaseGVN* phase) {
864 const TypeInt *t2 = phase->type(in(2))->isa_int();
865 if( !t2 ) return this;
866 if ( t2->is_con() && ( t2->get_con() & ( BitsPerInt - 1 ) ) == 0 )
867 return in(1);
868
869 // Check for useless sign-masking
870 if( in(1)->Opcode() == Op_LShiftI &&
871 in(1)->req() == 3 &&
872 in(1)->in(2) == in(2) &&
873 t2->is_con() ) {
874 uint shift = t2->get_con();
875 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
876 // Compute masks for which this shifting doesn't change
877 int lo = (-1 << (BitsPerJavaInteger - shift-1)); // FFFF8000
878 int hi = ~lo; // 00007FFF
879 const TypeInt *t11 = phase->type(in(1)->in(1))->isa_int();
880 if( !t11 ) return this;
881 // Does actual value fit inside of mask?
882 if( lo <= t11->_lo && t11->_hi <= hi )
883 return in(1)->in(1); // Then shifting is a nop
884 }
885
886 return this;
887 }
888
889 //------------------------------Ideal------------------------------------------
890 Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
891 // Inputs may be TOP if they are dead.
892 const TypeInt *t1 = phase->type( in(1) )->isa_int();
893 if( !t1 ) return NULL; // Left input is an integer
894 const TypeInt *t2 = phase->type( in(2) )->isa_int();
895 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
896 const TypeInt *t3; // type of in(1).in(2)
897 int shift = t2->get_con();
898 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
899
900 if ( shift == 0 ) return NULL; // let Identity() handle 0 shift count
901
902 // Check for (x & 0xFF000000) >> 24, whose mask can be made smaller.
903 // Such expressions arise normally from shift chains like (byte)(x >> 24).
904 const Node *mask = in(1);
905 if( mask->Opcode() == Op_AndI &&
906 (t3 = phase->type(mask->in(2))->isa_int()) &&
907 t3->is_con() ) {
908 Node *x = mask->in(1);
909 jint maskbits = t3->get_con();
910 // Convert to "(x >> shift) & (mask >> shift)"
911 Node *shr_nomask = phase->transform( new RShiftINode(mask->in(1), in(2)) );
912 return new AndINode(shr_nomask, phase->intcon( maskbits >> shift));
913 }
914
915 // Check for "(short[i] <<16)>>16" which simply sign-extends
916 const Node *shl = in(1);
917 if( shl->Opcode() != Op_LShiftI ) return NULL;
918
919 if( shift == 16 &&
920 (t3 = phase->type(shl->in(2))->isa_int()) &&
921 t3->is_con(16) ) {
922 Node *ld = shl->in(1);
923 if( ld->Opcode() == Op_LoadS ) {
924 // Sign extension is just useless here. Return a RShiftI of zero instead
925 // returning 'ld' directly. We cannot return an old Node directly as
926 // that is the job of 'Identity' calls and Identity calls only work on
927 // direct inputs ('ld' is an extra Node removed from 'this'). The
928 // combined optimization requires Identity only return direct inputs.
929 set_req(1, ld);
930 set_req(2, phase->intcon(0));
931 return this;
932 }
933 else if( can_reshape &&
934 ld->Opcode() == Op_LoadUS &&
935 ld->outcnt() == 1 && ld->unique_out() == shl)
936 // Replace zero-extension-load with sign-extension-load
937 return new LoadSNode( ld->in(MemNode::Control),
938 ld->in(MemNode::Memory),
939 ld->in(MemNode::Address),
940 ld->adr_type(), TypeInt::SHORT,
941 MemNode::unordered);
942 }
943
944 // Check for "(byte[i] <<24)>>24" which simply sign-extends
945 if( shift == 24 &&
946 (t3 = phase->type(shl->in(2))->isa_int()) &&
947 t3->is_con(24) ) {
948 Node *ld = shl->in(1);
949 if( ld->Opcode() == Op_LoadB ) {
950 // Sign extension is just useless here
951 set_req(1, ld);
952 set_req(2, phase->intcon(0));
953 return this;
954 }
955 }
956
957 return NULL;
958 }
959
960 //------------------------------Value------------------------------------------
961 // A RShiftINode shifts its input2 right by input1 amount.
962 const Type* RShiftINode::Value(PhaseGVN* phase) const {
963 const Type *t1 = phase->type( in(1) );
964 const Type *t2 = phase->type( in(2) );
965 // Either input is TOP ==> the result is TOP
966 if( t1 == Type::TOP ) return Type::TOP;
967 if( t2 == Type::TOP ) return Type::TOP;
968
969 // Left input is ZERO ==> the result is ZERO.
970 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
971 // Shift by zero does nothing
972 if( t2 == TypeInt::ZERO ) return t1;
973
974 // Either input is BOTTOM ==> the result is BOTTOM
975 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
976 return TypeInt::INT;
977
978 if (t2 == TypeInt::INT)
979 return TypeInt::INT;
980
981 const TypeInt *r1 = t1->is_int(); // Handy access
982 const TypeInt *r2 = t2->is_int(); // Handy access
983
984 // If the shift is a constant, just shift the bounds of the type.
985 // For example, if the shift is 31, we just propagate sign bits.
986 if (r2->is_con()) {
987 uint shift = r2->get_con();
988 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
989 // Shift by a multiple of 32 does nothing:
990 if (shift == 0) return t1;
991 // Calculate reasonably aggressive bounds for the result.
992 // This is necessary if we are to correctly type things
993 // like (x<<24>>24) == ((byte)x).
994 jint lo = (jint)r1->_lo >> (jint)shift;
995 jint hi = (jint)r1->_hi >> (jint)shift;
996 assert(lo <= hi, "must have valid bounds");
997 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
998 #ifdef ASSERT
999 // Make sure we get the sign-capture idiom correct.
1000 if (shift == BitsPerJavaInteger-1) {
1001 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>31 of + is 0");
1002 if (r1->_hi < 0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1");
1003 }
1004 #endif
1005 return ti;
1006 }
1007
1008 if( !r1->is_con() || !r2->is_con() )
1009 return TypeInt::INT;
1010
1011 // Signed shift right
1012 return TypeInt::make( r1->get_con() >> (r2->get_con()&31) );
1013 }
1014
1015 //=============================================================================
1016 //------------------------------Identity---------------------------------------
1017 Node* RShiftLNode::Identity(PhaseGVN* phase) {
1018 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
1019 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
1020 }
1021
1022 //------------------------------Value------------------------------------------
1023 // A RShiftLNode shifts its input2 right by input1 amount.
1024 const Type* RShiftLNode::Value(PhaseGVN* phase) const {
1025 const Type *t1 = phase->type( in(1) );
1026 const Type *t2 = phase->type( in(2) );
1027 // Either input is TOP ==> the result is TOP
1028 if( t1 == Type::TOP ) return Type::TOP;
1029 if( t2 == Type::TOP ) return Type::TOP;
1030
1031 // Left input is ZERO ==> the result is ZERO.
1032 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1033 // Shift by zero does nothing
1034 if( t2 == TypeInt::ZERO ) return t1;
1035
1036 // Either input is BOTTOM ==> the result is BOTTOM
1037 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1038 return TypeLong::LONG;
1039
1040 if (t2 == TypeInt::INT)
1041 return TypeLong::LONG;
1042
1043 const TypeLong *r1 = t1->is_long(); // Handy access
1044 const TypeInt *r2 = t2->is_int (); // Handy access
1045
1046 // If the shift is a constant, just shift the bounds of the type.
1047 // For example, if the shift is 63, we just propagate sign bits.
1048 if (r2->is_con()) {
1049 uint shift = r2->get_con();
1050 shift &= (2*BitsPerJavaInteger)-1; // semantics of Java shifts
1051 // Shift by a multiple of 64 does nothing:
1052 if (shift == 0) return t1;
1053 // Calculate reasonably aggressive bounds for the result.
1054 // This is necessary if we are to correctly type things
1055 // like (x<<24>>24) == ((byte)x).
1056 jlong lo = (jlong)r1->_lo >> (jlong)shift;
1057 jlong hi = (jlong)r1->_hi >> (jlong)shift;
1058 assert(lo <= hi, "must have valid bounds");
1059 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1060 #ifdef ASSERT
1061 // Make sure we get the sign-capture idiom correct.
1062 if (shift == (2*BitsPerJavaInteger)-1) {
1063 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>63 of + is 0");
1064 if (r1->_hi < 0) assert(tl == TypeLong::MINUS_1, ">>63 of - is -1");
1065 }
1066 #endif
1067 return tl;
1068 }
1069
1070 return TypeLong::LONG; // Give up
1071 }
1072
1073 //=============================================================================
1074 //------------------------------Identity---------------------------------------
1075 Node* URShiftINode::Identity(PhaseGVN* phase) {
1076 const TypeInt *ti = phase->type( in(2) )->isa_int();
1077 if ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) return in(1);
1078
1079 // Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x".
1080 // Happens during new-array length computation.
1081 // Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)]
1082 Node *add = in(1);
1083 if( add->Opcode() == Op_AddI ) {
1084 const TypeInt *t2 = phase->type(add->in(2))->isa_int();
1085 if( t2 && t2->is_con(wordSize - 1) &&
1086 add->in(1)->Opcode() == Op_LShiftI ) {
1087 // Check that shift_counts are LogBytesPerWord
1088 Node *lshift_count = add->in(1)->in(2);
1089 const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int();
1090 if( t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) &&
1091 t_lshift_count == phase->type(in(2)) ) {
1092 Node *x = add->in(1)->in(1);
1093 const TypeInt *t_x = phase->type(x)->isa_int();
1094 if( t_x != NULL && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord) ) {
1095 return x;
1096 }
1097 }
1098 }
1099 }
1100
1101 return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this;
1102 }
1103
1104 //------------------------------Ideal------------------------------------------
1105 Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
1106 const TypeInt *t2 = phase->type( in(2) )->isa_int();
1107 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
1108 const int con = t2->get_con() & 31; // Shift count is always masked
1109 if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count
1110 // We'll be wanting the right-shift amount as a mask of that many bits
1111 const int mask = right_n_bits(BitsPerJavaInteger - con);
1112
1113 int in1_op = in(1)->Opcode();
1114
1115 // Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32
1116 if( in1_op == Op_URShiftI ) {
1117 const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int();
1118 if( t12 && t12->is_con() ) { // Right input is a constant
1119 assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" );
1120 const int con2 = t12->get_con() & 31; // Shift count is always masked
1121 const int con3 = con+con2;
1122 if( con3 < 32 ) // Only merge shifts if total is < 32
1123 return new URShiftINode( in(1)->in(1), phase->intcon(con3) );
1124 }
1125 }
1126
1127 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
1128 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1129 // If Q is "X << z" the rounding is useless. Look for patterns like
1130 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
1131 Node *add = in(1);
1132 if( in1_op == Op_AddI ) {
1133 Node *lshl = add->in(1);
1134 if( lshl->Opcode() == Op_LShiftI &&
1135 phase->type(lshl->in(2)) == t2 ) {
1136 Node *y_z = phase->transform( new URShiftINode(add->in(2),in(2)) );
1137 Node *sum = phase->transform( new AddINode( lshl->in(1), y_z ) );
1138 return new AndINode( sum, phase->intcon(mask) );
1139 }
1140 }
1141
1142 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
1143 // This shortens the mask. Also, if we are extracting a high byte and
1144 // storing it to a buffer, the mask will be removed completely.
1145 Node *andi = in(1);
1146 if( in1_op == Op_AndI ) {
1147 const TypeInt *t3 = phase->type( andi->in(2) )->isa_int();
1148 if( t3 && t3->is_con() ) { // Right input is a constant
1149 jint mask2 = t3->get_con();
1150 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
1151 Node *newshr = phase->transform( new URShiftINode(andi->in(1), in(2)) );
1152 return new AndINode(newshr, phase->intcon(mask2));
1153 // The negative values are easier to materialize than positive ones.
1154 // A typical case from address arithmetic is ((x & ~15) >> 4).
1155 // It's better to change that to ((x >> 4) & ~0) versus
1156 // ((x >> 4) & 0x0FFFFFFF). The difference is greatest in LP64.
1157 }
1158 }
1159
1160 // Check for "(X << z ) >>> z" which simply zero-extends
1161 Node *shl = in(1);
1162 if( in1_op == Op_LShiftI &&
1163 phase->type(shl->in(2)) == t2 )
1164 return new AndINode( shl->in(1), phase->intcon(mask) );
1165
1166 return NULL;
1167 }
1168
1169 //------------------------------Value------------------------------------------
1170 // A URShiftINode shifts its input2 right by input1 amount.
1171 const Type* URShiftINode::Value(PhaseGVN* phase) const {
1172 // (This is a near clone of RShiftINode::Value.)
1173 const Type *t1 = phase->type( in(1) );
1174 const Type *t2 = phase->type( in(2) );
1175 // Either input is TOP ==> the result is TOP
1176 if( t1 == Type::TOP ) return Type::TOP;
1177 if( t2 == Type::TOP ) return Type::TOP;
1178
1179 // Left input is ZERO ==> the result is ZERO.
1180 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
1181 // Shift by zero does nothing
1182 if( t2 == TypeInt::ZERO ) return t1;
1183
1184 // Either input is BOTTOM ==> the result is BOTTOM
1185 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1186 return TypeInt::INT;
1187
1188 if (t2 == TypeInt::INT)
1189 return TypeInt::INT;
1190
1191 const TypeInt *r1 = t1->is_int(); // Handy access
1192 const TypeInt *r2 = t2->is_int(); // Handy access
1193
1194 if (r2->is_con()) {
1195 uint shift = r2->get_con();
1196 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
1197 // Shift by a multiple of 32 does nothing:
1198 if (shift == 0) return t1;
1199 // Calculate reasonably aggressive bounds for the result.
1200 jint lo = (juint)r1->_lo >> (juint)shift;
1201 jint hi = (juint)r1->_hi >> (juint)shift;
1202 if (r1->_hi >= 0 && r1->_lo < 0) {
1203 // If the type has both negative and positive values,
1204 // there are two separate sub-domains to worry about:
1205 // The positive half and the negative half.
1206 jint neg_lo = lo;
1207 jint neg_hi = (juint)-1 >> (juint)shift;
1208 jint pos_lo = (juint) 0 >> (juint)shift;
1209 jint pos_hi = hi;
1210 lo = MIN2(neg_lo, pos_lo); // == 0
1211 hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
1212 }
1213 assert(lo <= hi, "must have valid bounds");
1214 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1215 #ifdef ASSERT
1216 // Make sure we get the sign-capture idiom correct.
1217 if (shift == BitsPerJavaInteger-1) {
1218 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>>31 of + is 0");
1219 if (r1->_hi < 0) assert(ti == TypeInt::ONE, ">>>31 of - is +1");
1220 }
1221 #endif
1222 return ti;
1223 }
1224
1225 //
1226 // Do not support shifted oops in info for GC
1227 //
1228 // else if( t1->base() == Type::InstPtr ) {
1229 //
1230 // const TypeInstPtr *o = t1->is_instptr();
1231 // if( t1->singleton() )
1232 // return TypeInt::make( ((uint32_t)o->const_oop() + o->_offset) >> shift );
1233 // }
1234 // else if( t1->base() == Type::KlassPtr ) {
1235 // const TypeKlassPtr *o = t1->is_klassptr();
1236 // if( t1->singleton() )
1237 // return TypeInt::make( ((uint32_t)o->const_oop() + o->_offset) >> shift );
1238 // }
1239
1240 return TypeInt::INT;
1241 }
1242
1243 //=============================================================================
1244 //------------------------------Identity---------------------------------------
1245 Node* URShiftLNode::Identity(PhaseGVN* phase) {
1246 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
1247 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
1248 }
1249
1250 //------------------------------Ideal------------------------------------------
1251 Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
1252 const TypeInt *t2 = phase->type( in(2) )->isa_int();
1253 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
1254 const int con = t2->get_con() & ( BitsPerLong - 1 ); // Shift count is always masked
1255 if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count
1256 // note: mask computation below does not work for 0 shift count
1257 // We'll be wanting the right-shift amount as a mask of that many bits
1258 const jlong mask = jlong(max_julong >> con);
1259
1260 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
1261 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1262 // If Q is "X << z" the rounding is useless. Look for patterns like
1263 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
1264 Node *add = in(1);
1265 if( add->Opcode() == Op_AddL ) {
1266 Node *lshl = add->in(1);
1267 if( lshl->Opcode() == Op_LShiftL &&
1268 phase->type(lshl->in(2)) == t2 ) {
1269 Node *y_z = phase->transform( new URShiftLNode(add->in(2),in(2)) );
1270 Node *sum = phase->transform( new AddLNode( lshl->in(1), y_z ) );
1271 return new AndLNode( sum, phase->longcon(mask) );
1272 }
1273 }
1274
1275 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
1276 // This shortens the mask. Also, if we are extracting a high byte and
1277 // storing it to a buffer, the mask will be removed completely.
1278 Node *andi = in(1);
1279 if( andi->Opcode() == Op_AndL ) {
1280 const TypeLong *t3 = phase->type( andi->in(2) )->isa_long();
1281 if( t3 && t3->is_con() ) { // Right input is a constant
1282 jlong mask2 = t3->get_con();
1283 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
1284 Node *newshr = phase->transform( new URShiftLNode(andi->in(1), in(2)) );
1285 return new AndLNode(newshr, phase->longcon(mask2));
1286 }
1287 }
1288
1289 // Check for "(X << z ) >>> z" which simply zero-extends
1290 Node *shl = in(1);
1291 if( shl->Opcode() == Op_LShiftL &&
1292 phase->type(shl->in(2)) == t2 )
1293 return new AndLNode( shl->in(1), phase->longcon(mask) );
1294
1295 return NULL;
1296 }
1297
1298 //------------------------------Value------------------------------------------
1299 // A URShiftINode shifts its input2 right by input1 amount.
1300 const Type* URShiftLNode::Value(PhaseGVN* phase) const {
1301 // (This is a near clone of RShiftLNode::Value.)
1302 const Type *t1 = phase->type( in(1) );
1303 const Type *t2 = phase->type( in(2) );
1304 // Either input is TOP ==> the result is TOP
1305 if( t1 == Type::TOP ) return Type::TOP;
1306 if( t2 == Type::TOP ) return Type::TOP;
1307
1308 // Left input is ZERO ==> the result is ZERO.
1309 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1310 // Shift by zero does nothing
1311 if( t2 == TypeInt::ZERO ) return t1;
1312
1313 // Either input is BOTTOM ==> the result is BOTTOM
1314 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1315 return TypeLong::LONG;
1316
1317 if (t2 == TypeInt::INT)
1318 return TypeLong::LONG;
1319
1320 const TypeLong *r1 = t1->is_long(); // Handy access
1321 const TypeInt *r2 = t2->is_int (); // Handy access
1322
1323 if (r2->is_con()) {
1324 uint shift = r2->get_con();
1325 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
1326 // Shift by a multiple of 64 does nothing:
1327 if (shift == 0) return t1;
1328 // Calculate reasonably aggressive bounds for the result.
1329 jlong lo = (julong)r1->_lo >> (juint)shift;
1330 jlong hi = (julong)r1->_hi >> (juint)shift;
1331 if (r1->_hi >= 0 && r1->_lo < 0) {
1332 // If the type has both negative and positive values,
1333 // there are two separate sub-domains to worry about:
1334 // The positive half and the negative half.
1335 jlong neg_lo = lo;
1336 jlong neg_hi = (julong)-1 >> (juint)shift;
1337 jlong pos_lo = (julong) 0 >> (juint)shift;
1338 jlong pos_hi = hi;
1339 //lo = MIN2(neg_lo, pos_lo); // == 0
1340 lo = neg_lo < pos_lo ? neg_lo : pos_lo;
1341 //hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
1342 hi = neg_hi > pos_hi ? neg_hi : pos_hi;
1343 }
1344 assert(lo <= hi, "must have valid bounds");
1345 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1346 #ifdef ASSERT
1347 // Make sure we get the sign-capture idiom correct.
1348 if (shift == BitsPerJavaLong - 1) {
1349 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>>63 of + is 0");
1350 if (r1->_hi < 0) assert(tl == TypeLong::ONE, ">>>63 of - is +1");
1351 }
1352 #endif
1353 return tl;
1354 }
1355
1356 return TypeLong::LONG; // Give up
1357 }