1 /*
2 * Copyright (c) 1997, 2012, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "memory/allocation.inline.hpp"
27 #include "opto/addnode.hpp"
28 #include "opto/connode.hpp"
29 #include "opto/convertnode.hpp"
30 #include "opto/memnode.hpp"
31 #include "opto/mulnode.hpp"
32 #include "opto/phaseX.hpp"
33 #include "opto/subnode.hpp"
34
35 // Portions of code courtesy of Clifford Click
36
37
38 //=============================================================================
39 //------------------------------hash-------------------------------------------
40 // Hash function over MulNodes. Needs to be commutative; i.e., I swap
41 // (commute) inputs to MulNodes willy-nilly so the hash function must return
42 // the same value in the presence of edge swapping.
43 uint MulNode::hash() const {
44 return (uintptr_t)in(1) + (uintptr_t)in(2) + Opcode();
45 }
46
47 //------------------------------Identity---------------------------------------
48 // Multiplying a one preserves the other argument
49 Node* MulNode::Identity(PhaseGVN* phase) {
50 register const Type *one = mul_id(); // The multiplicative identity
51 if( phase->type( in(1) )->higher_equal( one ) ) return in(2);
52 if( phase->type( in(2) )->higher_equal( one ) ) return in(1);
53
54 return this;
55 }
56
57 //------------------------------Ideal------------------------------------------
58 // We also canonicalize the Node, moving constants to the right input,
59 // and flatten expressions (so that 1+x+2 becomes x+3).
60 Node *MulNode::Ideal(PhaseGVN *phase, bool can_reshape) {
61 const Type *t1 = phase->type( in(1) );
62 const Type *t2 = phase->type( in(2) );
63 Node *progress = NULL; // Progress flag
64 // We are OK if right is a constant, or right is a load and
65 // left is a non-constant.
66 if( !(t2->singleton() ||
67 (in(2)->is_Load() && !(t1->singleton() || in(1)->is_Load())) ) ) {
68 if( t1->singleton() || // Left input is a constant?
69 // Otherwise, sort inputs (commutativity) to help value numbering.
70 (in(1)->_idx > in(2)->_idx) ) {
71 swap_edges(1, 2);
72 const Type *t = t1;
73 t1 = t2;
74 t2 = t;
75 progress = this; // Made progress
76 }
77 }
78
79 // If the right input is a constant, and the left input is a product of a
80 // constant, flatten the expression tree.
81 uint op = Opcode();
82 if( t2->singleton() && // Right input is a constant?
83 op != Op_MulF && // Float & double cannot reassociate
84 op != Op_MulD ) {
85 if( t2 == Type::TOP ) return NULL;
86 Node *mul1 = in(1);
87 #ifdef ASSERT
88 // Check for dead loop
89 int op1 = mul1->Opcode();
90 if( phase->eqv( mul1, this ) || phase->eqv( in(2), this ) ||
91 ( op1 == mul_opcode() || op1 == add_opcode() ) &&
92 ( phase->eqv( mul1->in(1), this ) || phase->eqv( mul1->in(2), this ) ||
93 phase->eqv( mul1->in(1), mul1 ) || phase->eqv( mul1->in(2), mul1 ) ) )
94 assert(false, "dead loop in MulNode::Ideal");
95 #endif
96
97 if( mul1->Opcode() == mul_opcode() ) { // Left input is a multiply?
98 // Mul of a constant?
99 const Type *t12 = phase->type( mul1->in(2) );
100 if( t12->singleton() && t12 != Type::TOP) { // Left input is an add of a constant?
101 // Compute new constant; check for overflow
102 const Type *tcon01 = ((MulNode*)mul1)->mul_ring(t2,t12);
103 if( tcon01->singleton() ) {
104 // The Mul of the flattened expression
105 set_req(1, mul1->in(1));
106 set_req(2, phase->makecon( tcon01 ));
107 t2 = tcon01;
108 progress = this; // Made progress
109 }
110 }
111 }
112 // If the right input is a constant, and the left input is an add of a
113 // constant, flatten the tree: (X+con1)*con0 ==> X*con0 + con1*con0
114 const Node *add1 = in(1);
115 if( add1->Opcode() == add_opcode() ) { // Left input is an add?
116 // Add of a constant?
117 const Type *t12 = phase->type( add1->in(2) );
118 if( t12->singleton() && t12 != Type::TOP ) { // Left input is an add of a constant?
119 assert( add1->in(1) != add1, "dead loop in MulNode::Ideal" );
120 // Compute new constant; check for overflow
121 const Type *tcon01 = mul_ring(t2,t12);
122 if( tcon01->singleton() ) {
123
124 // Convert (X+con1)*con0 into X*con0
125 Node *mul = clone(); // mul = ()*con0
126 mul->set_req(1,add1->in(1)); // mul = X*con0
127 mul = phase->transform(mul);
128
129 Node *add2 = add1->clone();
130 add2->set_req(1, mul); // X*con0 + con0*con1
131 add2->set_req(2, phase->makecon(tcon01) );
132 progress = add2;
133 }
134 }
135 } // End of is left input an add
136 } // End of is right input a Mul
137
138 return progress;
139 }
140
141 //------------------------------Value-----------------------------------------
142 const Type* MulNode::Value(PhaseGVN* phase) const {
143 const Type *t1 = phase->type( in(1) );
144 const Type *t2 = phase->type( in(2) );
145 // Either input is TOP ==> the result is TOP
146 if( t1 == Type::TOP ) return Type::TOP;
147 if( t2 == Type::TOP ) return Type::TOP;
148
149 // Either input is ZERO ==> the result is ZERO.
150 // Not valid for floats or doubles since +0.0 * -0.0 --> +0.0
151 int op = Opcode();
152 if( op == Op_MulI || op == Op_AndI || op == Op_MulL || op == Op_AndL ) {
153 const Type *zero = add_id(); // The multiplicative zero
154 if( t1->higher_equal( zero ) ) return zero;
155 if( t2->higher_equal( zero ) ) return zero;
156 }
157
158 // Either input is BOTTOM ==> the result is the local BOTTOM
159 if( t1 == Type::BOTTOM || t2 == Type::BOTTOM )
160 return bottom_type();
161
162 #if defined(IA32)
163 // Can't trust native compilers to properly fold strict double
164 // multiplication with round-to-zero on this platform.
165 if (op == Op_MulD && phase->C->method()->is_strict()) {
166 return TypeD::DOUBLE;
167 }
168 #endif
169
170 return mul_ring(t1,t2); // Local flavor of type multiplication
171 }
172
173 MulNode* MulNode::make(BasicType bt, Node *in1, Node *in2) {
174 switch(bt) {
175 case T_INT: return new MulINode(in1, in2);
176 case T_LONG: return new MulLNode(in1, in2);
177 case T_FLOAT: return new MulFNode(in1, in2);
178 case T_DOUBLE: return new MulDNode(in1, in2);
179 }
180 fatal("Bad basic type %s", type2name(bt));
181 return NULL;
182 }
183
184 //=============================================================================
185 //------------------------------Ideal------------------------------------------
186 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
187 Node *MulINode::Ideal(PhaseGVN *phase, bool can_reshape) {
188 // Swap constant to right
189 jint con;
190 if ((con = in(1)->find_int_con(0)) != 0) {
191 swap_edges(1, 2);
192 // Finish rest of method to use info in 'con'
193 } else if ((con = in(2)->find_int_con(0)) == 0) {
194 return MulNode::Ideal(phase, can_reshape);
195 }
196
197 // Now we have a constant Node on the right and the constant in con
198 if( con == 0 ) return NULL; // By zero is handled by Value call
199 if( con == 1 ) return NULL; // By one is handled by Identity call
200
201 // Check for negative constant; if so negate the final result
202 bool sign_flip = false;
203 if( con < 0 ) {
204 con = -con;
205 sign_flip = true;
206 }
207
208 // Get low bit; check for being the only bit
209 Node *res = NULL;
210 jint bit1 = con & -con; // Extract low bit
211 if( bit1 == con ) { // Found a power of 2?
212 res = new LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) );
213 } else {
214
215 // Check for constant with 2 bits set
216 jint bit2 = con-bit1;
217 bit2 = bit2 & -bit2; // Extract 2nd bit
218 if( bit2 + bit1 == con ) { // Found all bits in con?
219 Node *n1 = phase->transform( new LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ) );
220 Node *n2 = phase->transform( new LShiftINode( in(1), phase->intcon(log2_intptr(bit2)) ) );
221 res = new AddINode( n2, n1 );
222
223 } else if (is_power_of_2(con+1)) {
224 // Sleezy: power-of-2 -1. Next time be generic.
225 jint temp = (jint) (con + 1);
226 Node *n1 = phase->transform( new LShiftINode( in(1), phase->intcon(log2_intptr(temp)) ) );
227 res = new SubINode( n1, in(1) );
228 } else {
229 return MulNode::Ideal(phase, can_reshape);
230 }
231 }
232
233 if( sign_flip ) { // Need to negate result?
234 res = phase->transform(res);// Transform, before making the zero con
235 res = new SubINode(phase->intcon(0),res);
236 }
237
238 return res; // Return final result
239 }
240
241 //------------------------------mul_ring---------------------------------------
242 // Compute the product type of two integer ranges into this node.
243 const Type *MulINode::mul_ring(const Type *t0, const Type *t1) const {
244 const TypeInt *r0 = t0->is_int(); // Handy access
245 const TypeInt *r1 = t1->is_int();
246
247 // Fetch endpoints of all ranges
248 int32_t lo0 = r0->_lo;
249 double a = (double)lo0;
250 int32_t hi0 = r0->_hi;
251 double b = (double)hi0;
252 int32_t lo1 = r1->_lo;
253 double c = (double)lo1;
254 int32_t hi1 = r1->_hi;
255 double d = (double)hi1;
256
257 // Compute all endpoints & check for overflow
258 int32_t A = java_multiply(lo0, lo1);
259 if( (double)A != a*c ) return TypeInt::INT; // Overflow?
260 int32_t B = java_multiply(lo0, hi1);
261 if( (double)B != a*d ) return TypeInt::INT; // Overflow?
262 int32_t C = java_multiply(hi0, lo1);
263 if( (double)C != b*c ) return TypeInt::INT; // Overflow?
264 int32_t D = java_multiply(hi0, hi1);
265 if( (double)D != b*d ) return TypeInt::INT; // Overflow?
266
267 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
268 else { lo0 = B; hi0 = A; }
269 if( C < D ) {
270 if( C < lo0 ) lo0 = C;
271 if( D > hi0 ) hi0 = D;
272 } else {
273 if( D < lo0 ) lo0 = D;
274 if( C > hi0 ) hi0 = C;
275 }
276 return TypeInt::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
277 }
278
279
280 //=============================================================================
281 //------------------------------Ideal------------------------------------------
282 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
283 Node *MulLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
284 // Swap constant to right
285 jlong con;
286 if ((con = in(1)->find_long_con(0)) != 0) {
287 swap_edges(1, 2);
288 // Finish rest of method to use info in 'con'
289 } else if ((con = in(2)->find_long_con(0)) == 0) {
290 return MulNode::Ideal(phase, can_reshape);
291 }
292
293 // Now we have a constant Node on the right and the constant in con
294 if( con == CONST64(0) ) return NULL; // By zero is handled by Value call
295 if( con == CONST64(1) ) return NULL; // By one is handled by Identity call
296
297 // Check for negative constant; if so negate the final result
298 bool sign_flip = false;
299 if( con < 0 ) {
300 con = -con;
301 sign_flip = true;
302 }
303
304 // Get low bit; check for being the only bit
305 Node *res = NULL;
306 jlong bit1 = con & -con; // Extract low bit
307 if( bit1 == con ) { // Found a power of 2?
308 res = new LShiftLNode( in(1), phase->intcon(log2_long(bit1)) );
309 } else {
310
311 // Check for constant with 2 bits set
312 jlong bit2 = con-bit1;
313 bit2 = bit2 & -bit2; // Extract 2nd bit
314 if( bit2 + bit1 == con ) { // Found all bits in con?
315 Node *n1 = phase->transform( new LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ) );
316 Node *n2 = phase->transform( new LShiftLNode( in(1), phase->intcon(log2_long(bit2)) ) );
317 res = new AddLNode( n2, n1 );
318
319 } else if (is_power_of_2_long(con+1)) {
320 // Sleezy: power-of-2 -1. Next time be generic.
321 jlong temp = (jlong) (con + 1);
322 Node *n1 = phase->transform( new LShiftLNode( in(1), phase->intcon(log2_long(temp)) ) );
323 res = new SubLNode( n1, in(1) );
324 } else {
325 return MulNode::Ideal(phase, can_reshape);
326 }
327 }
328
329 if( sign_flip ) { // Need to negate result?
330 res = phase->transform(res);// Transform, before making the zero con
331 res = new SubLNode(phase->longcon(0),res);
332 }
333
334 return res; // Return final result
335 }
336
337 //------------------------------mul_ring---------------------------------------
338 // Compute the product type of two integer ranges into this node.
339 const Type *MulLNode::mul_ring(const Type *t0, const Type *t1) const {
340 const TypeLong *r0 = t0->is_long(); // Handy access
341 const TypeLong *r1 = t1->is_long();
342
343 // Fetch endpoints of all ranges
344 jlong lo0 = r0->_lo;
345 double a = (double)lo0;
346 jlong hi0 = r0->_hi;
347 double b = (double)hi0;
348 jlong lo1 = r1->_lo;
349 double c = (double)lo1;
350 jlong hi1 = r1->_hi;
351 double d = (double)hi1;
352
353 // Compute all endpoints & check for overflow
354 jlong A = java_multiply(lo0, lo1);
355 if( (double)A != a*c ) return TypeLong::LONG; // Overflow?
356 jlong B = java_multiply(lo0, hi1);
357 if( (double)B != a*d ) return TypeLong::LONG; // Overflow?
358 jlong C = java_multiply(hi0, lo1);
359 if( (double)C != b*c ) return TypeLong::LONG; // Overflow?
360 jlong D = java_multiply(hi0, hi1);
361 if( (double)D != b*d ) return TypeLong::LONG; // Overflow?
362
363 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
364 else { lo0 = B; hi0 = A; }
365 if( C < D ) {
366 if( C < lo0 ) lo0 = C;
367 if( D > hi0 ) hi0 = D;
368 } else {
369 if( D < lo0 ) lo0 = D;
370 if( C > hi0 ) hi0 = C;
371 }
372 return TypeLong::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
373 }
374
375 //=============================================================================
376 //------------------------------mul_ring---------------------------------------
377 // Compute the product type of two double ranges into this node.
378 const Type *MulFNode::mul_ring(const Type *t0, const Type *t1) const {
379 if( t0 == Type::FLOAT || t1 == Type::FLOAT ) return Type::FLOAT;
380 return TypeF::make( t0->getf() * t1->getf() );
381 }
382
383 //=============================================================================
384 //------------------------------mul_ring---------------------------------------
385 // Compute the product type of two double ranges into this node.
386 const Type *MulDNode::mul_ring(const Type *t0, const Type *t1) const {
387 if( t0 == Type::DOUBLE || t1 == Type::DOUBLE ) return Type::DOUBLE;
388 // We must be multiplying 2 double constants.
389 return TypeD::make( t0->getd() * t1->getd() );
390 }
391
392 //=============================================================================
393 //------------------------------Value------------------------------------------
394 const Type* MulHiLNode::Value(PhaseGVN* phase) const {
395 // Either input is TOP ==> the result is TOP
396 const Type *t1 = phase->type( in(1) );
397 const Type *t2 = phase->type( in(2) );
398 if( t1 == Type::TOP ) return Type::TOP;
399 if( t2 == Type::TOP ) return Type::TOP;
400
401 // Either input is BOTTOM ==> the result is the local BOTTOM
402 const Type *bot = bottom_type();
403 if( (t1 == bot) || (t2 == bot) ||
404 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
405 return bot;
406
407 // It is not worth trying to constant fold this stuff!
408 return TypeLong::LONG;
409 }
410
411 //=============================================================================
412 //------------------------------mul_ring---------------------------------------
413 // Supplied function returns the product of the inputs IN THE CURRENT RING.
414 // For the logical operations the ring's MUL is really a logical AND function.
415 // This also type-checks the inputs for sanity. Guaranteed never to
416 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
417 const Type *AndINode::mul_ring( const Type *t0, const Type *t1 ) const {
418 const TypeInt *r0 = t0->is_int(); // Handy access
419 const TypeInt *r1 = t1->is_int();
420 int widen = MAX2(r0->_widen,r1->_widen);
421
422 // If either input is a constant, might be able to trim cases
423 if( !r0->is_con() && !r1->is_con() )
424 return TypeInt::INT; // No constants to be had
425
426 // Both constants? Return bits
427 if( r0->is_con() && r1->is_con() )
428 return TypeInt::make( r0->get_con() & r1->get_con() );
429
430 if( r0->is_con() && r0->get_con() > 0 )
431 return TypeInt::make(0, r0->get_con(), widen);
432
433 if( r1->is_con() && r1->get_con() > 0 )
434 return TypeInt::make(0, r1->get_con(), widen);
435
436 if( r0 == TypeInt::BOOL || r1 == TypeInt::BOOL ) {
437 return TypeInt::BOOL;
438 }
439
440 return TypeInt::INT; // No constants to be had
441 }
442
443 //------------------------------Identity---------------------------------------
444 // Masking off the high bits of an unsigned load is not required
445 Node* AndINode::Identity(PhaseGVN* phase) {
446
447 // x & x => x
448 if (phase->eqv(in(1), in(2))) return in(1);
449
450 Node* in1 = in(1);
451 uint op = in1->Opcode();
452 const TypeInt* t2 = phase->type(in(2))->isa_int();
453 if (t2 && t2->is_con()) {
454 int con = t2->get_con();
455 // Masking off high bits which are always zero is useless.
456 const TypeInt* t1 = phase->type( in(1) )->isa_int();
457 if (t1 != NULL && t1->_lo >= 0) {
458 jint t1_support = right_n_bits(1 + log2_intptr(t1->_hi));
459 if ((t1_support & con) == t1_support)
460 return in1;
461 }
462 // Masking off the high bits of a unsigned-shift-right is not
463 // needed either.
464 if (op == Op_URShiftI) {
465 const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
466 if (t12 && t12->is_con()) { // Shift is by a constant
467 int shift = t12->get_con();
468 shift &= BitsPerJavaInteger - 1; // semantics of Java shifts
469 int mask = max_juint >> shift;
470 if ((mask & con) == mask) // If AND is useless, skip it
471 return in1;
472 }
473 }
474 }
475 return MulNode::Identity(phase);
476 }
477
478 //------------------------------Ideal------------------------------------------
479 Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) {
480 // Special case constant AND mask
481 const TypeInt *t2 = phase->type( in(2) )->isa_int();
482 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
483 const int mask = t2->get_con();
484 Node *load = in(1);
485 uint lop = load->Opcode();
486
487 // Masking bits off of a Character? Hi bits are already zero.
488 if( lop == Op_LoadUS &&
489 (mask & 0xFFFF0000) ) // Can we make a smaller mask?
490 return new AndINode(load,phase->intcon(mask&0xFFFF));
491
492 // Masking bits off of a Short? Loading a Character does some masking
493 if (can_reshape &&
494 load->outcnt() == 1 && load->unique_out() == this) {
495 if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) {
496 Node *ldus = new LoadUSNode(load->in(MemNode::Control),
497 load->in(MemNode::Memory),
498 load->in(MemNode::Address),
499 load->adr_type(),
500 TypeInt::CHAR, MemNode::unordered);
501 ldus = phase->transform(ldus);
502 return new AndINode(ldus, phase->intcon(mask & 0xFFFF));
503 }
504
505 // Masking sign bits off of a Byte? Do an unsigned byte load plus
506 // an and.
507 if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) {
508 Node* ldub = new LoadUBNode(load->in(MemNode::Control),
509 load->in(MemNode::Memory),
510 load->in(MemNode::Address),
511 load->adr_type(),
512 TypeInt::UBYTE, MemNode::unordered);
513 ldub = phase->transform(ldub);
514 return new AndINode(ldub, phase->intcon(mask));
515 }
516 }
517
518 // Masking off sign bits? Dont make them!
519 if( lop == Op_RShiftI ) {
520 const TypeInt *t12 = phase->type(load->in(2))->isa_int();
521 if( t12 && t12->is_con() ) { // Shift is by a constant
522 int shift = t12->get_con();
523 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
524 const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift);
525 // If the AND'ing of the 2 masks has no bits, then only original shifted
526 // bits survive. NO sign-extension bits survive the maskings.
527 if( (sign_bits_mask & mask) == 0 ) {
528 // Use zero-fill shift instead
529 Node *zshift = phase->transform(new URShiftINode(load->in(1),load->in(2)));
530 return new AndINode( zshift, in(2) );
531 }
532 }
533 }
534
535 // Check for 'negate/and-1', a pattern emitted when someone asks for
536 // 'mod 2'. Negate leaves the low order bit unchanged (think: complement
537 // plus 1) and the mask is of the low order bit. Skip the negate.
538 if( lop == Op_SubI && mask == 1 && load->in(1) &&
539 phase->type(load->in(1)) == TypeInt::ZERO )
540 return new AndINode( load->in(2), in(2) );
541
542 return MulNode::Ideal(phase, can_reshape);
543 }
544
545 //=============================================================================
546 //------------------------------mul_ring---------------------------------------
547 // Supplied function returns the product of the inputs IN THE CURRENT RING.
548 // For the logical operations the ring's MUL is really a logical AND function.
549 // This also type-checks the inputs for sanity. Guaranteed never to
550 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
551 const Type *AndLNode::mul_ring( const Type *t0, const Type *t1 ) const {
552 const TypeLong *r0 = t0->is_long(); // Handy access
553 const TypeLong *r1 = t1->is_long();
554 int widen = MAX2(r0->_widen,r1->_widen);
555
556 // If either input is a constant, might be able to trim cases
557 if( !r0->is_con() && !r1->is_con() )
558 return TypeLong::LONG; // No constants to be had
559
560 // Both constants? Return bits
561 if( r0->is_con() && r1->is_con() )
562 return TypeLong::make( r0->get_con() & r1->get_con() );
563
564 if( r0->is_con() && r0->get_con() > 0 )
565 return TypeLong::make(CONST64(0), r0->get_con(), widen);
566
567 if( r1->is_con() && r1->get_con() > 0 )
568 return TypeLong::make(CONST64(0), r1->get_con(), widen);
569
570 return TypeLong::LONG; // No constants to be had
571 }
572
573 //------------------------------Identity---------------------------------------
574 // Masking off the high bits of an unsigned load is not required
575 Node* AndLNode::Identity(PhaseGVN* phase) {
576
577 // x & x => x
578 if (phase->eqv(in(1), in(2))) return in(1);
579
580 Node *usr = in(1);
581 const TypeLong *t2 = phase->type( in(2) )->isa_long();
582 if( t2 && t2->is_con() ) {
583 jlong con = t2->get_con();
584 // Masking off high bits which are always zero is useless.
585 const TypeLong* t1 = phase->type( in(1) )->isa_long();
586 if (t1 != NULL && t1->_lo >= 0) {
587 int bit_count = log2_long(t1->_hi) + 1;
588 jlong t1_support = jlong(max_julong >> (BitsPerJavaLong - bit_count));
589 if ((t1_support & con) == t1_support)
590 return usr;
591 }
592 uint lop = usr->Opcode();
593 // Masking off the high bits of a unsigned-shift-right is not
594 // needed either.
595 if( lop == Op_URShiftL ) {
596 const TypeInt *t12 = phase->type( usr->in(2) )->isa_int();
597 if( t12 && t12->is_con() ) { // Shift is by a constant
598 int shift = t12->get_con();
599 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
600 jlong mask = max_julong >> shift;
601 if( (mask&con) == mask ) // If AND is useless, skip it
602 return usr;
603 }
604 }
605 }
606 return MulNode::Identity(phase);
607 }
608
609 //------------------------------Ideal------------------------------------------
610 Node *AndLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
611 // Special case constant AND mask
612 const TypeLong *t2 = phase->type( in(2) )->isa_long();
613 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
614 const jlong mask = t2->get_con();
615
616 Node* in1 = in(1);
617 uint op = in1->Opcode();
618
619 // Are we masking a long that was converted from an int with a mask
620 // that fits in 32-bits? Commute them and use an AndINode. Don't
621 // convert masks which would cause a sign extension of the integer
622 // value. This check includes UI2L masks (0x00000000FFFFFFFF) which
623 // would be optimized away later in Identity.
624 if (op == Op_ConvI2L && (mask & UCONST64(0xFFFFFFFF80000000)) == 0) {
625 Node* andi = new AndINode(in1->in(1), phase->intcon(mask));
626 andi = phase->transform(andi);
627 return new ConvI2LNode(andi);
628 }
629
630 // Masking off sign bits? Dont make them!
631 if (op == Op_RShiftL) {
632 const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
633 if( t12 && t12->is_con() ) { // Shift is by a constant
634 int shift = t12->get_con();
635 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
636 const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - shift)) -1);
637 // If the AND'ing of the 2 masks has no bits, then only original shifted
638 // bits survive. NO sign-extension bits survive the maskings.
639 if( (sign_bits_mask & mask) == 0 ) {
640 // Use zero-fill shift instead
641 Node *zshift = phase->transform(new URShiftLNode(in1->in(1), in1->in(2)));
642 return new AndLNode(zshift, in(2));
643 }
644 }
645 }
646
647 return MulNode::Ideal(phase, can_reshape);
648 }
649
650 //=============================================================================
651 //------------------------------Identity---------------------------------------
652 Node* LShiftINode::Identity(PhaseGVN* phase) {
653 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
654 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) ? in(1) : this;
655 }
656
657 //------------------------------Ideal------------------------------------------
658 // If the right input is a constant, and the left input is an add of a
659 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
660 Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
661 const Type *t = phase->type( in(2) );
662 if( t == Type::TOP ) return NULL; // Right input is dead
663 const TypeInt *t2 = t->isa_int();
664 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
665 const int con = t2->get_con() & ( BitsPerInt - 1 ); // masked shift count
666
667 if ( con == 0 ) return NULL; // let Identity() handle 0 shift count
668
669 // Left input is an add of a constant?
670 Node *add1 = in(1);
671 int add1_op = add1->Opcode();
672 if( add1_op == Op_AddI ) { // Left input is an add?
673 assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" );
674 const TypeInt *t12 = phase->type(add1->in(2))->isa_int();
675 if( t12 && t12->is_con() ){ // Left input is an add of a con?
676 // Transform is legal, but check for profit. Avoid breaking 'i2s'
677 // and 'i2b' patterns which typically fold into 'StoreC/StoreB'.
678 if( con < 16 ) {
679 // Compute X << con0
680 Node *lsh = phase->transform( new LShiftINode( add1->in(1), in(2) ) );
681 // Compute X<<con0 + (con1<<con0)
682 return new AddINode( lsh, phase->intcon(t12->get_con() << con));
683 }
684 }
685 }
686
687 // Check for "(x>>c0)<<c0" which just masks off low bits
688 if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) &&
689 add1->in(2) == in(2) )
690 // Convert to "(x & -(1<<c0))"
691 return new AndINode(add1->in(1),phase->intcon( -(1<<con)));
692
693 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
694 if( add1_op == Op_AndI ) {
695 Node *add2 = add1->in(1);
696 int add2_op = add2->Opcode();
697 if( (add2_op == Op_RShiftI || add2_op == Op_URShiftI ) &&
698 add2->in(2) == in(2) ) {
699 // Convert to "(x & (Y<<c0))"
700 Node *y_sh = phase->transform( new LShiftINode( add1->in(2), in(2) ) );
701 return new AndINode( add2->in(1), y_sh );
702 }
703 }
704
705 // Check for ((x & ((1<<(32-c0))-1)) << c0) which ANDs off high bits
706 // before shifting them away.
707 const jint bits_mask = right_n_bits(BitsPerJavaInteger-con);
708 if( add1_op == Op_AndI &&
709 phase->type(add1->in(2)) == TypeInt::make( bits_mask ) )
710 return new LShiftINode( add1->in(1), in(2) );
711
712 return NULL;
713 }
714
715 //------------------------------Value------------------------------------------
716 // A LShiftINode shifts its input2 left by input1 amount.
717 const Type* LShiftINode::Value(PhaseGVN* phase) const {
718 const Type *t1 = phase->type( in(1) );
719 const Type *t2 = phase->type( in(2) );
720 // Either input is TOP ==> the result is TOP
721 if( t1 == Type::TOP ) return Type::TOP;
722 if( t2 == Type::TOP ) return Type::TOP;
723
724 // Left input is ZERO ==> the result is ZERO.
725 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
726 // Shift by zero does nothing
727 if( t2 == TypeInt::ZERO ) return t1;
728
729 // Either input is BOTTOM ==> the result is BOTTOM
730 if( (t1 == TypeInt::INT) || (t2 == TypeInt::INT) ||
731 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
732 return TypeInt::INT;
733
734 const TypeInt *r1 = t1->is_int(); // Handy access
735 const TypeInt *r2 = t2->is_int(); // Handy access
736
737 if (!r2->is_con())
738 return TypeInt::INT;
739
740 uint shift = r2->get_con();
741 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
742 // Shift by a multiple of 32 does nothing:
743 if (shift == 0) return t1;
744
745 // If the shift is a constant, shift the bounds of the type,
746 // unless this could lead to an overflow.
747 if (!r1->is_con()) {
748 jint lo = r1->_lo, hi = r1->_hi;
749 if (((lo << shift) >> shift) == lo &&
750 ((hi << shift) >> shift) == hi) {
751 // No overflow. The range shifts up cleanly.
752 return TypeInt::make((jint)lo << (jint)shift,
753 (jint)hi << (jint)shift,
754 MAX2(r1->_widen,r2->_widen));
755 }
756 return TypeInt::INT;
757 }
758
759 return TypeInt::make( (jint)r1->get_con() << (jint)shift );
760 }
761
762 //=============================================================================
763 //------------------------------Identity---------------------------------------
764 Node* LShiftLNode::Identity(PhaseGVN* phase) {
765 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
766 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
767 }
768
769 //------------------------------Ideal------------------------------------------
770 // If the right input is a constant, and the left input is an add of a
771 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
772 Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
773 const Type *t = phase->type( in(2) );
774 if( t == Type::TOP ) return NULL; // Right input is dead
775 const TypeInt *t2 = t->isa_int();
776 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
777 const int con = t2->get_con() & ( BitsPerLong - 1 ); // masked shift count
778
779 if ( con == 0 ) return NULL; // let Identity() handle 0 shift count
780
781 // Left input is an add of a constant?
782 Node *add1 = in(1);
783 int add1_op = add1->Opcode();
784 if( add1_op == Op_AddL ) { // Left input is an add?
785 // Avoid dead data cycles from dead loops
786 assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" );
787 const TypeLong *t12 = phase->type(add1->in(2))->isa_long();
788 if( t12 && t12->is_con() ){ // Left input is an add of a con?
789 // Compute X << con0
790 Node *lsh = phase->transform( new LShiftLNode( add1->in(1), in(2) ) );
791 // Compute X<<con0 + (con1<<con0)
792 return new AddLNode( lsh, phase->longcon(t12->get_con() << con));
793 }
794 }
795
796 // Check for "(x>>c0)<<c0" which just masks off low bits
797 if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) &&
798 add1->in(2) == in(2) )
799 // Convert to "(x & -(1<<c0))"
800 return new AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con)));
801
802 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
803 if( add1_op == Op_AndL ) {
804 Node *add2 = add1->in(1);
805 int add2_op = add2->Opcode();
806 if( (add2_op == Op_RShiftL || add2_op == Op_URShiftL ) &&
807 add2->in(2) == in(2) ) {
808 // Convert to "(x & (Y<<c0))"
809 Node *y_sh = phase->transform( new LShiftLNode( add1->in(2), in(2) ) );
810 return new AndLNode( add2->in(1), y_sh );
811 }
812 }
813
814 // Check for ((x & ((CONST64(1)<<(64-c0))-1)) << c0) which ANDs off high bits
815 // before shifting them away.
816 const jlong bits_mask = jlong(max_julong >> con);
817 if( add1_op == Op_AndL &&
818 phase->type(add1->in(2)) == TypeLong::make( bits_mask ) )
819 return new LShiftLNode( add1->in(1), in(2) );
820
821 return NULL;
822 }
823
824 //------------------------------Value------------------------------------------
825 // A LShiftLNode shifts its input2 left by input1 amount.
826 const Type* LShiftLNode::Value(PhaseGVN* phase) const {
827 const Type *t1 = phase->type( in(1) );
828 const Type *t2 = phase->type( in(2) );
829 // Either input is TOP ==> the result is TOP
830 if( t1 == Type::TOP ) return Type::TOP;
831 if( t2 == Type::TOP ) return Type::TOP;
832
833 // Left input is ZERO ==> the result is ZERO.
834 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
835 // Shift by zero does nothing
836 if( t2 == TypeInt::ZERO ) return t1;
837
838 // Either input is BOTTOM ==> the result is BOTTOM
839 if( (t1 == TypeLong::LONG) || (t2 == TypeInt::INT) ||
840 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
841 return TypeLong::LONG;
842
843 const TypeLong *r1 = t1->is_long(); // Handy access
844 const TypeInt *r2 = t2->is_int(); // Handy access
845
846 if (!r2->is_con())
847 return TypeLong::LONG;
848
849 uint shift = r2->get_con();
850 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
851 // Shift by a multiple of 64 does nothing:
852 if (shift == 0) return t1;
853
854 // If the shift is a constant, shift the bounds of the type,
855 // unless this could lead to an overflow.
856 if (!r1->is_con()) {
857 jlong lo = r1->_lo, hi = r1->_hi;
858 if (((lo << shift) >> shift) == lo &&
859 ((hi << shift) >> shift) == hi) {
860 // No overflow. The range shifts up cleanly.
861 return TypeLong::make((jlong)lo << (jint)shift,
862 (jlong)hi << (jint)shift,
863 MAX2(r1->_widen,r2->_widen));
864 }
865 return TypeLong::LONG;
866 }
867
868 return TypeLong::make( (jlong)r1->get_con() << (jint)shift );
869 }
870
871 //=============================================================================
872 //------------------------------Identity---------------------------------------
873 Node* RShiftINode::Identity(PhaseGVN* phase) {
874 const TypeInt *t2 = phase->type(in(2))->isa_int();
875 if( !t2 ) return this;
876 if ( t2->is_con() && ( t2->get_con() & ( BitsPerInt - 1 ) ) == 0 )
877 return in(1);
878
879 // Check for useless sign-masking
880 if( in(1)->Opcode() == Op_LShiftI &&
881 in(1)->req() == 3 &&
882 in(1)->in(2) == in(2) &&
883 t2->is_con() ) {
884 uint shift = t2->get_con();
885 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
886 // Compute masks for which this shifting doesn't change
887 int lo = (-1 << (BitsPerJavaInteger - shift-1)); // FFFF8000
888 int hi = ~lo; // 00007FFF
889 const TypeInt *t11 = phase->type(in(1)->in(1))->isa_int();
890 if( !t11 ) return this;
891 // Does actual value fit inside of mask?
892 if( lo <= t11->_lo && t11->_hi <= hi )
893 return in(1)->in(1); // Then shifting is a nop
894 }
895
896 return this;
897 }
898
899 //------------------------------Ideal------------------------------------------
900 Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
901 // Inputs may be TOP if they are dead.
902 const TypeInt *t1 = phase->type( in(1) )->isa_int();
903 if( !t1 ) return NULL; // Left input is an integer
904 const TypeInt *t2 = phase->type( in(2) )->isa_int();
905 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
906 const TypeInt *t3; // type of in(1).in(2)
907 int shift = t2->get_con();
908 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
909
910 if ( shift == 0 ) return NULL; // let Identity() handle 0 shift count
911
912 // Check for (x & 0xFF000000) >> 24, whose mask can be made smaller.
913 // Such expressions arise normally from shift chains like (byte)(x >> 24).
914 const Node *mask = in(1);
915 if( mask->Opcode() == Op_AndI &&
916 (t3 = phase->type(mask->in(2))->isa_int()) &&
917 t3->is_con() ) {
918 Node *x = mask->in(1);
919 jint maskbits = t3->get_con();
920 // Convert to "(x >> shift) & (mask >> shift)"
921 Node *shr_nomask = phase->transform( new RShiftINode(mask->in(1), in(2)) );
922 return new AndINode(shr_nomask, phase->intcon( maskbits >> shift));
923 }
924
925 // Check for "(short[i] <<16)>>16" which simply sign-extends
926 const Node *shl = in(1);
927 if( shl->Opcode() != Op_LShiftI ) return NULL;
928
929 if( shift == 16 &&
930 (t3 = phase->type(shl->in(2))->isa_int()) &&
931 t3->is_con(16) ) {
932 Node *ld = shl->in(1);
933 if( ld->Opcode() == Op_LoadS ) {
934 // Sign extension is just useless here. Return a RShiftI of zero instead
935 // returning 'ld' directly. We cannot return an old Node directly as
936 // that is the job of 'Identity' calls and Identity calls only work on
937 // direct inputs ('ld' is an extra Node removed from 'this'). The
938 // combined optimization requires Identity only return direct inputs.
939 set_req(1, ld);
940 set_req(2, phase->intcon(0));
941 return this;
942 }
943 else if( can_reshape &&
944 ld->Opcode() == Op_LoadUS &&
945 ld->outcnt() == 1 && ld->unique_out() == shl)
946 // Replace zero-extension-load with sign-extension-load
947 return new LoadSNode( ld->in(MemNode::Control),
948 ld->in(MemNode::Memory),
949 ld->in(MemNode::Address),
950 ld->adr_type(), TypeInt::SHORT,
951 MemNode::unordered);
952 }
953
954 // Check for "(byte[i] <<24)>>24" which simply sign-extends
955 if( shift == 24 &&
956 (t3 = phase->type(shl->in(2))->isa_int()) &&
957 t3->is_con(24) ) {
958 Node *ld = shl->in(1);
959 if( ld->Opcode() == Op_LoadB ) {
960 // Sign extension is just useless here
961 set_req(1, ld);
962 set_req(2, phase->intcon(0));
963 return this;
964 }
965 }
966
967 return NULL;
968 }
969
970 //------------------------------Value------------------------------------------
971 // A RShiftINode shifts its input2 right by input1 amount.
972 const Type* RShiftINode::Value(PhaseGVN* phase) const {
973 const Type *t1 = phase->type( in(1) );
974 const Type *t2 = phase->type( in(2) );
975 // Either input is TOP ==> the result is TOP
976 if( t1 == Type::TOP ) return Type::TOP;
977 if( t2 == Type::TOP ) return Type::TOP;
978
979 // Left input is ZERO ==> the result is ZERO.
980 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
981 // Shift by zero does nothing
982 if( t2 == TypeInt::ZERO ) return t1;
983
984 // Either input is BOTTOM ==> the result is BOTTOM
985 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
986 return TypeInt::INT;
987
988 if (t2 == TypeInt::INT)
989 return TypeInt::INT;
990
991 const TypeInt *r1 = t1->is_int(); // Handy access
992 const TypeInt *r2 = t2->is_int(); // Handy access
993
994 // If the shift is a constant, just shift the bounds of the type.
995 // For example, if the shift is 31, we just propagate sign bits.
996 if (r2->is_con()) {
997 uint shift = r2->get_con();
998 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
999 // Shift by a multiple of 32 does nothing:
1000 if (shift == 0) return t1;
1001 // Calculate reasonably aggressive bounds for the result.
1002 // This is necessary if we are to correctly type things
1003 // like (x<<24>>24) == ((byte)x).
1004 jint lo = (jint)r1->_lo >> (jint)shift;
1005 jint hi = (jint)r1->_hi >> (jint)shift;
1006 assert(lo <= hi, "must have valid bounds");
1007 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1008 #ifdef ASSERT
1009 // Make sure we get the sign-capture idiom correct.
1010 if (shift == BitsPerJavaInteger-1) {
1011 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>31 of + is 0");
1012 if (r1->_hi < 0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1");
1013 }
1014 #endif
1015 return ti;
1016 }
1017
1018 if( !r1->is_con() || !r2->is_con() )
1019 return TypeInt::INT;
1020
1021 // Signed shift right
1022 return TypeInt::make( r1->get_con() >> (r2->get_con()&31) );
1023 }
1024
1025 //=============================================================================
1026 //------------------------------Identity---------------------------------------
1027 Node* RShiftLNode::Identity(PhaseGVN* phase) {
1028 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
1029 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
1030 }
1031
1032 //------------------------------Value------------------------------------------
1033 // A RShiftLNode shifts its input2 right by input1 amount.
1034 const Type* RShiftLNode::Value(PhaseGVN* phase) const {
1035 const Type *t1 = phase->type( in(1) );
1036 const Type *t2 = phase->type( in(2) );
1037 // Either input is TOP ==> the result is TOP
1038 if( t1 == Type::TOP ) return Type::TOP;
1039 if( t2 == Type::TOP ) return Type::TOP;
1040
1041 // Left input is ZERO ==> the result is ZERO.
1042 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1043 // Shift by zero does nothing
1044 if( t2 == TypeInt::ZERO ) return t1;
1045
1046 // Either input is BOTTOM ==> the result is BOTTOM
1047 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1048 return TypeLong::LONG;
1049
1050 if (t2 == TypeInt::INT)
1051 return TypeLong::LONG;
1052
1053 const TypeLong *r1 = t1->is_long(); // Handy access
1054 const TypeInt *r2 = t2->is_int (); // Handy access
1055
1056 // If the shift is a constant, just shift the bounds of the type.
1057 // For example, if the shift is 63, we just propagate sign bits.
1058 if (r2->is_con()) {
1059 uint shift = r2->get_con();
1060 shift &= (2*BitsPerJavaInteger)-1; // semantics of Java shifts
1061 // Shift by a multiple of 64 does nothing:
1062 if (shift == 0) return t1;
1063 // Calculate reasonably aggressive bounds for the result.
1064 // This is necessary if we are to correctly type things
1065 // like (x<<24>>24) == ((byte)x).
1066 jlong lo = (jlong)r1->_lo >> (jlong)shift;
1067 jlong hi = (jlong)r1->_hi >> (jlong)shift;
1068 assert(lo <= hi, "must have valid bounds");
1069 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1070 #ifdef ASSERT
1071 // Make sure we get the sign-capture idiom correct.
1072 if (shift == (2*BitsPerJavaInteger)-1) {
1073 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>63 of + is 0");
1074 if (r1->_hi < 0) assert(tl == TypeLong::MINUS_1, ">>63 of - is -1");
1075 }
1076 #endif
1077 return tl;
1078 }
1079
1080 return TypeLong::LONG; // Give up
1081 }
1082
1083 //=============================================================================
1084 //------------------------------Identity---------------------------------------
1085 Node* URShiftINode::Identity(PhaseGVN* phase) {
1086 const TypeInt *ti = phase->type( in(2) )->isa_int();
1087 if ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) return in(1);
1088
1089 // Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x".
1090 // Happens during new-array length computation.
1091 // Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)]
1092 Node *add = in(1);
1093 if( add->Opcode() == Op_AddI ) {
1094 const TypeInt *t2 = phase->type(add->in(2))->isa_int();
1095 if( t2 && t2->is_con(wordSize - 1) &&
1096 add->in(1)->Opcode() == Op_LShiftI ) {
1097 // Check that shift_counts are LogBytesPerWord
1098 Node *lshift_count = add->in(1)->in(2);
1099 const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int();
1100 if( t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) &&
1101 t_lshift_count == phase->type(in(2)) ) {
1102 Node *x = add->in(1)->in(1);
1103 const TypeInt *t_x = phase->type(x)->isa_int();
1104 if( t_x != NULL && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord) ) {
1105 return x;
1106 }
1107 }
1108 }
1109 }
1110
1111 return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this;
1112 }
1113
1114 //------------------------------Ideal------------------------------------------
1115 Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
1116 const TypeInt *t2 = phase->type( in(2) )->isa_int();
1117 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
1118 const int con = t2->get_con() & 31; // Shift count is always masked
1119 if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count
1120 // We'll be wanting the right-shift amount as a mask of that many bits
1121 const int mask = right_n_bits(BitsPerJavaInteger - con);
1122
1123 int in1_op = in(1)->Opcode();
1124
1125 // Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32
1126 if( in1_op == Op_URShiftI ) {
1127 const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int();
1128 if( t12 && t12->is_con() ) { // Right input is a constant
1129 assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" );
1130 const int con2 = t12->get_con() & 31; // Shift count is always masked
1131 const int con3 = con+con2;
1132 if( con3 < 32 ) // Only merge shifts if total is < 32
1133 return new URShiftINode( in(1)->in(1), phase->intcon(con3) );
1134 }
1135 }
1136
1137 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
1138 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1139 // If Q is "X << z" the rounding is useless. Look for patterns like
1140 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
1141 Node *add = in(1);
1142 if( in1_op == Op_AddI ) {
1143 Node *lshl = add->in(1);
1144 if( lshl->Opcode() == Op_LShiftI &&
1145 phase->type(lshl->in(2)) == t2 ) {
1146 Node *y_z = phase->transform( new URShiftINode(add->in(2),in(2)) );
1147 Node *sum = phase->transform( new AddINode( lshl->in(1), y_z ) );
1148 return new AndINode( sum, phase->intcon(mask) );
1149 }
1150 }
1151
1152 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
1153 // This shortens the mask. Also, if we are extracting a high byte and
1154 // storing it to a buffer, the mask will be removed completely.
1155 Node *andi = in(1);
1156 if( in1_op == Op_AndI ) {
1157 const TypeInt *t3 = phase->type( andi->in(2) )->isa_int();
1158 if( t3 && t3->is_con() ) { // Right input is a constant
1159 jint mask2 = t3->get_con();
1160 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
1161 Node *newshr = phase->transform( new URShiftINode(andi->in(1), in(2)) );
1162 return new AndINode(newshr, phase->intcon(mask2));
1163 // The negative values are easier to materialize than positive ones.
1164 // A typical case from address arithmetic is ((x & ~15) >> 4).
1165 // It's better to change that to ((x >> 4) & ~0) versus
1166 // ((x >> 4) & 0x0FFFFFFF). The difference is greatest in LP64.
1167 }
1168 }
1169
1170 // Check for "(X << z ) >>> z" which simply zero-extends
1171 Node *shl = in(1);
1172 if( in1_op == Op_LShiftI &&
1173 phase->type(shl->in(2)) == t2 )
1174 return new AndINode( shl->in(1), phase->intcon(mask) );
1175
1176 return NULL;
1177 }
1178
1179 //------------------------------Value------------------------------------------
1180 // A URShiftINode shifts its input2 right by input1 amount.
1181 const Type* URShiftINode::Value(PhaseGVN* phase) const {
1182 // (This is a near clone of RShiftINode::Value.)
1183 const Type *t1 = phase->type( in(1) );
1184 const Type *t2 = phase->type( in(2) );
1185 // Either input is TOP ==> the result is TOP
1186 if( t1 == Type::TOP ) return Type::TOP;
1187 if( t2 == Type::TOP ) return Type::TOP;
1188
1189 // Left input is ZERO ==> the result is ZERO.
1190 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
1191 // Shift by zero does nothing
1192 if( t2 == TypeInt::ZERO ) return t1;
1193
1194 // Either input is BOTTOM ==> the result is BOTTOM
1195 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1196 return TypeInt::INT;
1197
1198 if (t2 == TypeInt::INT)
1199 return TypeInt::INT;
1200
1201 const TypeInt *r1 = t1->is_int(); // Handy access
1202 const TypeInt *r2 = t2->is_int(); // Handy access
1203
1204 if (r2->is_con()) {
1205 uint shift = r2->get_con();
1206 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
1207 // Shift by a multiple of 32 does nothing:
1208 if (shift == 0) return t1;
1209 // Calculate reasonably aggressive bounds for the result.
1210 jint lo = (juint)r1->_lo >> (juint)shift;
1211 jint hi = (juint)r1->_hi >> (juint)shift;
1212 if (r1->_hi >= 0 && r1->_lo < 0) {
1213 // If the type has both negative and positive values,
1214 // there are two separate sub-domains to worry about:
1215 // The positive half and the negative half.
1216 jint neg_lo = lo;
1217 jint neg_hi = (juint)-1 >> (juint)shift;
1218 jint pos_lo = (juint) 0 >> (juint)shift;
1219 jint pos_hi = hi;
1220 lo = MIN2(neg_lo, pos_lo); // == 0
1221 hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
1222 }
1223 assert(lo <= hi, "must have valid bounds");
1224 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1225 #ifdef ASSERT
1226 // Make sure we get the sign-capture idiom correct.
1227 if (shift == BitsPerJavaInteger-1) {
1228 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>>31 of + is 0");
1229 if (r1->_hi < 0) assert(ti == TypeInt::ONE, ">>>31 of - is +1");
1230 }
1231 #endif
1232 return ti;
1233 }
1234
1235 //
1236 // Do not support shifted oops in info for GC
1237 //
1238 // else if( t1->base() == Type::InstPtr ) {
1239 //
1240 // const TypeInstPtr *o = t1->is_instptr();
1241 // if( t1->singleton() )
1242 // return TypeInt::make( ((uint32_t)o->const_oop() + o->_offset) >> shift );
1243 // }
1244 // else if( t1->base() == Type::KlassPtr ) {
1245 // const TypeKlassPtr *o = t1->is_klassptr();
1246 // if( t1->singleton() )
1247 // return TypeInt::make( ((uint32_t)o->const_oop() + o->_offset) >> shift );
1248 // }
1249
1250 return TypeInt::INT;
1251 }
1252
1253 //=============================================================================
1254 //------------------------------Identity---------------------------------------
1255 Node* URShiftLNode::Identity(PhaseGVN* phase) {
1256 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int
1257 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this;
1258 }
1259
1260 //------------------------------Ideal------------------------------------------
1261 Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
1262 const TypeInt *t2 = phase->type( in(2) )->isa_int();
1263 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant
1264 const int con = t2->get_con() & ( BitsPerLong - 1 ); // Shift count is always masked
1265 if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count
1266 // note: mask computation below does not work for 0 shift count
1267 // We'll be wanting the right-shift amount as a mask of that many bits
1268 const jlong mask = jlong(max_julong >> con);
1269
1270 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
1271 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1272 // If Q is "X << z" the rounding is useless. Look for patterns like
1273 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
1274 Node *add = in(1);
1275 if( add->Opcode() == Op_AddL ) {
1276 Node *lshl = add->in(1);
1277 if( lshl->Opcode() == Op_LShiftL &&
1278 phase->type(lshl->in(2)) == t2 ) {
1279 Node *y_z = phase->transform( new URShiftLNode(add->in(2),in(2)) );
1280 Node *sum = phase->transform( new AddLNode( lshl->in(1), y_z ) );
1281 return new AndLNode( sum, phase->longcon(mask) );
1282 }
1283 }
1284
1285 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
1286 // This shortens the mask. Also, if we are extracting a high byte and
1287 // storing it to a buffer, the mask will be removed completely.
1288 Node *andi = in(1);
1289 if( andi->Opcode() == Op_AndL ) {
1290 const TypeLong *t3 = phase->type( andi->in(2) )->isa_long();
1291 if( t3 && t3->is_con() ) { // Right input is a constant
1292 jlong mask2 = t3->get_con();
1293 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
1294 Node *newshr = phase->transform( new URShiftLNode(andi->in(1), in(2)) );
1295 return new AndLNode(newshr, phase->longcon(mask2));
1296 }
1297 }
1298
1299 // Check for "(X << z ) >>> z" which simply zero-extends
1300 Node *shl = in(1);
1301 if( shl->Opcode() == Op_LShiftL &&
1302 phase->type(shl->in(2)) == t2 )
1303 return new AndLNode( shl->in(1), phase->longcon(mask) );
1304
1305 return NULL;
1306 }
1307
1308 //------------------------------Value------------------------------------------
1309 // A URShiftINode shifts its input2 right by input1 amount.
1310 const Type* URShiftLNode::Value(PhaseGVN* phase) const {
1311 // (This is a near clone of RShiftLNode::Value.)
1312 const Type *t1 = phase->type( in(1) );
1313 const Type *t2 = phase->type( in(2) );
1314 // Either input is TOP ==> the result is TOP
1315 if( t1 == Type::TOP ) return Type::TOP;
1316 if( t2 == Type::TOP ) return Type::TOP;
1317
1318 // Left input is ZERO ==> the result is ZERO.
1319 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1320 // Shift by zero does nothing
1321 if( t2 == TypeInt::ZERO ) return t1;
1322
1323 // Either input is BOTTOM ==> the result is BOTTOM
1324 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1325 return TypeLong::LONG;
1326
1327 if (t2 == TypeInt::INT)
1328 return TypeLong::LONG;
1329
1330 const TypeLong *r1 = t1->is_long(); // Handy access
1331 const TypeInt *r2 = t2->is_int (); // Handy access
1332
1333 if (r2->is_con()) {
1334 uint shift = r2->get_con();
1335 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
1336 // Shift by a multiple of 64 does nothing:
1337 if (shift == 0) return t1;
1338 // Calculate reasonably aggressive bounds for the result.
1339 jlong lo = (julong)r1->_lo >> (juint)shift;
1340 jlong hi = (julong)r1->_hi >> (juint)shift;
1341 if (r1->_hi >= 0 && r1->_lo < 0) {
1342 // If the type has both negative and positive values,
1343 // there are two separate sub-domains to worry about:
1344 // The positive half and the negative half.
1345 jlong neg_lo = lo;
1346 jlong neg_hi = (julong)-1 >> (juint)shift;
1347 jlong pos_lo = (julong) 0 >> (juint)shift;
1348 jlong pos_hi = hi;
1349 //lo = MIN2(neg_lo, pos_lo); // == 0
1350 lo = neg_lo < pos_lo ? neg_lo : pos_lo;
1351 //hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
1352 hi = neg_hi > pos_hi ? neg_hi : pos_hi;
1353 }
1354 assert(lo <= hi, "must have valid bounds");
1355 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1356 #ifdef ASSERT
1357 // Make sure we get the sign-capture idiom correct.
1358 if (shift == BitsPerJavaLong - 1) {
1359 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>>63 of + is 0");
1360 if (r1->_hi < 0) assert(tl == TypeLong::ONE, ">>>63 of - is +1");
1361 }
1362 #endif
1363 return tl;
1364 }
1365
1366 return TypeLong::LONG; // Give up
1367 }