1 /*
2 * Copyright (c) 2003, 2017, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/macroAssembler.hpp"
27 #include "asm/macroAssembler.inline.hpp"
28 #include "code/debugInfoRec.hpp"
29 #include "code/icBuffer.hpp"
30 #include "code/vtableStubs.hpp"
31 #include "interpreter/interpreter.hpp"
32 #include "logging/log.hpp"
33 #include "memory/resourceArea.hpp"
34 #include "oops/compiledICHolder.hpp"
35 #include "runtime/sharedRuntime.hpp"
36 #include "runtime/vframeArray.hpp"
37 #include "vmreg_x86.inline.hpp"
38 #ifdef COMPILER1
39 #include "c1/c1_Runtime1.hpp"
40 #endif
41 #ifdef COMPILER2
42 #include "opto/runtime.hpp"
43 #endif
44 #include "vm_version_x86.hpp"
45
46 #define __ masm->
47
48 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
49
50 class RegisterSaver {
51 // Capture info about frame layout
52 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
53 enum layout {
54 fpu_state_off = 0,
55 fpu_state_end = fpu_state_off+FPUStateSizeInWords,
56 st0_off, st0H_off,
57 st1_off, st1H_off,
58 st2_off, st2H_off,
59 st3_off, st3H_off,
60 st4_off, st4H_off,
61 st5_off, st5H_off,
62 st6_off, st6H_off,
63 st7_off, st7H_off,
64 xmm_off,
65 DEF_XMM_OFFS(0),
66 DEF_XMM_OFFS(1),
67 DEF_XMM_OFFS(2),
68 DEF_XMM_OFFS(3),
69 DEF_XMM_OFFS(4),
70 DEF_XMM_OFFS(5),
71 DEF_XMM_OFFS(6),
72 DEF_XMM_OFFS(7),
73 flags_off = xmm7_off + 16/BytesPerInt + 1, // 16-byte stack alignment fill word
74 rdi_off,
75 rsi_off,
76 ignore_off, // extra copy of rbp,
77 rsp_off,
78 rbx_off,
79 rdx_off,
80 rcx_off,
81 rax_off,
82 // The frame sender code expects that rbp will be in the "natural" place and
83 // will override any oopMap setting for it. We must therefore force the layout
84 // so that it agrees with the frame sender code.
85 rbp_off,
86 return_off, // slot for return address
87 reg_save_size };
88 enum { FPU_regs_live = flags_off - fpu_state_end };
89
90 public:
91
92 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words,
93 int* total_frame_words, bool verify_fpu = true, bool save_vectors = false);
94 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false);
95
96 static int rax_offset() { return rax_off; }
97 static int rbx_offset() { return rbx_off; }
98
99 // Offsets into the register save area
100 // Used by deoptimization when it is managing result register
101 // values on its own
102
103 static int raxOffset(void) { return rax_off; }
104 static int rdxOffset(void) { return rdx_off; }
105 static int rbxOffset(void) { return rbx_off; }
106 static int xmm0Offset(void) { return xmm0_off; }
107 // This really returns a slot in the fp save area, which one is not important
108 static int fpResultOffset(void) { return st0_off; }
109
110 // During deoptimization only the result register need to be restored
111 // all the other values have already been extracted.
112
113 static void restore_result_registers(MacroAssembler* masm);
114
115 };
116
117 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words,
118 int* total_frame_words, bool verify_fpu, bool save_vectors) {
119 int num_xmm_regs = XMMRegisterImpl::number_of_registers;
120 int ymm_bytes = num_xmm_regs * 16;
121 int zmm_bytes = num_xmm_regs * 32;
122 #ifdef COMPILER2
123 if (save_vectors) {
124 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
125 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
126 // Save upper half of YMM registers
127 int vect_bytes = ymm_bytes;
128 if (UseAVX > 2) {
129 // Save upper half of ZMM registers as well
130 vect_bytes += zmm_bytes;
131 }
132 additional_frame_words += vect_bytes / wordSize;
133 }
134 #else
135 assert(!save_vectors, "vectors are generated only by C2");
136 #endif
137 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize;
138 int frame_words = frame_size_in_bytes / wordSize;
139 *total_frame_words = frame_words;
140
141 assert(FPUStateSizeInWords == 27, "update stack layout");
142
143 // save registers, fpu state, and flags
144 // We assume caller has already has return address slot on the stack
145 // We push epb twice in this sequence because we want the real rbp,
146 // to be under the return like a normal enter and we want to use pusha
147 // We push by hand instead of pusing push
148 __ enter();
149 __ pusha();
150 __ pushf();
151 __ subptr(rsp,FPU_regs_live*wordSize); // Push FPU registers space
152 __ push_FPU_state(); // Save FPU state & init
153
154 if (verify_fpu) {
155 // Some stubs may have non standard FPU control word settings so
156 // only check and reset the value when it required to be the
157 // standard value. The safepoint blob in particular can be used
158 // in methods which are using the 24 bit control word for
159 // optimized float math.
160
161 #ifdef ASSERT
162 // Make sure the control word has the expected value
163 Label ok;
164 __ cmpw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
165 __ jccb(Assembler::equal, ok);
166 __ stop("corrupted control word detected");
167 __ bind(ok);
168 #endif
169
170 // Reset the control word to guard against exceptions being unmasked
171 // since fstp_d can cause FPU stack underflow exceptions. Write it
172 // into the on stack copy and then reload that to make sure that the
173 // current and future values are correct.
174 __ movw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
175 }
176
177 __ frstor(Address(rsp, 0));
178 if (!verify_fpu) {
179 // Set the control word so that exceptions are masked for the
180 // following code.
181 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
182 }
183
184 int off = st0_off;
185 int delta = st1_off - off;
186
187 // Save the FPU registers in de-opt-able form
188 for (int n = 0; n < FloatRegisterImpl::number_of_registers; n++) {
189 __ fstp_d(Address(rsp, off*wordSize));
190 off += delta;
191 }
192
193 off = xmm0_off;
194 delta = xmm1_off - off;
195 if(UseSSE == 1) {
196 // Save the XMM state
197 for (int n = 0; n < num_xmm_regs; n++) {
198 __ movflt(Address(rsp, off*wordSize), as_XMMRegister(n));
199 off += delta;
200 }
201 } else if(UseSSE >= 2) {
202 // Save whole 128bit (16 bytes) XMM registers
203 for (int n = 0; n < num_xmm_regs; n++) {
204 __ movdqu(Address(rsp, off*wordSize), as_XMMRegister(n));
205 off += delta;
206 }
207 }
208
209 if (save_vectors) {
210 __ subptr(rsp, ymm_bytes);
211 // Save upper half of YMM registers
212 for (int n = 0; n < num_xmm_regs; n++) {
213 __ vextractf128_high(Address(rsp, n*16), as_XMMRegister(n));
214 }
215 if (UseAVX > 2) {
216 __ subptr(rsp, zmm_bytes);
217 // Save upper half of ZMM registers
218 for (int n = 0; n < num_xmm_regs; n++) {
219 __ vextractf64x4_high(Address(rsp, n*32), as_XMMRegister(n));
220 }
221 }
222 }
223 __ vzeroupper();
224
225 // Set an oopmap for the call site. This oopmap will map all
226 // oop-registers and debug-info registers as callee-saved. This
227 // will allow deoptimization at this safepoint to find all possible
228 // debug-info recordings, as well as let GC find all oops.
229
230 OopMapSet *oop_maps = new OopMapSet();
231 OopMap* map = new OopMap( frame_words, 0 );
232
233 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words)
234 #define NEXTREG(x) (x)->as_VMReg()->next()
235
236 map->set_callee_saved(STACK_OFFSET(rax_off), rax->as_VMReg());
237 map->set_callee_saved(STACK_OFFSET(rcx_off), rcx->as_VMReg());
238 map->set_callee_saved(STACK_OFFSET(rdx_off), rdx->as_VMReg());
239 map->set_callee_saved(STACK_OFFSET(rbx_off), rbx->as_VMReg());
240 // rbp, location is known implicitly, no oopMap
241 map->set_callee_saved(STACK_OFFSET(rsi_off), rsi->as_VMReg());
242 map->set_callee_saved(STACK_OFFSET(rdi_off), rdi->as_VMReg());
243 // %%% This is really a waste but we'll keep things as they were for now for the upper component
244 off = st0_off;
245 delta = st1_off - off;
246 for (int n = 0; n < FloatRegisterImpl::number_of_registers; n++) {
247 FloatRegister freg_name = as_FloatRegister(n);
248 map->set_callee_saved(STACK_OFFSET(off), freg_name->as_VMReg());
249 map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(freg_name));
250 off += delta;
251 }
252 off = xmm0_off;
253 delta = xmm1_off - off;
254 for (int n = 0; n < num_xmm_regs; n++) {
255 XMMRegister xmm_name = as_XMMRegister(n);
256 map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg());
257 map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(xmm_name));
258 off += delta;
259 }
260 #undef NEXTREG
261 #undef STACK_OFFSET
262
263 return map;
264 }
265
266 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) {
267 int num_xmm_regs = XMMRegisterImpl::number_of_registers;
268 int ymm_bytes = num_xmm_regs * 16;
269 int zmm_bytes = num_xmm_regs * 32;
270 // Recover XMM & FPU state
271 int additional_frame_bytes = 0;
272 #ifdef COMPILER2
273 if (restore_vectors) {
274 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
275 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
276 // Save upper half of YMM registers
277 additional_frame_bytes = ymm_bytes;
278 if (UseAVX > 2) {
279 // Save upper half of ZMM registers as well
280 additional_frame_bytes += zmm_bytes;
281 }
282 }
283 #else
284 assert(!restore_vectors, "vectors are generated only by C2");
285 #endif
286
287 int off = xmm0_off;
288 int delta = xmm1_off - off;
289
290 __ vzeroupper();
291
292 if (UseSSE == 1) {
293 // Restore XMM registers
294 assert(additional_frame_bytes == 0, "");
295 for (int n = 0; n < num_xmm_regs; n++) {
296 __ movflt(as_XMMRegister(n), Address(rsp, off*wordSize));
297 off += delta;
298 }
299 } else if (UseSSE >= 2) {
300 // Restore whole 128bit (16 bytes) XMM registers. Do this before restoring YMM and
301 // ZMM because the movdqu instruction zeros the upper part of the XMM register.
302 for (int n = 0; n < num_xmm_regs; n++) {
303 __ movdqu(as_XMMRegister(n), Address(rsp, off*wordSize+additional_frame_bytes));
304 off += delta;
305 }
306 }
307
308 if (restore_vectors) {
309 if (UseAVX > 2) {
310 // Restore upper half of ZMM registers.
311 for (int n = 0; n < num_xmm_regs; n++) {
312 __ vinsertf64x4_high(as_XMMRegister(n), Address(rsp, n*32));
313 }
314 __ addptr(rsp, zmm_bytes);
315 }
316 // Restore upper half of YMM registers.
317 for (int n = 0; n < num_xmm_regs; n++) {
318 __ vinsertf128_high(as_XMMRegister(n), Address(rsp, n*16));
319 }
320 __ addptr(rsp, ymm_bytes);
321 }
322
323 __ pop_FPU_state();
324 __ addptr(rsp, FPU_regs_live*wordSize); // Pop FPU registers
325
326 __ popf();
327 __ popa();
328 // Get the rbp, described implicitly by the frame sender code (no oopMap)
329 __ pop(rbp);
330 }
331
332 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
333
334 // Just restore result register. Only used by deoptimization. By
335 // now any callee save register that needs to be restore to a c2
336 // caller of the deoptee has been extracted into the vframeArray
337 // and will be stuffed into the c2i adapter we create for later
338 // restoration so only result registers need to be restored here.
339 //
340
341 __ frstor(Address(rsp, 0)); // Restore fpu state
342
343 // Recover XMM & FPU state
344 if( UseSSE == 1 ) {
345 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize));
346 } else if( UseSSE >= 2 ) {
347 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize));
348 }
349 __ movptr(rax, Address(rsp, rax_off*wordSize));
350 __ movptr(rdx, Address(rsp, rdx_off*wordSize));
351 // Pop all of the register save are off the stack except the return address
352 __ addptr(rsp, return_off * wordSize);
353 }
354
355 // Is vector's size (in bytes) bigger than a size saved by default?
356 // 16 bytes XMM registers are saved by default using SSE2 movdqu instructions.
357 // Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated.
358 bool SharedRuntime::is_wide_vector(int size) {
359 return size > 16;
360 }
361
362 size_t SharedRuntime::trampoline_size() {
363 return 16;
364 }
365
366 void SharedRuntime::generate_trampoline(MacroAssembler *masm, address destination) {
367 __ jump(RuntimeAddress(destination));
368 }
369
370 // The java_calling_convention describes stack locations as ideal slots on
371 // a frame with no abi restrictions. Since we must observe abi restrictions
372 // (like the placement of the register window) the slots must be biased by
373 // the following value.
374 static int reg2offset_in(VMReg r) {
375 // Account for saved rbp, and return address
376 // This should really be in_preserve_stack_slots
377 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size;
378 }
379
380 static int reg2offset_out(VMReg r) {
381 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
382 }
383
384 // ---------------------------------------------------------------------------
385 // Read the array of BasicTypes from a signature, and compute where the
386 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
387 // quantities. Values less than SharedInfo::stack0 are registers, those above
388 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
389 // as framesizes are fixed.
390 // VMRegImpl::stack0 refers to the first slot 0(sp).
391 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register
392 // up to RegisterImpl::number_of_registers) are the 32-bit
393 // integer registers.
394
395 // Pass first two oop/int args in registers ECX and EDX.
396 // Pass first two float/double args in registers XMM0 and XMM1.
397 // Doubles have precedence, so if you pass a mix of floats and doubles
398 // the doubles will grab the registers before the floats will.
399
400 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
401 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
402 // units regardless of build. Of course for i486 there is no 64 bit build
403
404
405 // ---------------------------------------------------------------------------
406 // The compiled Java calling convention.
407 // Pass first two oop/int args in registers ECX and EDX.
408 // Pass first two float/double args in registers XMM0 and XMM1.
409 // Doubles have precedence, so if you pass a mix of floats and doubles
410 // the doubles will grab the registers before the floats will.
411 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
412 VMRegPair *regs,
413 int total_args_passed,
414 int is_outgoing) {
415 uint stack = 0; // Starting stack position for args on stack
416
417
418 // Pass first two oop/int args in registers ECX and EDX.
419 uint reg_arg0 = 9999;
420 uint reg_arg1 = 9999;
421
422 // Pass first two float/double args in registers XMM0 and XMM1.
423 // Doubles have precedence, so if you pass a mix of floats and doubles
424 // the doubles will grab the registers before the floats will.
425 // CNC - TURNED OFF FOR non-SSE.
426 // On Intel we have to round all doubles (and most floats) at
427 // call sites by storing to the stack in any case.
428 // UseSSE=0 ==> Don't Use ==> 9999+0
429 // UseSSE=1 ==> Floats only ==> 9999+1
430 // UseSSE>=2 ==> Floats or doubles ==> 9999+2
431 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 };
432 uint fargs = (UseSSE>=2) ? 2 : UseSSE;
433 uint freg_arg0 = 9999+fargs;
434 uint freg_arg1 = 9999+fargs;
435
436 // Pass doubles & longs aligned on the stack. First count stack slots for doubles
437 int i;
438 for( i = 0; i < total_args_passed; i++) {
439 if( sig_bt[i] == T_DOUBLE ) {
440 // first 2 doubles go in registers
441 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i;
442 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i;
443 else // Else double is passed low on the stack to be aligned.
444 stack += 2;
445 } else if( sig_bt[i] == T_LONG ) {
446 stack += 2;
447 }
448 }
449 int dstack = 0; // Separate counter for placing doubles
450
451 // Now pick where all else goes.
452 for( i = 0; i < total_args_passed; i++) {
453 // From the type and the argument number (count) compute the location
454 switch( sig_bt[i] ) {
455 case T_SHORT:
456 case T_CHAR:
457 case T_BYTE:
458 case T_BOOLEAN:
459 case T_INT:
460 case T_ARRAY:
461 case T_OBJECT:
462 case T_ADDRESS:
463 if( reg_arg0 == 9999 ) {
464 reg_arg0 = i;
465 regs[i].set1(rcx->as_VMReg());
466 } else if( reg_arg1 == 9999 ) {
467 reg_arg1 = i;
468 regs[i].set1(rdx->as_VMReg());
469 } else {
470 regs[i].set1(VMRegImpl::stack2reg(stack++));
471 }
472 break;
473 case T_FLOAT:
474 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) {
475 freg_arg0 = i;
476 regs[i].set1(xmm0->as_VMReg());
477 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) {
478 freg_arg1 = i;
479 regs[i].set1(xmm1->as_VMReg());
480 } else {
481 regs[i].set1(VMRegImpl::stack2reg(stack++));
482 }
483 break;
484 case T_LONG:
485 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
486 regs[i].set2(VMRegImpl::stack2reg(dstack));
487 dstack += 2;
488 break;
489 case T_DOUBLE:
490 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
491 if( freg_arg0 == (uint)i ) {
492 regs[i].set2(xmm0->as_VMReg());
493 } else if( freg_arg1 == (uint)i ) {
494 regs[i].set2(xmm1->as_VMReg());
495 } else {
496 regs[i].set2(VMRegImpl::stack2reg(dstack));
497 dstack += 2;
498 }
499 break;
500 case T_VOID: regs[i].set_bad(); break;
501 break;
502 default:
503 ShouldNotReachHere();
504 break;
505 }
506 }
507
508 // return value can be odd number of VMRegImpl stack slots make multiple of 2
509 return round_to(stack, 2);
510 }
511
512 const uint SharedRuntime::java_return_convention_max_int = 1;
513 const uint SharedRuntime::java_return_convention_max_float = 1;
514 int SharedRuntime::java_return_convention(const BasicType *sig_bt,
515 VMRegPair *regs,
516 int total_args_passed) {
517 Unimplemented();
518 return 0;
519 }
520
521 // Patch the callers callsite with entry to compiled code if it exists.
522 static void patch_callers_callsite(MacroAssembler *masm) {
523 Label L;
524 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
525 __ jcc(Assembler::equal, L);
526 // Schedule the branch target address early.
527 // Call into the VM to patch the caller, then jump to compiled callee
528 // rax, isn't live so capture return address while we easily can
529 __ movptr(rax, Address(rsp, 0));
530 __ pusha();
531 __ pushf();
532
533 if (UseSSE == 1) {
534 __ subptr(rsp, 2*wordSize);
535 __ movflt(Address(rsp, 0), xmm0);
536 __ movflt(Address(rsp, wordSize), xmm1);
537 }
538 if (UseSSE >= 2) {
539 __ subptr(rsp, 4*wordSize);
540 __ movdbl(Address(rsp, 0), xmm0);
541 __ movdbl(Address(rsp, 2*wordSize), xmm1);
542 }
543 #ifdef COMPILER2
544 // C2 may leave the stack dirty if not in SSE2+ mode
545 if (UseSSE >= 2) {
546 __ verify_FPU(0, "c2i transition should have clean FPU stack");
547 } else {
548 __ empty_FPU_stack();
549 }
550 #endif /* COMPILER2 */
551
552 // VM needs caller's callsite
553 __ push(rax);
554 // VM needs target method
555 __ push(rbx);
556 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
557 __ addptr(rsp, 2*wordSize);
558
559 if (UseSSE == 1) {
560 __ movflt(xmm0, Address(rsp, 0));
561 __ movflt(xmm1, Address(rsp, wordSize));
562 __ addptr(rsp, 2*wordSize);
563 }
564 if (UseSSE >= 2) {
565 __ movdbl(xmm0, Address(rsp, 0));
566 __ movdbl(xmm1, Address(rsp, 2*wordSize));
567 __ addptr(rsp, 4*wordSize);
568 }
569
570 __ popf();
571 __ popa();
572 __ bind(L);
573 }
574
575
576 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) {
577 int next_off = st_off - Interpreter::stackElementSize;
578 __ movdbl(Address(rsp, next_off), r);
579 }
580
581 static void gen_c2i_adapter(MacroAssembler *masm,
582 const GrowableArray<SigEntry>& sig_extended,
583 const VMRegPair *regs,
584 Label& skip_fixup,
585 address start,
586 OopMapSet*& oop_maps,
587 int& frame_complete,
588 int& frame_size_in_words) {
589 // Before we get into the guts of the C2I adapter, see if we should be here
590 // at all. We've come from compiled code and are attempting to jump to the
591 // interpreter, which means the caller made a static call to get here
592 // (vcalls always get a compiled target if there is one). Check for a
593 // compiled target. If there is one, we need to patch the caller's call.
594 patch_callers_callsite(masm);
595
596 __ bind(skip_fixup);
597
598 #ifdef COMPILER2
599 // C2 may leave the stack dirty if not in SSE2+ mode
600 if (UseSSE >= 2) {
601 __ verify_FPU(0, "c2i transition should have clean FPU stack");
602 } else {
603 __ empty_FPU_stack();
604 }
605 #endif /* COMPILER2 */
606
607 // Since all args are passed on the stack, total_args_passed * interpreter_
608 // stack_element_size is the
609 // space we need.
610 int extraspace = sig_extended.length() * Interpreter::stackElementSize;
611
612 // Get return address
613 __ pop(rax);
614
615 // set senderSP value
616 __ movptr(rsi, rsp);
617
618 __ subptr(rsp, extraspace);
619
620 // Now write the args into the outgoing interpreter space
621 for (int i = 0; i < sig_extended.length(); i++) {
622 if (sig_extended.at(i)._bt == T_VOID) {
623 assert(i > 0 && (sig_extended.at(i-1)._bt == T_LONG || sig_extended.at(i-1)._bt == T_DOUBLE), "missing half");
624 continue;
625 }
626
627 // st_off points to lowest address on stack.
628 int st_off = ((sig_extended.length() - 1) - i) * Interpreter::stackElementSize;
629 int next_off = st_off - Interpreter::stackElementSize;
630
631 // Say 4 args:
632 // i st_off
633 // 0 12 T_LONG
634 // 1 8 T_VOID
635 // 2 4 T_OBJECT
636 // 3 0 T_BOOL
637 VMReg r_1 = regs[i].first();
638 VMReg r_2 = regs[i].second();
639 if (!r_1->is_valid()) {
640 assert(!r_2->is_valid(), "");
641 continue;
642 }
643
644 if (r_1->is_stack()) {
645 // memory to memory use fpu stack top
646 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
647
648 if (!r_2->is_valid()) {
649 __ movl(rdi, Address(rsp, ld_off));
650 __ movptr(Address(rsp, st_off), rdi);
651 } else {
652
653 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW
654 // st_off == MSW, st_off-wordSize == LSW
655
656 __ movptr(rdi, Address(rsp, ld_off));
657 __ movptr(Address(rsp, next_off), rdi);
658 #ifndef _LP64
659 __ movptr(rdi, Address(rsp, ld_off + wordSize));
660 __ movptr(Address(rsp, st_off), rdi);
661 #else
662 #ifdef ASSERT
663 // Overwrite the unused slot with known junk
664 __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
665 __ movptr(Address(rsp, st_off), rax);
666 #endif /* ASSERT */
667 #endif // _LP64
668 }
669 } else if (r_1->is_Register()) {
670 Register r = r_1->as_Register();
671 if (!r_2->is_valid()) {
672 __ movl(Address(rsp, st_off), r);
673 } else {
674 // long/double in gpr
675 NOT_LP64(ShouldNotReachHere());
676 // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
677 // T_DOUBLE and T_LONG use two slots in the interpreter
678 if (sig_extended.at(i)._bt == T_LONG || sig_extended.at(i)._bt == T_DOUBLE) {
679 // long/double in gpr
680 #ifdef ASSERT
681 // Overwrite the unused slot with known junk
682 LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab)));
683 __ movptr(Address(rsp, st_off), rax);
684 #endif /* ASSERT */
685 __ movptr(Address(rsp, next_off), r);
686 } else {
687 __ movptr(Address(rsp, st_off), r);
688 }
689 }
690 } else {
691 assert(r_1->is_XMMRegister(), "");
692 if (!r_2->is_valid()) {
693 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
694 } else {
695 assert(sig_extended.at(i)._bt == T_DOUBLE || sig_extended.at(i)._bt == T_LONG, "wrong type");
696 move_c2i_double(masm, r_1->as_XMMRegister(), st_off);
697 }
698 }
699 }
700
701 // Schedule the branch target address early.
702 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset())));
703 // And repush original return address
704 __ push(rax);
705 __ jmp(rcx);
706 }
707
708
709 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) {
710 int next_val_off = ld_off - Interpreter::stackElementSize;
711 __ movdbl(r, Address(saved_sp, next_val_off));
712 }
713
714 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg,
715 address code_start, address code_end,
716 Label& L_ok) {
717 Label L_fail;
718 __ lea(temp_reg, ExternalAddress(code_start));
719 __ cmpptr(pc_reg, temp_reg);
720 __ jcc(Assembler::belowEqual, L_fail);
721 __ lea(temp_reg, ExternalAddress(code_end));
722 __ cmpptr(pc_reg, temp_reg);
723 __ jcc(Assembler::below, L_ok);
724 __ bind(L_fail);
725 }
726
727 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
728 int comp_args_on_stack,
729 const GrowableArray<SigEntry>& sig_extended,
730 const VMRegPair *regs) {
731
732 // Note: rsi contains the senderSP on entry. We must preserve it since
733 // we may do a i2c -> c2i transition if we lose a race where compiled
734 // code goes non-entrant while we get args ready.
735
736 // Adapters can be frameless because they do not require the caller
737 // to perform additional cleanup work, such as correcting the stack pointer.
738 // An i2c adapter is frameless because the *caller* frame, which is interpreted,
739 // routinely repairs its own stack pointer (from interpreter_frame_last_sp),
740 // even if a callee has modified the stack pointer.
741 // A c2i adapter is frameless because the *callee* frame, which is interpreted,
742 // routinely repairs its caller's stack pointer (from sender_sp, which is set
743 // up via the senderSP register).
744 // In other words, if *either* the caller or callee is interpreted, we can
745 // get the stack pointer repaired after a call.
746 // This is why c2i and i2c adapters cannot be indefinitely composed.
747 // In particular, if a c2i adapter were to somehow call an i2c adapter,
748 // both caller and callee would be compiled methods, and neither would
749 // clean up the stack pointer changes performed by the two adapters.
750 // If this happens, control eventually transfers back to the compiled
751 // caller, but with an uncorrected stack, causing delayed havoc.
752
753 // Pick up the return address
754 __ movptr(rax, Address(rsp, 0));
755
756 if (VerifyAdapterCalls &&
757 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) {
758 // So, let's test for cascading c2i/i2c adapters right now.
759 // assert(Interpreter::contains($return_addr) ||
760 // StubRoutines::contains($return_addr),
761 // "i2c adapter must return to an interpreter frame");
762 __ block_comment("verify_i2c { ");
763 Label L_ok;
764 if (Interpreter::code() != NULL)
765 range_check(masm, rax, rdi,
766 Interpreter::code()->code_start(), Interpreter::code()->code_end(),
767 L_ok);
768 if (StubRoutines::code1() != NULL)
769 range_check(masm, rax, rdi,
770 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(),
771 L_ok);
772 if (StubRoutines::code2() != NULL)
773 range_check(masm, rax, rdi,
774 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(),
775 L_ok);
776 const char* msg = "i2c adapter must return to an interpreter frame";
777 __ block_comment(msg);
778 __ stop(msg);
779 __ bind(L_ok);
780 __ block_comment("} verify_i2ce ");
781 }
782
783 // Must preserve original SP for loading incoming arguments because
784 // we need to align the outgoing SP for compiled code.
785 __ movptr(rdi, rsp);
786
787 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
788 // in registers, we will occasionally have no stack args.
789 int comp_words_on_stack = 0;
790 if (comp_args_on_stack) {
791 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
792 // registers are below. By subtracting stack0, we either get a negative
793 // number (all values in registers) or the maximum stack slot accessed.
794 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg);
795 // Convert 4-byte stack slots to words.
796 comp_words_on_stack = round_to(comp_args_on_stack*4, wordSize)>>LogBytesPerWord;
797 // Round up to miminum stack alignment, in wordSize
798 comp_words_on_stack = round_to(comp_words_on_stack, 2);
799 __ subptr(rsp, comp_words_on_stack * wordSize);
800 }
801
802 // Align the outgoing SP
803 __ andptr(rsp, -(StackAlignmentInBytes));
804
805 // push the return address on the stack (note that pushing, rather
806 // than storing it, yields the correct frame alignment for the callee)
807 __ push(rax);
808
809 // Put saved SP in another register
810 const Register saved_sp = rax;
811 __ movptr(saved_sp, rdi);
812
813
814 // Will jump to the compiled code just as if compiled code was doing it.
815 // Pre-load the register-jump target early, to schedule it better.
816 __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset())));
817
818 // Now generate the shuffle code. Pick up all register args and move the
819 // rest through the floating point stack top.
820 for (int i = 0; i < sig_extended.length(); i++) {
821 if (sig_extended.at(i)._bt == T_VOID) {
822 // Longs and doubles are passed in native word order, but misaligned
823 // in the 32-bit build.
824 assert(i > 0 && (sig_extended.at(i-1)._bt == T_LONG || sig_extended.at(i-1)._bt == T_DOUBLE), "missing half");
825 continue;
826 }
827
828 // Pick up 0, 1 or 2 words from SP+offset.
829
830 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
831 "scrambled load targets?");
832 // Load in argument order going down.
833 int ld_off = (sig_extended.length() - i) * Interpreter::stackElementSize;
834 // Point to interpreter value (vs. tag)
835 int next_off = ld_off - Interpreter::stackElementSize;
836 //
837 //
838 //
839 VMReg r_1 = regs[i].first();
840 VMReg r_2 = regs[i].second();
841 if (!r_1->is_valid()) {
842 assert(!r_2->is_valid(), "");
843 continue;
844 }
845 if (r_1->is_stack()) {
846 // Convert stack slot to an SP offset (+ wordSize to account for return address )
847 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
848
849 // We can use rsi as a temp here because compiled code doesn't need rsi as an input
850 // and if we end up going thru a c2i because of a miss a reasonable value of rsi
851 // we be generated.
852 if (!r_2->is_valid()) {
853 // __ fld_s(Address(saved_sp, ld_off));
854 // __ fstp_s(Address(rsp, st_off));
855 __ movl(rsi, Address(saved_sp, ld_off));
856 __ movptr(Address(rsp, st_off), rsi);
857 } else {
858 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
859 // are accessed as negative so LSW is at LOW address
860
861 // ld_off is MSW so get LSW
862 // st_off is LSW (i.e. reg.first())
863 // __ fld_d(Address(saved_sp, next_off));
864 // __ fstp_d(Address(rsp, st_off));
865 //
866 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
867 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
868 // So we must adjust where to pick up the data to match the interpreter.
869 //
870 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
871 // are accessed as negative so LSW is at LOW address
872
873 // ld_off is MSW so get LSW
874 const int offset = (NOT_LP64(true ||) sig_extended.at(i)._bt==T_LONG||sig_extended.at(i)._bt==T_DOUBLE)?
875 next_off : ld_off;
876 __ movptr(rsi, Address(saved_sp, offset));
877 __ movptr(Address(rsp, st_off), rsi);
878 #ifndef _LP64
879 __ movptr(rsi, Address(saved_sp, ld_off));
880 __ movptr(Address(rsp, st_off + wordSize), rsi);
881 #endif // _LP64
882 }
883 } else if (r_1->is_Register()) { // Register argument
884 Register r = r_1->as_Register();
885 assert(r != rax, "must be different");
886 if (r_2->is_valid()) {
887 //
888 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
889 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
890 // So we must adjust where to pick up the data to match the interpreter.
891
892 const int offset = (NOT_LP64(true ||) sig_extended.at(i)._bt==T_LONG||sig_extended.at(i)._bt==T_DOUBLE)?
893 next_off : ld_off;
894
895 // this can be a misaligned move
896 __ movptr(r, Address(saved_sp, offset));
897 #ifndef _LP64
898 assert(r_2->as_Register() != rax, "need another temporary register");
899 // Remember r_1 is low address (and LSB on x86)
900 // So r_2 gets loaded from high address regardless of the platform
901 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off));
902 #endif // _LP64
903 } else {
904 __ movl(r, Address(saved_sp, ld_off));
905 }
906 } else {
907 assert(r_1->is_XMMRegister(), "");
908 if (!r_2->is_valid()) {
909 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
910 } else {
911 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off);
912 }
913 }
914 }
915
916 // 6243940 We might end up in handle_wrong_method if
917 // the callee is deoptimized as we race thru here. If that
918 // happens we don't want to take a safepoint because the
919 // caller frame will look interpreted and arguments are now
920 // "compiled" so it is much better to make this transition
921 // invisible to the stack walking code. Unfortunately if
922 // we try and find the callee by normal means a safepoint
923 // is possible. So we stash the desired callee in the thread
924 // and the vm will find there should this case occur.
925
926 __ get_thread(rax);
927 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx);
928
929 // move Method* to rax, in case we end up in an c2i adapter.
930 // the c2i adapters expect Method* in rax, (c2) because c2's
931 // resolve stubs return the result (the method) in rax,.
932 // I'd love to fix this.
933 __ mov(rax, rbx);
934
935 __ jmp(rdi);
936 }
937
938 // ---------------------------------------------------------------
939 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
940 int comp_args_on_stack,
941 const GrowableArray<SigEntry>& sig_extended,
942 const VMRegPair *regs,
943 AdapterFingerPrint* fingerprint,
944 AdapterBlob*& new_adapter) {
945 address i2c_entry = __ pc();
946
947 gen_i2c_adapter(masm, comp_args_on_stack, sig_extended, regs);
948
949 // -------------------------------------------------------------------------
950 // Generate a C2I adapter. On entry we know rbx, holds the Method* during calls
951 // to the interpreter. The args start out packed in the compiled layout. They
952 // need to be unpacked into the interpreter layout. This will almost always
953 // require some stack space. We grow the current (compiled) stack, then repack
954 // the args. We finally end in a jump to the generic interpreter entry point.
955 // On exit from the interpreter, the interpreter will restore our SP (lest the
956 // compiled code, which relys solely on SP and not EBP, get sick).
957
958 address c2i_unverified_entry = __ pc();
959 Label skip_fixup;
960
961 Register holder = rax;
962 Register receiver = rcx;
963 Register temp = rbx;
964
965 {
966
967 Label missed;
968 __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes()));
969 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset()));
970 __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset()));
971 __ jcc(Assembler::notEqual, missed);
972 // Method might have been compiled since the call site was patched to
973 // interpreted if that is the case treat it as a miss so we can get
974 // the call site corrected.
975 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
976 __ jcc(Assembler::equal, skip_fixup);
977
978 __ bind(missed);
979 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
980 }
981
982 address c2i_entry = __ pc();
983
984 OopMapSet* oop_maps = NULL;
985 int frame_complete = CodeOffsets::frame_never_safe;
986 int frame_size_in_words = 0;
987 gen_c2i_adapter(masm, sig_extended, regs, skip_fixup, i2c_entry, oop_maps, frame_complete, frame_size_in_words);
988
989 __ flush();
990 new_adapter = AdapterBlob::create(masm->code(), frame_complete, frame_size_in_words, oop_maps);
991 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
992 }
993
994 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
995 VMRegPair *regs,
996 VMRegPair *regs2,
997 int total_args_passed) {
998 assert(regs2 == NULL, "not needed on x86");
999 // We return the amount of VMRegImpl stack slots we need to reserve for all
1000 // the arguments NOT counting out_preserve_stack_slots.
1001
1002 uint stack = 0; // All arguments on stack
1003
1004 for( int i = 0; i < total_args_passed; i++) {
1005 // From the type and the argument number (count) compute the location
1006 switch( sig_bt[i] ) {
1007 case T_BOOLEAN:
1008 case T_CHAR:
1009 case T_FLOAT:
1010 case T_BYTE:
1011 case T_SHORT:
1012 case T_INT:
1013 case T_OBJECT:
1014 case T_ARRAY:
1015 case T_ADDRESS:
1016 case T_METADATA:
1017 regs[i].set1(VMRegImpl::stack2reg(stack++));
1018 break;
1019 case T_LONG:
1020 case T_DOUBLE: // The stack numbering is reversed from Java
1021 // Since C arguments do not get reversed, the ordering for
1022 // doubles on the stack must be opposite the Java convention
1023 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
1024 regs[i].set2(VMRegImpl::stack2reg(stack));
1025 stack += 2;
1026 break;
1027 case T_VOID: regs[i].set_bad(); break;
1028 default:
1029 ShouldNotReachHere();
1030 break;
1031 }
1032 }
1033 return stack;
1034 }
1035
1036 // A simple move of integer like type
1037 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1038 if (src.first()->is_stack()) {
1039 if (dst.first()->is_stack()) {
1040 // stack to stack
1041 // __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5);
1042 // __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
1043 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first())));
1044 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1045 } else {
1046 // stack to reg
1047 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1048 }
1049 } else if (dst.first()->is_stack()) {
1050 // reg to stack
1051 // no need to sign extend on 64bit
1052 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1053 } else {
1054 if (dst.first() != src.first()) {
1055 __ mov(dst.first()->as_Register(), src.first()->as_Register());
1056 }
1057 }
1058 }
1059
1060 // An oop arg. Must pass a handle not the oop itself
1061 static void object_move(MacroAssembler* masm,
1062 OopMap* map,
1063 int oop_handle_offset,
1064 int framesize_in_slots,
1065 VMRegPair src,
1066 VMRegPair dst,
1067 bool is_receiver,
1068 int* receiver_offset) {
1069
1070 // Because of the calling conventions we know that src can be a
1071 // register or a stack location. dst can only be a stack location.
1072
1073 assert(dst.first()->is_stack(), "must be stack");
1074 // must pass a handle. First figure out the location we use as a handle
1075
1076 if (src.first()->is_stack()) {
1077 // Oop is already on the stack as an argument
1078 Register rHandle = rax;
1079 Label nil;
1080 __ xorptr(rHandle, rHandle);
1081 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
1082 __ jcc(Assembler::equal, nil);
1083 __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1084 __ bind(nil);
1085 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1086
1087 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1088 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
1089 if (is_receiver) {
1090 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
1091 }
1092 } else {
1093 // Oop is in an a register we must store it to the space we reserve
1094 // on the stack for oop_handles
1095 const Register rOop = src.first()->as_Register();
1096 const Register rHandle = rax;
1097 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset;
1098 int offset = oop_slot*VMRegImpl::stack_slot_size;
1099 Label skip;
1100 __ movptr(Address(rsp, offset), rOop);
1101 map->set_oop(VMRegImpl::stack2reg(oop_slot));
1102 __ xorptr(rHandle, rHandle);
1103 __ cmpptr(rOop, (int32_t)NULL_WORD);
1104 __ jcc(Assembler::equal, skip);
1105 __ lea(rHandle, Address(rsp, offset));
1106 __ bind(skip);
1107 // Store the handle parameter
1108 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1109 if (is_receiver) {
1110 *receiver_offset = offset;
1111 }
1112 }
1113 }
1114
1115 // A float arg may have to do float reg int reg conversion
1116 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1117 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1118
1119 // Because of the calling convention we know that src is either a stack location
1120 // or an xmm register. dst can only be a stack location.
1121
1122 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters");
1123
1124 if (src.first()->is_stack()) {
1125 __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1126 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1127 } else {
1128 // reg to stack
1129 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1130 }
1131 }
1132
1133 // A long move
1134 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1135
1136 // The only legal possibility for a long_move VMRegPair is:
1137 // 1: two stack slots (possibly unaligned)
1138 // as neither the java or C calling convention will use registers
1139 // for longs.
1140
1141 if (src.first()->is_stack() && dst.first()->is_stack()) {
1142 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack");
1143 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1144 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1145 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1146 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1147 } else {
1148 ShouldNotReachHere();
1149 }
1150 }
1151
1152 // A double move
1153 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1154
1155 // The only legal possibilities for a double_move VMRegPair are:
1156 // The painful thing here is that like long_move a VMRegPair might be
1157
1158 // Because of the calling convention we know that src is either
1159 // 1: a single physical register (xmm registers only)
1160 // 2: two stack slots (possibly unaligned)
1161 // dst can only be a pair of stack slots.
1162
1163 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args");
1164
1165 if (src.first()->is_stack()) {
1166 // source is all stack
1167 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1168 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1169 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1170 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1171 } else {
1172 // reg to stack
1173 // No worries about stack alignment
1174 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1175 }
1176 }
1177
1178
1179 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1180 // We always ignore the frame_slots arg and just use the space just below frame pointer
1181 // which by this time is free to use
1182 switch (ret_type) {
1183 case T_FLOAT:
1184 __ fstp_s(Address(rbp, -wordSize));
1185 break;
1186 case T_DOUBLE:
1187 __ fstp_d(Address(rbp, -2*wordSize));
1188 break;
1189 case T_VOID: break;
1190 case T_LONG:
1191 __ movptr(Address(rbp, -wordSize), rax);
1192 NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx));
1193 break;
1194 default: {
1195 __ movptr(Address(rbp, -wordSize), rax);
1196 }
1197 }
1198 }
1199
1200 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1201 // We always ignore the frame_slots arg and just use the space just below frame pointer
1202 // which by this time is free to use
1203 switch (ret_type) {
1204 case T_FLOAT:
1205 __ fld_s(Address(rbp, -wordSize));
1206 break;
1207 case T_DOUBLE:
1208 __ fld_d(Address(rbp, -2*wordSize));
1209 break;
1210 case T_LONG:
1211 __ movptr(rax, Address(rbp, -wordSize));
1212 NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize)));
1213 break;
1214 case T_VOID: break;
1215 default: {
1216 __ movptr(rax, Address(rbp, -wordSize));
1217 }
1218 }
1219 }
1220
1221
1222 static void save_or_restore_arguments(MacroAssembler* masm,
1223 const int stack_slots,
1224 const int total_in_args,
1225 const int arg_save_area,
1226 OopMap* map,
1227 VMRegPair* in_regs,
1228 BasicType* in_sig_bt) {
1229 // if map is non-NULL then the code should store the values,
1230 // otherwise it should load them.
1231 int handle_index = 0;
1232 // Save down double word first
1233 for ( int i = 0; i < total_in_args; i++) {
1234 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) {
1235 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area;
1236 int offset = slot * VMRegImpl::stack_slot_size;
1237 handle_index += 2;
1238 assert(handle_index <= stack_slots, "overflow");
1239 if (map != NULL) {
1240 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1241 } else {
1242 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1243 }
1244 }
1245 if (in_regs[i].first()->is_Register() && in_sig_bt[i] == T_LONG) {
1246 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area;
1247 int offset = slot * VMRegImpl::stack_slot_size;
1248 handle_index += 2;
1249 assert(handle_index <= stack_slots, "overflow");
1250 if (map != NULL) {
1251 __ movl(Address(rsp, offset), in_regs[i].first()->as_Register());
1252 if (in_regs[i].second()->is_Register()) {
1253 __ movl(Address(rsp, offset + 4), in_regs[i].second()->as_Register());
1254 }
1255 } else {
1256 __ movl(in_regs[i].first()->as_Register(), Address(rsp, offset));
1257 if (in_regs[i].second()->is_Register()) {
1258 __ movl(in_regs[i].second()->as_Register(), Address(rsp, offset + 4));
1259 }
1260 }
1261 }
1262 }
1263 // Save or restore single word registers
1264 for ( int i = 0; i < total_in_args; i++) {
1265 if (in_regs[i].first()->is_Register()) {
1266 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area;
1267 int offset = slot * VMRegImpl::stack_slot_size;
1268 assert(handle_index <= stack_slots, "overflow");
1269 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1270 map->set_oop(VMRegImpl::stack2reg(slot));;
1271 }
1272
1273 // Value is in an input register pass we must flush it to the stack
1274 const Register reg = in_regs[i].first()->as_Register();
1275 switch (in_sig_bt[i]) {
1276 case T_ARRAY:
1277 if (map != NULL) {
1278 __ movptr(Address(rsp, offset), reg);
1279 } else {
1280 __ movptr(reg, Address(rsp, offset));
1281 }
1282 break;
1283 case T_BOOLEAN:
1284 case T_CHAR:
1285 case T_BYTE:
1286 case T_SHORT:
1287 case T_INT:
1288 if (map != NULL) {
1289 __ movl(Address(rsp, offset), reg);
1290 } else {
1291 __ movl(reg, Address(rsp, offset));
1292 }
1293 break;
1294 case T_OBJECT:
1295 default: ShouldNotReachHere();
1296 }
1297 } else if (in_regs[i].first()->is_XMMRegister()) {
1298 if (in_sig_bt[i] == T_FLOAT) {
1299 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area;
1300 int offset = slot * VMRegImpl::stack_slot_size;
1301 assert(handle_index <= stack_slots, "overflow");
1302 if (map != NULL) {
1303 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1304 } else {
1305 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1306 }
1307 }
1308 } else if (in_regs[i].first()->is_stack()) {
1309 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1310 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1311 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots));
1312 }
1313 }
1314 }
1315 }
1316
1317 // Check GCLocker::needs_gc and enter the runtime if it's true. This
1318 // keeps a new JNI critical region from starting until a GC has been
1319 // forced. Save down any oops in registers and describe them in an
1320 // OopMap.
1321 static void check_needs_gc_for_critical_native(MacroAssembler* masm,
1322 Register thread,
1323 int stack_slots,
1324 int total_c_args,
1325 int total_in_args,
1326 int arg_save_area,
1327 OopMapSet* oop_maps,
1328 VMRegPair* in_regs,
1329 BasicType* in_sig_bt) {
1330 __ block_comment("check GCLocker::needs_gc");
1331 Label cont;
1332 __ cmp8(ExternalAddress((address)GCLocker::needs_gc_address()), false);
1333 __ jcc(Assembler::equal, cont);
1334
1335 // Save down any incoming oops and call into the runtime to halt for a GC
1336
1337 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1338
1339 save_or_restore_arguments(masm, stack_slots, total_in_args,
1340 arg_save_area, map, in_regs, in_sig_bt);
1341
1342 address the_pc = __ pc();
1343 oop_maps->add_gc_map( __ offset(), map);
1344 __ set_last_Java_frame(thread, rsp, noreg, the_pc);
1345
1346 __ block_comment("block_for_jni_critical");
1347 __ push(thread);
1348 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical)));
1349 __ increment(rsp, wordSize);
1350
1351 __ get_thread(thread);
1352 __ reset_last_Java_frame(thread, false);
1353
1354 save_or_restore_arguments(masm, stack_slots, total_in_args,
1355 arg_save_area, NULL, in_regs, in_sig_bt);
1356
1357 __ bind(cont);
1358 #ifdef ASSERT
1359 if (StressCriticalJNINatives) {
1360 // Stress register saving
1361 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1362 save_or_restore_arguments(masm, stack_slots, total_in_args,
1363 arg_save_area, map, in_regs, in_sig_bt);
1364 // Destroy argument registers
1365 for (int i = 0; i < total_in_args - 1; i++) {
1366 if (in_regs[i].first()->is_Register()) {
1367 const Register reg = in_regs[i].first()->as_Register();
1368 __ xorptr(reg, reg);
1369 } else if (in_regs[i].first()->is_XMMRegister()) {
1370 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister());
1371 } else if (in_regs[i].first()->is_FloatRegister()) {
1372 ShouldNotReachHere();
1373 } else if (in_regs[i].first()->is_stack()) {
1374 // Nothing to do
1375 } else {
1376 ShouldNotReachHere();
1377 }
1378 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) {
1379 i++;
1380 }
1381 }
1382
1383 save_or_restore_arguments(masm, stack_slots, total_in_args,
1384 arg_save_area, NULL, in_regs, in_sig_bt);
1385 }
1386 #endif
1387 }
1388
1389 // Unpack an array argument into a pointer to the body and the length
1390 // if the array is non-null, otherwise pass 0 for both.
1391 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) {
1392 Register tmp_reg = rax;
1393 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1394 "possible collision");
1395 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1396 "possible collision");
1397
1398 // Pass the length, ptr pair
1399 Label is_null, done;
1400 VMRegPair tmp(tmp_reg->as_VMReg());
1401 if (reg.first()->is_stack()) {
1402 // Load the arg up from the stack
1403 simple_move32(masm, reg, tmp);
1404 reg = tmp;
1405 }
1406 __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
1407 __ jccb(Assembler::equal, is_null);
1408 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1409 simple_move32(masm, tmp, body_arg);
1410 // load the length relative to the body.
1411 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() -
1412 arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1413 simple_move32(masm, tmp, length_arg);
1414 __ jmpb(done);
1415 __ bind(is_null);
1416 // Pass zeros
1417 __ xorptr(tmp_reg, tmp_reg);
1418 simple_move32(masm, tmp, body_arg);
1419 simple_move32(masm, tmp, length_arg);
1420 __ bind(done);
1421 }
1422
1423 static void verify_oop_args(MacroAssembler* masm,
1424 methodHandle method,
1425 const BasicType* sig_bt,
1426 const VMRegPair* regs) {
1427 Register temp_reg = rbx; // not part of any compiled calling seq
1428 if (VerifyOops) {
1429 for (int i = 0; i < method->size_of_parameters(); i++) {
1430 if (sig_bt[i] == T_OBJECT ||
1431 sig_bt[i] == T_ARRAY) {
1432 VMReg r = regs[i].first();
1433 assert(r->is_valid(), "bad oop arg");
1434 if (r->is_stack()) {
1435 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1436 __ verify_oop(temp_reg);
1437 } else {
1438 __ verify_oop(r->as_Register());
1439 }
1440 }
1441 }
1442 }
1443 }
1444
1445 static void gen_special_dispatch(MacroAssembler* masm,
1446 methodHandle method,
1447 const BasicType* sig_bt,
1448 const VMRegPair* regs) {
1449 verify_oop_args(masm, method, sig_bt, regs);
1450 vmIntrinsics::ID iid = method->intrinsic_id();
1451
1452 // Now write the args into the outgoing interpreter space
1453 bool has_receiver = false;
1454 Register receiver_reg = noreg;
1455 int member_arg_pos = -1;
1456 Register member_reg = noreg;
1457 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1458 if (ref_kind != 0) {
1459 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1460 member_reg = rbx; // known to be free at this point
1461 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1462 } else if (iid == vmIntrinsics::_invokeBasic) {
1463 has_receiver = true;
1464 } else {
1465 fatal("unexpected intrinsic id %d", iid);
1466 }
1467
1468 if (member_reg != noreg) {
1469 // Load the member_arg into register, if necessary.
1470 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1471 VMReg r = regs[member_arg_pos].first();
1472 if (r->is_stack()) {
1473 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1474 } else {
1475 // no data motion is needed
1476 member_reg = r->as_Register();
1477 }
1478 }
1479
1480 if (has_receiver) {
1481 // Make sure the receiver is loaded into a register.
1482 assert(method->size_of_parameters() > 0, "oob");
1483 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1484 VMReg r = regs[0].first();
1485 assert(r->is_valid(), "bad receiver arg");
1486 if (r->is_stack()) {
1487 // Porting note: This assumes that compiled calling conventions always
1488 // pass the receiver oop in a register. If this is not true on some
1489 // platform, pick a temp and load the receiver from stack.
1490 fatal("receiver always in a register");
1491 receiver_reg = rcx; // known to be free at this point
1492 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1493 } else {
1494 // no data motion is needed
1495 receiver_reg = r->as_Register();
1496 }
1497 }
1498
1499 // Figure out which address we are really jumping to:
1500 MethodHandles::generate_method_handle_dispatch(masm, iid,
1501 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1502 }
1503
1504 // ---------------------------------------------------------------------------
1505 // Generate a native wrapper for a given method. The method takes arguments
1506 // in the Java compiled code convention, marshals them to the native
1507 // convention (handlizes oops, etc), transitions to native, makes the call,
1508 // returns to java state (possibly blocking), unhandlizes any result and
1509 // returns.
1510 //
1511 // Critical native functions are a shorthand for the use of
1512 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1513 // functions. The wrapper is expected to unpack the arguments before
1514 // passing them to the callee and perform checks before and after the
1515 // native call to ensure that they GCLocker
1516 // lock_critical/unlock_critical semantics are followed. Some other
1517 // parts of JNI setup are skipped like the tear down of the JNI handle
1518 // block and the check for pending exceptions it's impossible for them
1519 // to be thrown.
1520 //
1521 // They are roughly structured like this:
1522 // if (GCLocker::needs_gc())
1523 // SharedRuntime::block_for_jni_critical();
1524 // tranistion to thread_in_native
1525 // unpack arrray arguments and call native entry point
1526 // check for safepoint in progress
1527 // check if any thread suspend flags are set
1528 // call into JVM and possible unlock the JNI critical
1529 // if a GC was suppressed while in the critical native.
1530 // transition back to thread_in_Java
1531 // return to caller
1532 //
1533 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1534 const methodHandle& method,
1535 int compile_id,
1536 BasicType* in_sig_bt,
1537 VMRegPair* in_regs,
1538 BasicType ret_type) {
1539 if (method->is_method_handle_intrinsic()) {
1540 vmIntrinsics::ID iid = method->intrinsic_id();
1541 intptr_t start = (intptr_t)__ pc();
1542 int vep_offset = ((intptr_t)__ pc()) - start;
1543 gen_special_dispatch(masm,
1544 method,
1545 in_sig_bt,
1546 in_regs);
1547 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1548 __ flush();
1549 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1550 return nmethod::new_native_nmethod(method,
1551 compile_id,
1552 masm->code(),
1553 vep_offset,
1554 frame_complete,
1555 stack_slots / VMRegImpl::slots_per_word,
1556 in_ByteSize(-1),
1557 in_ByteSize(-1),
1558 (OopMapSet*)NULL);
1559 }
1560 bool is_critical_native = true;
1561 address native_func = method->critical_native_function();
1562 if (native_func == NULL) {
1563 native_func = method->native_function();
1564 is_critical_native = false;
1565 }
1566 assert(native_func != NULL, "must have function");
1567
1568 // An OopMap for lock (and class if static)
1569 OopMapSet *oop_maps = new OopMapSet();
1570
1571 // We have received a description of where all the java arg are located
1572 // on entry to the wrapper. We need to convert these args to where
1573 // the jni function will expect them. To figure out where they go
1574 // we convert the java signature to a C signature by inserting
1575 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1576
1577 const int total_in_args = method->size_of_parameters();
1578 int total_c_args = total_in_args;
1579 if (!is_critical_native) {
1580 total_c_args += 1;
1581 if (method->is_static()) {
1582 total_c_args++;
1583 }
1584 } else {
1585 for (int i = 0; i < total_in_args; i++) {
1586 if (in_sig_bt[i] == T_ARRAY) {
1587 total_c_args++;
1588 }
1589 }
1590 }
1591
1592 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1593 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1594 BasicType* in_elem_bt = NULL;
1595
1596 int argc = 0;
1597 if (!is_critical_native) {
1598 out_sig_bt[argc++] = T_ADDRESS;
1599 if (method->is_static()) {
1600 out_sig_bt[argc++] = T_OBJECT;
1601 }
1602
1603 for (int i = 0; i < total_in_args ; i++ ) {
1604 out_sig_bt[argc++] = in_sig_bt[i];
1605 }
1606 } else {
1607 Thread* THREAD = Thread::current();
1608 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args);
1609 SignatureStream ss(method->signature());
1610 for (int i = 0; i < total_in_args ; i++ ) {
1611 if (in_sig_bt[i] == T_ARRAY) {
1612 // Arrays are passed as int, elem* pair
1613 out_sig_bt[argc++] = T_INT;
1614 out_sig_bt[argc++] = T_ADDRESS;
1615 Symbol* atype = ss.as_symbol(CHECK_NULL);
1616 const char* at = atype->as_C_string();
1617 if (strlen(at) == 2) {
1618 assert(at[0] == '[', "must be");
1619 switch (at[1]) {
1620 case 'B': in_elem_bt[i] = T_BYTE; break;
1621 case 'C': in_elem_bt[i] = T_CHAR; break;
1622 case 'D': in_elem_bt[i] = T_DOUBLE; break;
1623 case 'F': in_elem_bt[i] = T_FLOAT; break;
1624 case 'I': in_elem_bt[i] = T_INT; break;
1625 case 'J': in_elem_bt[i] = T_LONG; break;
1626 case 'S': in_elem_bt[i] = T_SHORT; break;
1627 case 'Z': in_elem_bt[i] = T_BOOLEAN; break;
1628 default: ShouldNotReachHere();
1629 }
1630 }
1631 } else {
1632 out_sig_bt[argc++] = in_sig_bt[i];
1633 in_elem_bt[i] = T_VOID;
1634 }
1635 if (in_sig_bt[i] != T_VOID) {
1636 assert(in_sig_bt[i] == ss.type(), "must match");
1637 ss.next();
1638 }
1639 }
1640 }
1641
1642 // Now figure out where the args must be stored and how much stack space
1643 // they require.
1644 int out_arg_slots;
1645 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args);
1646
1647 // Compute framesize for the wrapper. We need to handlize all oops in
1648 // registers a max of 2 on x86.
1649
1650 // Calculate the total number of stack slots we will need.
1651
1652 // First count the abi requirement plus all of the outgoing args
1653 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1654
1655 // Now the space for the inbound oop handle area
1656 int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers
1657 if (is_critical_native) {
1658 // Critical natives may have to call out so they need a save area
1659 // for register arguments.
1660 int double_slots = 0;
1661 int single_slots = 0;
1662 for ( int i = 0; i < total_in_args; i++) {
1663 if (in_regs[i].first()->is_Register()) {
1664 const Register reg = in_regs[i].first()->as_Register();
1665 switch (in_sig_bt[i]) {
1666 case T_ARRAY: // critical array (uses 2 slots on LP64)
1667 case T_BOOLEAN:
1668 case T_BYTE:
1669 case T_SHORT:
1670 case T_CHAR:
1671 case T_INT: single_slots++; break;
1672 case T_LONG: double_slots++; break;
1673 default: ShouldNotReachHere();
1674 }
1675 } else if (in_regs[i].first()->is_XMMRegister()) {
1676 switch (in_sig_bt[i]) {
1677 case T_FLOAT: single_slots++; break;
1678 case T_DOUBLE: double_slots++; break;
1679 default: ShouldNotReachHere();
1680 }
1681 } else if (in_regs[i].first()->is_FloatRegister()) {
1682 ShouldNotReachHere();
1683 }
1684 }
1685 total_save_slots = double_slots * 2 + single_slots;
1686 // align the save area
1687 if (double_slots != 0) {
1688 stack_slots = round_to(stack_slots, 2);
1689 }
1690 }
1691
1692 int oop_handle_offset = stack_slots;
1693 stack_slots += total_save_slots;
1694
1695 // Now any space we need for handlizing a klass if static method
1696
1697 int klass_slot_offset = 0;
1698 int klass_offset = -1;
1699 int lock_slot_offset = 0;
1700 bool is_static = false;
1701
1702 if (method->is_static()) {
1703 klass_slot_offset = stack_slots;
1704 stack_slots += VMRegImpl::slots_per_word;
1705 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1706 is_static = true;
1707 }
1708
1709 // Plus a lock if needed
1710
1711 if (method->is_synchronized()) {
1712 lock_slot_offset = stack_slots;
1713 stack_slots += VMRegImpl::slots_per_word;
1714 }
1715
1716 // Now a place (+2) to save return values or temp during shuffling
1717 // + 2 for return address (which we own) and saved rbp,
1718 stack_slots += 4;
1719
1720 // Ok The space we have allocated will look like:
1721 //
1722 //
1723 // FP-> | |
1724 // |---------------------|
1725 // | 2 slots for moves |
1726 // |---------------------|
1727 // | lock box (if sync) |
1728 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset)
1729 // | klass (if static) |
1730 // |---------------------| <- klass_slot_offset
1731 // | oopHandle area |
1732 // |---------------------| <- oop_handle_offset (a max of 2 registers)
1733 // | outbound memory |
1734 // | based arguments |
1735 // | |
1736 // |---------------------|
1737 // | |
1738 // SP-> | out_preserved_slots |
1739 //
1740 //
1741 // ****************************************************************************
1742 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1743 // arguments off of the stack after the jni call. Before the call we can use
1744 // instructions that are SP relative. After the jni call we switch to FP
1745 // relative instructions instead of re-adjusting the stack on windows.
1746 // ****************************************************************************
1747
1748
1749 // Now compute actual number of stack words we need rounding to make
1750 // stack properly aligned.
1751 stack_slots = round_to(stack_slots, StackAlignmentInSlots);
1752
1753 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1754
1755 intptr_t start = (intptr_t)__ pc();
1756
1757 // First thing make an ic check to see if we should even be here
1758
1759 // We are free to use all registers as temps without saving them and
1760 // restoring them except rbp. rbp is the only callee save register
1761 // as far as the interpreter and the compiler(s) are concerned.
1762
1763
1764 const Register ic_reg = rax;
1765 const Register receiver = rcx;
1766 Label hit;
1767 Label exception_pending;
1768
1769 __ verify_oop(receiver);
1770 __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
1771 __ jcc(Assembler::equal, hit);
1772
1773 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1774
1775 // verified entry must be aligned for code patching.
1776 // and the first 5 bytes must be in the same cache line
1777 // if we align at 8 then we will be sure 5 bytes are in the same line
1778 __ align(8);
1779
1780 __ bind(hit);
1781
1782 int vep_offset = ((intptr_t)__ pc()) - start;
1783
1784 #ifdef COMPILER1
1785 // For Object.hashCode, System.identityHashCode try to pull hashCode from object header if available.
1786 if ((InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) || (method->intrinsic_id() == vmIntrinsics::_identityHashCode)) {
1787 inline_check_hashcode_from_object_header(masm, method, rcx /*obj_reg*/, rax /*result*/);
1788 }
1789 #endif // COMPILER1
1790
1791 // The instruction at the verified entry point must be 5 bytes or longer
1792 // because it can be patched on the fly by make_non_entrant. The stack bang
1793 // instruction fits that requirement.
1794
1795 // Generate stack overflow check
1796
1797 if (UseStackBanging) {
1798 __ bang_stack_with_offset((int)JavaThread::stack_shadow_zone_size());
1799 } else {
1800 // need a 5 byte instruction to allow MT safe patching to non-entrant
1801 __ fat_nop();
1802 }
1803
1804 // Generate a new frame for the wrapper.
1805 __ enter();
1806 // -2 because return address is already present and so is saved rbp
1807 __ subptr(rsp, stack_size - 2*wordSize);
1808
1809 // Frame is now completed as far as size and linkage.
1810 int frame_complete = ((intptr_t)__ pc()) - start;
1811
1812 if (UseRTMLocking) {
1813 // Abort RTM transaction before calling JNI
1814 // because critical section will be large and will be
1815 // aborted anyway. Also nmethod could be deoptimized.
1816 __ xabort(0);
1817 }
1818
1819 // Calculate the difference between rsp and rbp,. We need to know it
1820 // after the native call because on windows Java Natives will pop
1821 // the arguments and it is painful to do rsp relative addressing
1822 // in a platform independent way. So after the call we switch to
1823 // rbp, relative addressing.
1824
1825 int fp_adjustment = stack_size - 2*wordSize;
1826
1827 #ifdef COMPILER2
1828 // C2 may leave the stack dirty if not in SSE2+ mode
1829 if (UseSSE >= 2) {
1830 __ verify_FPU(0, "c2i transition should have clean FPU stack");
1831 } else {
1832 __ empty_FPU_stack();
1833 }
1834 #endif /* COMPILER2 */
1835
1836 // Compute the rbp, offset for any slots used after the jni call
1837
1838 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment;
1839
1840 // We use rdi as a thread pointer because it is callee save and
1841 // if we load it once it is usable thru the entire wrapper
1842 const Register thread = rdi;
1843
1844 // We use rsi as the oop handle for the receiver/klass
1845 // It is callee save so it survives the call to native
1846
1847 const Register oop_handle_reg = rsi;
1848
1849 __ get_thread(thread);
1850
1851 if (is_critical_native) {
1852 check_needs_gc_for_critical_native(masm, thread, stack_slots, total_c_args, total_in_args,
1853 oop_handle_offset, oop_maps, in_regs, in_sig_bt);
1854 }
1855
1856 //
1857 // We immediately shuffle the arguments so that any vm call we have to
1858 // make from here on out (sync slow path, jvmti, etc.) we will have
1859 // captured the oops from our caller and have a valid oopMap for
1860 // them.
1861
1862 // -----------------
1863 // The Grand Shuffle
1864 //
1865 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
1866 // and, if static, the class mirror instead of a receiver. This pretty much
1867 // guarantees that register layout will not match (and x86 doesn't use reg
1868 // parms though amd does). Since the native abi doesn't use register args
1869 // and the java conventions does we don't have to worry about collisions.
1870 // All of our moved are reg->stack or stack->stack.
1871 // We ignore the extra arguments during the shuffle and handle them at the
1872 // last moment. The shuffle is described by the two calling convention
1873 // vectors we have in our possession. We simply walk the java vector to
1874 // get the source locations and the c vector to get the destinations.
1875
1876 int c_arg = is_critical_native ? 0 : (method->is_static() ? 2 : 1 );
1877
1878 // Record rsp-based slot for receiver on stack for non-static methods
1879 int receiver_offset = -1;
1880
1881 // This is a trick. We double the stack slots so we can claim
1882 // the oops in the caller's frame. Since we are sure to have
1883 // more args than the caller doubling is enough to make
1884 // sure we can capture all the incoming oop args from the
1885 // caller.
1886 //
1887 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1888
1889 // Mark location of rbp,
1890 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg());
1891
1892 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx
1893 // Are free to temporaries if we have to do stack to steck moves.
1894 // All inbound args are referenced based on rbp, and all outbound args via rsp.
1895
1896 for (int i = 0; i < total_in_args ; i++, c_arg++ ) {
1897 switch (in_sig_bt[i]) {
1898 case T_ARRAY:
1899 if (is_critical_native) {
1900 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]);
1901 c_arg++;
1902 break;
1903 }
1904 case T_OBJECT:
1905 assert(!is_critical_native, "no oop arguments");
1906 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1907 ((i == 0) && (!is_static)),
1908 &receiver_offset);
1909 break;
1910 case T_VOID:
1911 break;
1912
1913 case T_FLOAT:
1914 float_move(masm, in_regs[i], out_regs[c_arg]);
1915 break;
1916
1917 case T_DOUBLE:
1918 assert( i + 1 < total_in_args &&
1919 in_sig_bt[i + 1] == T_VOID &&
1920 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1921 double_move(masm, in_regs[i], out_regs[c_arg]);
1922 break;
1923
1924 case T_LONG :
1925 long_move(masm, in_regs[i], out_regs[c_arg]);
1926 break;
1927
1928 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1929
1930 default:
1931 simple_move32(masm, in_regs[i], out_regs[c_arg]);
1932 }
1933 }
1934
1935 // Pre-load a static method's oop into rsi. Used both by locking code and
1936 // the normal JNI call code.
1937 if (method->is_static() && !is_critical_native) {
1938
1939 // load opp into a register
1940 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror()));
1941
1942 // Now handlize the static class mirror it's known not-null.
1943 __ movptr(Address(rsp, klass_offset), oop_handle_reg);
1944 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1945
1946 // Now get the handle
1947 __ lea(oop_handle_reg, Address(rsp, klass_offset));
1948 // store the klass handle as second argument
1949 __ movptr(Address(rsp, wordSize), oop_handle_reg);
1950 }
1951
1952 // Change state to native (we save the return address in the thread, since it might not
1953 // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
1954 // points into the right code segment. It does not have to be the correct return pc.
1955 // We use the same pc/oopMap repeatedly when we call out
1956
1957 intptr_t the_pc = (intptr_t) __ pc();
1958 oop_maps->add_gc_map(the_pc - start, map);
1959
1960 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc);
1961
1962
1963 // We have all of the arguments setup at this point. We must not touch any register
1964 // argument registers at this point (what if we save/restore them there are no oop?
1965
1966 {
1967 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
1968 __ mov_metadata(rax, method());
1969 __ call_VM_leaf(
1970 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
1971 thread, rax);
1972 }
1973
1974 // RedefineClasses() tracing support for obsolete method entry
1975 if (log_is_enabled(Trace, redefine, class, obsolete)) {
1976 __ mov_metadata(rax, method());
1977 __ call_VM_leaf(
1978 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1979 thread, rax);
1980 }
1981
1982 // These are register definitions we need for locking/unlocking
1983 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction
1984 const Register obj_reg = rcx; // Will contain the oop
1985 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock)
1986
1987 Label slow_path_lock;
1988 Label lock_done;
1989
1990 // Lock a synchronized method
1991 if (method->is_synchronized()) {
1992 assert(!is_critical_native, "unhandled");
1993
1994
1995 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1996
1997 // Get the handle (the 2nd argument)
1998 __ movptr(oop_handle_reg, Address(rsp, wordSize));
1999
2000 // Get address of the box
2001
2002 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset));
2003
2004 // Load the oop from the handle
2005 __ movptr(obj_reg, Address(oop_handle_reg, 0));
2006
2007 if (UseBiasedLocking) {
2008 // Note that oop_handle_reg is trashed during this call
2009 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, oop_handle_reg, false, lock_done, &slow_path_lock);
2010 }
2011
2012 // Load immediate 1 into swap_reg %rax,
2013 __ movptr(swap_reg, 1);
2014
2015 // Load (object->mark() | 1) into swap_reg %rax,
2016 __ orptr(swap_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
2017
2018 // Save (object->mark() | 1) into BasicLock's displaced header
2019 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2020
2021 if (os::is_MP()) {
2022 __ lock();
2023 }
2024
2025 // src -> dest iff dest == rax, else rax, <- dest
2026 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg)
2027 __ cmpxchgptr(lock_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
2028 __ jcc(Assembler::equal, lock_done);
2029
2030 // Test if the oopMark is an obvious stack pointer, i.e.,
2031 // 1) (mark & 3) == 0, and
2032 // 2) rsp <= mark < mark + os::pagesize()
2033 // These 3 tests can be done by evaluating the following
2034 // expression: ((mark - rsp) & (3 - os::vm_page_size())),
2035 // assuming both stack pointer and pagesize have their
2036 // least significant 2 bits clear.
2037 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg
2038
2039 __ subptr(swap_reg, rsp);
2040 __ andptr(swap_reg, 3 - os::vm_page_size());
2041
2042 // Save the test result, for recursive case, the result is zero
2043 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2044 __ jcc(Assembler::notEqual, slow_path_lock);
2045 // Slow path will re-enter here
2046 __ bind(lock_done);
2047
2048 if (UseBiasedLocking) {
2049 // Re-fetch oop_handle_reg as we trashed it above
2050 __ movptr(oop_handle_reg, Address(rsp, wordSize));
2051 }
2052 }
2053
2054
2055 // Finally just about ready to make the JNI call
2056
2057
2058 // get JNIEnv* which is first argument to native
2059 if (!is_critical_native) {
2060 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset())));
2061 __ movptr(Address(rsp, 0), rdx);
2062 }
2063
2064 // Now set thread in native
2065 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native);
2066
2067 __ call(RuntimeAddress(native_func));
2068
2069 // Verify or restore cpu control state after JNI call
2070 __ restore_cpu_control_state_after_jni();
2071
2072 // WARNING - on Windows Java Natives use pascal calling convention and pop the
2073 // arguments off of the stack. We could just re-adjust the stack pointer here
2074 // and continue to do SP relative addressing but we instead switch to FP
2075 // relative addressing.
2076
2077 // Unpack native results.
2078 switch (ret_type) {
2079 case T_BOOLEAN: __ c2bool(rax); break;
2080 case T_CHAR : __ andptr(rax, 0xFFFF); break;
2081 case T_BYTE : __ sign_extend_byte (rax); break;
2082 case T_SHORT : __ sign_extend_short(rax); break;
2083 case T_INT : /* nothing to do */ break;
2084 case T_DOUBLE :
2085 case T_FLOAT :
2086 // Result is in st0 we'll save as needed
2087 break;
2088 case T_ARRAY: // Really a handle
2089 case T_OBJECT: // Really a handle
2090 break; // can't de-handlize until after safepoint check
2091 case T_VOID: break;
2092 case T_LONG: break;
2093 default : ShouldNotReachHere();
2094 }
2095
2096 // Switch thread to "native transition" state before reading the synchronization state.
2097 // This additional state is necessary because reading and testing the synchronization
2098 // state is not atomic w.r.t. GC, as this scenario demonstrates:
2099 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
2100 // VM thread changes sync state to synchronizing and suspends threads for GC.
2101 // Thread A is resumed to finish this native method, but doesn't block here since it
2102 // didn't see any synchronization is progress, and escapes.
2103 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
2104
2105 if(os::is_MP()) {
2106 if (UseMembar) {
2107 // Force this write out before the read below
2108 __ membar(Assembler::Membar_mask_bits(
2109 Assembler::LoadLoad | Assembler::LoadStore |
2110 Assembler::StoreLoad | Assembler::StoreStore));
2111 } else {
2112 // Write serialization page so VM thread can do a pseudo remote membar.
2113 // We use the current thread pointer to calculate a thread specific
2114 // offset to write to within the page. This minimizes bus traffic
2115 // due to cache line collision.
2116 __ serialize_memory(thread, rcx);
2117 }
2118 }
2119
2120 if (AlwaysRestoreFPU) {
2121 // Make sure the control word is correct.
2122 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
2123 }
2124
2125 Label after_transition;
2126
2127 // check for safepoint operation in progress and/or pending suspend requests
2128 { Label Continue;
2129
2130 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()),
2131 SafepointSynchronize::_not_synchronized);
2132
2133 Label L;
2134 __ jcc(Assembler::notEqual, L);
2135 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0);
2136 __ jcc(Assembler::equal, Continue);
2137 __ bind(L);
2138
2139 // Don't use call_VM as it will see a possible pending exception and forward it
2140 // and never return here preventing us from clearing _last_native_pc down below.
2141 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
2142 // preserved and correspond to the bcp/locals pointers. So we do a runtime call
2143 // by hand.
2144 //
2145 __ vzeroupper();
2146
2147 save_native_result(masm, ret_type, stack_slots);
2148 __ push(thread);
2149 if (!is_critical_native) {
2150 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
2151 JavaThread::check_special_condition_for_native_trans)));
2152 } else {
2153 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
2154 JavaThread::check_special_condition_for_native_trans_and_transition)));
2155 }
2156 __ increment(rsp, wordSize);
2157 // Restore any method result value
2158 restore_native_result(masm, ret_type, stack_slots);
2159
2160 if (is_critical_native) {
2161 // The call above performed the transition to thread_in_Java so
2162 // skip the transition logic below.
2163 __ jmpb(after_transition);
2164 }
2165
2166 __ bind(Continue);
2167 }
2168
2169 // change thread state
2170 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java);
2171 __ bind(after_transition);
2172
2173 Label reguard;
2174 Label reguard_done;
2175 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_reserved_disabled);
2176 __ jcc(Assembler::equal, reguard);
2177
2178 // slow path reguard re-enters here
2179 __ bind(reguard_done);
2180
2181 // Handle possible exception (will unlock if necessary)
2182
2183 // native result if any is live
2184
2185 // Unlock
2186 Label slow_path_unlock;
2187 Label unlock_done;
2188 if (method->is_synchronized()) {
2189
2190 Label done;
2191
2192 // Get locked oop from the handle we passed to jni
2193 __ movptr(obj_reg, Address(oop_handle_reg, 0));
2194
2195 if (UseBiasedLocking) {
2196 __ biased_locking_exit(obj_reg, rbx, done);
2197 }
2198
2199 // Simple recursive lock?
2200
2201 __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD);
2202 __ jcc(Assembler::equal, done);
2203
2204 // Must save rax, if if it is live now because cmpxchg must use it
2205 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2206 save_native_result(masm, ret_type, stack_slots);
2207 }
2208
2209 // get old displaced header
2210 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset));
2211
2212 // get address of the stack lock
2213 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2214
2215 // Atomic swap old header if oop still contains the stack lock
2216 if (os::is_MP()) {
2217 __ lock();
2218 }
2219
2220 // src -> dest iff dest == rax, else rax, <- dest
2221 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg)
2222 __ cmpxchgptr(rbx, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
2223 __ jcc(Assembler::notEqual, slow_path_unlock);
2224
2225 // slow path re-enters here
2226 __ bind(unlock_done);
2227 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2228 restore_native_result(masm, ret_type, stack_slots);
2229 }
2230
2231 __ bind(done);
2232
2233 }
2234
2235 {
2236 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
2237 // Tell dtrace about this method exit
2238 save_native_result(masm, ret_type, stack_slots);
2239 __ mov_metadata(rax, method());
2240 __ call_VM_leaf(
2241 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2242 thread, rax);
2243 restore_native_result(masm, ret_type, stack_slots);
2244 }
2245
2246 // We can finally stop using that last_Java_frame we setup ages ago
2247
2248 __ reset_last_Java_frame(thread, false);
2249
2250 // Unbox oop result, e.g. JNIHandles::resolve value.
2251 if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
2252 __ resolve_jobject(rax /* value */,
2253 thread /* thread */,
2254 rcx /* tmp */);
2255 }
2256
2257 if (CheckJNICalls) {
2258 // clear_pending_jni_exception_check
2259 __ movptr(Address(thread, JavaThread::pending_jni_exception_check_fn_offset()), NULL_WORD);
2260 }
2261
2262 if (!is_critical_native) {
2263 // reset handle block
2264 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset()));
2265 __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD);
2266
2267 // Any exception pending?
2268 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2269 __ jcc(Assembler::notEqual, exception_pending);
2270 }
2271
2272 // no exception, we're almost done
2273
2274 // check that only result value is on FPU stack
2275 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit");
2276
2277 // Fixup floating pointer results so that result looks like a return from a compiled method
2278 if (ret_type == T_FLOAT) {
2279 if (UseSSE >= 1) {
2280 // Pop st0 and store as float and reload into xmm register
2281 __ fstp_s(Address(rbp, -4));
2282 __ movflt(xmm0, Address(rbp, -4));
2283 }
2284 } else if (ret_type == T_DOUBLE) {
2285 if (UseSSE >= 2) {
2286 // Pop st0 and store as double and reload into xmm register
2287 __ fstp_d(Address(rbp, -8));
2288 __ movdbl(xmm0, Address(rbp, -8));
2289 }
2290 }
2291
2292 // Return
2293
2294 __ leave();
2295 __ ret(0);
2296
2297 // Unexpected paths are out of line and go here
2298
2299 // Slow path locking & unlocking
2300 if (method->is_synchronized()) {
2301
2302 // BEGIN Slow path lock
2303
2304 __ bind(slow_path_lock);
2305
2306 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2307 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2308 __ push(thread);
2309 __ push(lock_reg);
2310 __ push(obj_reg);
2311 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C)));
2312 __ addptr(rsp, 3*wordSize);
2313
2314 #ifdef ASSERT
2315 { Label L;
2316 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
2317 __ jcc(Assembler::equal, L);
2318 __ stop("no pending exception allowed on exit from monitorenter");
2319 __ bind(L);
2320 }
2321 #endif
2322 __ jmp(lock_done);
2323
2324 // END Slow path lock
2325
2326 // BEGIN Slow path unlock
2327 __ bind(slow_path_unlock);
2328 __ vzeroupper();
2329 // Slow path unlock
2330
2331 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2332 save_native_result(masm, ret_type, stack_slots);
2333 }
2334 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2335
2336 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2337 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
2338
2339
2340 // should be a peal
2341 // +wordSize because of the push above
2342 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2343 __ push(thread);
2344 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2345 __ push(rax);
2346
2347 __ push(obj_reg);
2348 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
2349 __ addptr(rsp, 3*wordSize);
2350 #ifdef ASSERT
2351 {
2352 Label L;
2353 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2354 __ jcc(Assembler::equal, L);
2355 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2356 __ bind(L);
2357 }
2358 #endif /* ASSERT */
2359
2360 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2361
2362 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2363 restore_native_result(masm, ret_type, stack_slots);
2364 }
2365 __ jmp(unlock_done);
2366 // END Slow path unlock
2367
2368 }
2369
2370 // SLOW PATH Reguard the stack if needed
2371
2372 __ bind(reguard);
2373 __ vzeroupper();
2374 save_native_result(masm, ret_type, stack_slots);
2375 {
2376 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
2377 }
2378 restore_native_result(masm, ret_type, stack_slots);
2379 __ jmp(reguard_done);
2380
2381
2382 // BEGIN EXCEPTION PROCESSING
2383
2384 if (!is_critical_native) {
2385 // Forward the exception
2386 __ bind(exception_pending);
2387
2388 // remove possible return value from FPU register stack
2389 __ empty_FPU_stack();
2390
2391 // pop our frame
2392 __ leave();
2393 // and forward the exception
2394 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2395 }
2396
2397 __ flush();
2398
2399 nmethod *nm = nmethod::new_native_nmethod(method,
2400 compile_id,
2401 masm->code(),
2402 vep_offset,
2403 frame_complete,
2404 stack_slots / VMRegImpl::slots_per_word,
2405 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2406 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2407 oop_maps);
2408
2409 if (is_critical_native) {
2410 nm->set_lazy_critical_native(true);
2411 }
2412
2413 return nm;
2414
2415 }
2416
2417 // this function returns the adjust size (in number of words) to a c2i adapter
2418 // activation for use during deoptimization
2419 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2420 return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2421 }
2422
2423
2424 uint SharedRuntime::out_preserve_stack_slots() {
2425 return 0;
2426 }
2427
2428 //------------------------------generate_deopt_blob----------------------------
2429 void SharedRuntime::generate_deopt_blob() {
2430 // allocate space for the code
2431 ResourceMark rm;
2432 // setup code generation tools
2433 // note: the buffer code size must account for StackShadowPages=50
2434 CodeBuffer buffer("deopt_blob", 1536, 1024);
2435 MacroAssembler* masm = new MacroAssembler(&buffer);
2436 int frame_size_in_words;
2437 OopMap* map = NULL;
2438 // Account for the extra args we place on the stack
2439 // by the time we call fetch_unroll_info
2440 const int additional_words = 2; // deopt kind, thread
2441
2442 OopMapSet *oop_maps = new OopMapSet();
2443
2444 // -------------
2445 // This code enters when returning to a de-optimized nmethod. A return
2446 // address has been pushed on the the stack, and return values are in
2447 // registers.
2448 // If we are doing a normal deopt then we were called from the patched
2449 // nmethod from the point we returned to the nmethod. So the return
2450 // address on the stack is wrong by NativeCall::instruction_size
2451 // We will adjust the value to it looks like we have the original return
2452 // address on the stack (like when we eagerly deoptimized).
2453 // In the case of an exception pending with deoptimized then we enter
2454 // with a return address on the stack that points after the call we patched
2455 // into the exception handler. We have the following register state:
2456 // rax,: exception
2457 // rbx,: exception handler
2458 // rdx: throwing pc
2459 // So in this case we simply jam rdx into the useless return address and
2460 // the stack looks just like we want.
2461 //
2462 // At this point we need to de-opt. We save the argument return
2463 // registers. We call the first C routine, fetch_unroll_info(). This
2464 // routine captures the return values and returns a structure which
2465 // describes the current frame size and the sizes of all replacement frames.
2466 // The current frame is compiled code and may contain many inlined
2467 // functions, each with their own JVM state. We pop the current frame, then
2468 // push all the new frames. Then we call the C routine unpack_frames() to
2469 // populate these frames. Finally unpack_frames() returns us the new target
2470 // address. Notice that callee-save registers are BLOWN here; they have
2471 // already been captured in the vframeArray at the time the return PC was
2472 // patched.
2473 address start = __ pc();
2474 Label cont;
2475
2476 // Prolog for non exception case!
2477
2478 // Save everything in sight.
2479
2480 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2481 // Normal deoptimization
2482 __ push(Deoptimization::Unpack_deopt);
2483 __ jmp(cont);
2484
2485 int reexecute_offset = __ pc() - start;
2486
2487 // Reexecute case
2488 // return address is the pc describes what bci to do re-execute at
2489
2490 // No need to update map as each call to save_live_registers will produce identical oopmap
2491 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2492
2493 __ push(Deoptimization::Unpack_reexecute);
2494 __ jmp(cont);
2495
2496 int exception_offset = __ pc() - start;
2497
2498 // Prolog for exception case
2499
2500 // all registers are dead at this entry point, except for rax, and
2501 // rdx which contain the exception oop and exception pc
2502 // respectively. Set them in TLS and fall thru to the
2503 // unpack_with_exception_in_tls entry point.
2504
2505 __ get_thread(rdi);
2506 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx);
2507 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax);
2508
2509 int exception_in_tls_offset = __ pc() - start;
2510
2511 // new implementation because exception oop is now passed in JavaThread
2512
2513 // Prolog for exception case
2514 // All registers must be preserved because they might be used by LinearScan
2515 // Exceptiop oop and throwing PC are passed in JavaThread
2516 // tos: stack at point of call to method that threw the exception (i.e. only
2517 // args are on the stack, no return address)
2518
2519 // make room on stack for the return address
2520 // It will be patched later with the throwing pc. The correct value is not
2521 // available now because loading it from memory would destroy registers.
2522 __ push(0);
2523
2524 // Save everything in sight.
2525
2526 // No need to update map as each call to save_live_registers will produce identical oopmap
2527 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2528
2529 // Now it is safe to overwrite any register
2530
2531 // store the correct deoptimization type
2532 __ push(Deoptimization::Unpack_exception);
2533
2534 // load throwing pc from JavaThread and patch it as the return address
2535 // of the current frame. Then clear the field in JavaThread
2536 __ get_thread(rdi);
2537 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset()));
2538 __ movptr(Address(rbp, wordSize), rdx);
2539 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD);
2540
2541 #ifdef ASSERT
2542 // verify that there is really an exception oop in JavaThread
2543 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset()));
2544 __ verify_oop(rax);
2545
2546 // verify that there is no pending exception
2547 Label no_pending_exception;
2548 __ movptr(rax, Address(rdi, Thread::pending_exception_offset()));
2549 __ testptr(rax, rax);
2550 __ jcc(Assembler::zero, no_pending_exception);
2551 __ stop("must not have pending exception here");
2552 __ bind(no_pending_exception);
2553 #endif
2554
2555 __ bind(cont);
2556
2557 // Compiled code leaves the floating point stack dirty, empty it.
2558 __ empty_FPU_stack();
2559
2560
2561 // Call C code. Need thread and this frame, but NOT official VM entry
2562 // crud. We cannot block on this call, no GC can happen.
2563 __ get_thread(rcx);
2564 __ push(rcx);
2565 // fetch_unroll_info needs to call last_java_frame()
2566 __ set_last_Java_frame(rcx, noreg, noreg, NULL);
2567
2568 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2569
2570 // Need to have an oopmap that tells fetch_unroll_info where to
2571 // find any register it might need.
2572
2573 oop_maps->add_gc_map( __ pc()-start, map);
2574
2575 // Discard args to fetch_unroll_info
2576 __ pop(rcx);
2577 __ pop(rcx);
2578
2579 __ get_thread(rcx);
2580 __ reset_last_Java_frame(rcx, false);
2581
2582 // Load UnrollBlock into EDI
2583 __ mov(rdi, rax);
2584
2585 // Move the unpack kind to a safe place in the UnrollBlock because
2586 // we are very short of registers
2587
2588 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes());
2589 // retrieve the deopt kind from the UnrollBlock.
2590 __ movl(rax, unpack_kind);
2591
2592 Label noException;
2593 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending?
2594 __ jcc(Assembler::notEqual, noException);
2595 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset()));
2596 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset()));
2597 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD);
2598 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD);
2599
2600 __ verify_oop(rax);
2601
2602 // Overwrite the result registers with the exception results.
2603 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2604 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2605
2606 __ bind(noException);
2607
2608 // Stack is back to only having register save data on the stack.
2609 // Now restore the result registers. Everything else is either dead or captured
2610 // in the vframeArray.
2611
2612 RegisterSaver::restore_result_registers(masm);
2613
2614 // Non standard control word may be leaked out through a safepoint blob, and we can
2615 // deopt at a poll point with the non standard control word. However, we should make
2616 // sure the control word is correct after restore_result_registers.
2617 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
2618
2619 // All of the register save area has been popped of the stack. Only the
2620 // return address remains.
2621
2622 // Pop all the frames we must move/replace.
2623 //
2624 // Frame picture (youngest to oldest)
2625 // 1: self-frame (no frame link)
2626 // 2: deopting frame (no frame link)
2627 // 3: caller of deopting frame (could be compiled/interpreted).
2628 //
2629 // Note: by leaving the return address of self-frame on the stack
2630 // and using the size of frame 2 to adjust the stack
2631 // when we are done the return to frame 3 will still be on the stack.
2632
2633 // Pop deoptimized frame
2634 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2635
2636 // sp should be pointing at the return address to the caller (3)
2637
2638 // Pick up the initial fp we should save
2639 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
2640 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
2641
2642 #ifdef ASSERT
2643 // Compilers generate code that bang the stack by as much as the
2644 // interpreter would need. So this stack banging should never
2645 // trigger a fault. Verify that it does not on non product builds.
2646 if (UseStackBanging) {
2647 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2648 __ bang_stack_size(rbx, rcx);
2649 }
2650 #endif
2651
2652 // Load array of frame pcs into ECX
2653 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2654
2655 __ pop(rsi); // trash the old pc
2656
2657 // Load array of frame sizes into ESI
2658 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2659
2660 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2661
2662 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2663 __ movl(counter, rbx);
2664
2665 // Now adjust the caller's stack to make up for the extra locals
2666 // but record the original sp so that we can save it in the skeletal interpreter
2667 // frame and the stack walking of interpreter_sender will get the unextended sp
2668 // value and not the "real" sp value.
2669
2670 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2671 __ movptr(sp_temp, rsp);
2672 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2673 __ subptr(rsp, rbx);
2674
2675 // Push interpreter frames in a loop
2676 Label loop;
2677 __ bind(loop);
2678 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2679 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
2680 __ pushptr(Address(rcx, 0)); // save return address
2681 __ enter(); // save old & set new rbp,
2682 __ subptr(rsp, rbx); // Prolog!
2683 __ movptr(rbx, sp_temp); // sender's sp
2684 // This value is corrected by layout_activation_impl
2685 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD);
2686 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2687 __ movptr(sp_temp, rsp); // pass to next frame
2688 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2689 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2690 __ decrementl(counter); // decrement counter
2691 __ jcc(Assembler::notZero, loop);
2692 __ pushptr(Address(rcx, 0)); // save final return address
2693
2694 // Re-push self-frame
2695 __ enter(); // save old & set new rbp,
2696
2697 // Return address and rbp, are in place
2698 // We'll push additional args later. Just allocate a full sized
2699 // register save area
2700 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize);
2701
2702 // Restore frame locals after moving the frame
2703 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2704 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2705 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local
2706 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2707 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2708
2709 // Set up the args to unpack_frame
2710
2711 __ pushl(unpack_kind); // get the unpack_kind value
2712 __ get_thread(rcx);
2713 __ push(rcx);
2714
2715 // set last_Java_sp, last_Java_fp
2716 __ set_last_Java_frame(rcx, noreg, rbp, NULL);
2717
2718 // Call C code. Need thread but NOT official VM entry
2719 // crud. We cannot block on this call, no GC can happen. Call should
2720 // restore return values to their stack-slots with the new SP.
2721 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2722 // Set an oopmap for the call site
2723 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 ));
2724
2725 // rax, contains the return result type
2726 __ push(rax);
2727
2728 __ get_thread(rcx);
2729 __ reset_last_Java_frame(rcx, false);
2730
2731 // Collect return values
2732 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize));
2733 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize));
2734
2735 // Clear floating point stack before returning to interpreter
2736 __ empty_FPU_stack();
2737
2738 // Check if we should push the float or double return value.
2739 Label results_done, yes_double_value;
2740 __ cmpl(Address(rsp, 0), T_DOUBLE);
2741 __ jcc (Assembler::zero, yes_double_value);
2742 __ cmpl(Address(rsp, 0), T_FLOAT);
2743 __ jcc (Assembler::notZero, results_done);
2744
2745 // return float value as expected by interpreter
2746 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2747 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2748 __ jmp(results_done);
2749
2750 // return double value as expected by interpreter
2751 __ bind(yes_double_value);
2752 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2753 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2754
2755 __ bind(results_done);
2756
2757 // Pop self-frame.
2758 __ leave(); // Epilog!
2759
2760 // Jump to interpreter
2761 __ ret(0);
2762
2763 // -------------
2764 // make sure all code is generated
2765 masm->flush();
2766
2767 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2768 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2769 }
2770
2771
2772 #ifdef COMPILER2
2773 //------------------------------generate_uncommon_trap_blob--------------------
2774 void SharedRuntime::generate_uncommon_trap_blob() {
2775 // allocate space for the code
2776 ResourceMark rm;
2777 // setup code generation tools
2778 CodeBuffer buffer("uncommon_trap_blob", 512, 512);
2779 MacroAssembler* masm = new MacroAssembler(&buffer);
2780
2781 enum frame_layout {
2782 arg0_off, // thread sp + 0 // Arg location for
2783 arg1_off, // unloaded_class_index sp + 1 // calling C
2784 arg2_off, // exec_mode sp + 2
2785 // The frame sender code expects that rbp will be in the "natural" place and
2786 // will override any oopMap setting for it. We must therefore force the layout
2787 // so that it agrees with the frame sender code.
2788 rbp_off, // callee saved register sp + 3
2789 return_off, // slot for return address sp + 4
2790 framesize
2791 };
2792
2793 address start = __ pc();
2794
2795 if (UseRTMLocking) {
2796 // Abort RTM transaction before possible nmethod deoptimization.
2797 __ xabort(0);
2798 }
2799
2800 // Push self-frame.
2801 __ subptr(rsp, return_off*wordSize); // Epilog!
2802
2803 // rbp, is an implicitly saved callee saved register (i.e. the calling
2804 // convention will save restore it in prolog/epilog) Other than that
2805 // there are no callee save registers no that adapter frames are gone.
2806 __ movptr(Address(rsp, rbp_off*wordSize), rbp);
2807
2808 // Clear the floating point exception stack
2809 __ empty_FPU_stack();
2810
2811 // set last_Java_sp
2812 __ get_thread(rdx);
2813 __ set_last_Java_frame(rdx, noreg, noreg, NULL);
2814
2815 // Call C code. Need thread but NOT official VM entry
2816 // crud. We cannot block on this call, no GC can happen. Call should
2817 // capture callee-saved registers as well as return values.
2818 __ movptr(Address(rsp, arg0_off*wordSize), rdx);
2819 // argument already in ECX
2820 __ movl(Address(rsp, arg1_off*wordSize),rcx);
2821 __ movl(Address(rsp, arg2_off*wordSize), Deoptimization::Unpack_uncommon_trap);
2822 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
2823
2824 // Set an oopmap for the call site
2825 OopMapSet *oop_maps = new OopMapSet();
2826 OopMap* map = new OopMap( framesize, 0 );
2827 // No oopMap for rbp, it is known implicitly
2828
2829 oop_maps->add_gc_map( __ pc()-start, map);
2830
2831 __ get_thread(rcx);
2832
2833 __ reset_last_Java_frame(rcx, false);
2834
2835 // Load UnrollBlock into EDI
2836 __ movptr(rdi, rax);
2837
2838 #ifdef ASSERT
2839 { Label L;
2840 __ cmpptr(Address(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()),
2841 (int32_t)Deoptimization::Unpack_uncommon_trap);
2842 __ jcc(Assembler::equal, L);
2843 __ stop("SharedRuntime::generate_deopt_blob: expected Unpack_uncommon_trap");
2844 __ bind(L);
2845 }
2846 #endif
2847
2848 // Pop all the frames we must move/replace.
2849 //
2850 // Frame picture (youngest to oldest)
2851 // 1: self-frame (no frame link)
2852 // 2: deopting frame (no frame link)
2853 // 3: caller of deopting frame (could be compiled/interpreted).
2854
2855 // Pop self-frame. We have no frame, and must rely only on EAX and ESP.
2856 __ addptr(rsp,(framesize-1)*wordSize); // Epilog!
2857
2858 // Pop deoptimized frame
2859 __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2860 __ addptr(rsp, rcx);
2861
2862 // sp should be pointing at the return address to the caller (3)
2863
2864 // Pick up the initial fp we should save
2865 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
2866 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
2867
2868 #ifdef ASSERT
2869 // Compilers generate code that bang the stack by as much as the
2870 // interpreter would need. So this stack banging should never
2871 // trigger a fault. Verify that it does not on non product builds.
2872 if (UseStackBanging) {
2873 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2874 __ bang_stack_size(rbx, rcx);
2875 }
2876 #endif
2877
2878 // Load array of frame pcs into ECX
2879 __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2880
2881 __ pop(rsi); // trash the pc
2882
2883 // Load array of frame sizes into ESI
2884 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2885
2886 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2887
2888 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2889 __ movl(counter, rbx);
2890
2891 // Now adjust the caller's stack to make up for the extra locals
2892 // but record the original sp so that we can save it in the skeletal interpreter
2893 // frame and the stack walking of interpreter_sender will get the unextended sp
2894 // value and not the "real" sp value.
2895
2896 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2897 __ movptr(sp_temp, rsp);
2898 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2899 __ subptr(rsp, rbx);
2900
2901 // Push interpreter frames in a loop
2902 Label loop;
2903 __ bind(loop);
2904 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2905 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
2906 __ pushptr(Address(rcx, 0)); // save return address
2907 __ enter(); // save old & set new rbp,
2908 __ subptr(rsp, rbx); // Prolog!
2909 __ movptr(rbx, sp_temp); // sender's sp
2910 // This value is corrected by layout_activation_impl
2911 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD );
2912 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2913 __ movptr(sp_temp, rsp); // pass to next frame
2914 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2915 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2916 __ decrementl(counter); // decrement counter
2917 __ jcc(Assembler::notZero, loop);
2918 __ pushptr(Address(rcx, 0)); // save final return address
2919
2920 // Re-push self-frame
2921 __ enter(); // save old & set new rbp,
2922 __ subptr(rsp, (framesize-2) * wordSize); // Prolog!
2923
2924
2925 // set last_Java_sp, last_Java_fp
2926 __ get_thread(rdi);
2927 __ set_last_Java_frame(rdi, noreg, rbp, NULL);
2928
2929 // Call C code. Need thread but NOT official VM entry
2930 // crud. We cannot block on this call, no GC can happen. Call should
2931 // restore return values to their stack-slots with the new SP.
2932 __ movptr(Address(rsp,arg0_off*wordSize),rdi);
2933 __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap);
2934 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2935 // Set an oopmap for the call site
2936 oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) );
2937
2938 __ get_thread(rdi);
2939 __ reset_last_Java_frame(rdi, true);
2940
2941 // Pop self-frame.
2942 __ leave(); // Epilog!
2943
2944 // Jump to interpreter
2945 __ ret(0);
2946
2947 // -------------
2948 // make sure all code is generated
2949 masm->flush();
2950
2951 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize);
2952 }
2953 #endif // COMPILER2
2954
2955 //------------------------------generate_handler_blob------
2956 //
2957 // Generate a special Compile2Runtime blob that saves all registers,
2958 // setup oopmap, and calls safepoint code to stop the compiled code for
2959 // a safepoint.
2960 //
2961 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
2962
2963 // Account for thread arg in our frame
2964 const int additional_words = 1;
2965 int frame_size_in_words;
2966
2967 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
2968
2969 ResourceMark rm;
2970 OopMapSet *oop_maps = new OopMapSet();
2971 OopMap* map;
2972
2973 // allocate space for the code
2974 // setup code generation tools
2975 CodeBuffer buffer("handler_blob", 1024, 512);
2976 MacroAssembler* masm = new MacroAssembler(&buffer);
2977
2978 const Register java_thread = rdi; // callee-saved for VC++
2979 address start = __ pc();
2980 address call_pc = NULL;
2981 bool cause_return = (poll_type == POLL_AT_RETURN);
2982 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP);
2983
2984 if (UseRTMLocking) {
2985 // Abort RTM transaction before calling runtime
2986 // because critical section will be large and will be
2987 // aborted anyway. Also nmethod could be deoptimized.
2988 __ xabort(0);
2989 }
2990
2991 // If cause_return is true we are at a poll_return and there is
2992 // the return address on the stack to the caller on the nmethod
2993 // that is safepoint. We can leave this return on the stack and
2994 // effectively complete the return and safepoint in the caller.
2995 // Otherwise we push space for a return address that the safepoint
2996 // handler will install later to make the stack walking sensible.
2997 if (!cause_return)
2998 __ push(rbx); // Make room for return address (or push it again)
2999
3000 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false, save_vectors);
3001
3002 // The following is basically a call_VM. However, we need the precise
3003 // address of the call in order to generate an oopmap. Hence, we do all the
3004 // work ourselves.
3005
3006 // Push thread argument and setup last_Java_sp
3007 __ get_thread(java_thread);
3008 __ push(java_thread);
3009 __ set_last_Java_frame(java_thread, noreg, noreg, NULL);
3010
3011 // if this was not a poll_return then we need to correct the return address now.
3012 if (!cause_return) {
3013 __ movptr(rax, Address(java_thread, JavaThread::saved_exception_pc_offset()));
3014 __ movptr(Address(rbp, wordSize), rax);
3015 }
3016
3017 // do the call
3018 __ call(RuntimeAddress(call_ptr));
3019
3020 // Set an oopmap for the call site. This oopmap will map all
3021 // oop-registers and debug-info registers as callee-saved. This
3022 // will allow deoptimization at this safepoint to find all possible
3023 // debug-info recordings, as well as let GC find all oops.
3024
3025 oop_maps->add_gc_map( __ pc() - start, map);
3026
3027 // Discard arg
3028 __ pop(rcx);
3029
3030 Label noException;
3031
3032 // Clear last_Java_sp again
3033 __ get_thread(java_thread);
3034 __ reset_last_Java_frame(java_thread, false);
3035
3036 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3037 __ jcc(Assembler::equal, noException);
3038
3039 // Exception pending
3040 RegisterSaver::restore_live_registers(masm, save_vectors);
3041
3042 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3043
3044 __ bind(noException);
3045
3046 // Normal exit, register restoring and exit
3047 RegisterSaver::restore_live_registers(masm, save_vectors);
3048
3049 __ ret(0);
3050
3051 // make sure all code is generated
3052 masm->flush();
3053
3054 // Fill-out other meta info
3055 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
3056 }
3057
3058 //
3059 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
3060 //
3061 // Generate a stub that calls into vm to find out the proper destination
3062 // of a java call. All the argument registers are live at this point
3063 // but since this is generic code we don't know what they are and the caller
3064 // must do any gc of the args.
3065 //
3066 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
3067 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3068
3069 // allocate space for the code
3070 ResourceMark rm;
3071
3072 CodeBuffer buffer(name, 1000, 512);
3073 MacroAssembler* masm = new MacroAssembler(&buffer);
3074
3075 int frame_size_words;
3076 enum frame_layout {
3077 thread_off,
3078 extra_words };
3079
3080 OopMapSet *oop_maps = new OopMapSet();
3081 OopMap* map = NULL;
3082
3083 int start = __ offset();
3084
3085 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words);
3086
3087 int frame_complete = __ offset();
3088
3089 const Register thread = rdi;
3090 __ get_thread(rdi);
3091
3092 __ push(thread);
3093 __ set_last_Java_frame(thread, noreg, rbp, NULL);
3094
3095 __ call(RuntimeAddress(destination));
3096
3097
3098 // Set an oopmap for the call site.
3099 // We need this not only for callee-saved registers, but also for volatile
3100 // registers that the compiler might be keeping live across a safepoint.
3101
3102 oop_maps->add_gc_map( __ offset() - start, map);
3103
3104 // rax, contains the address we are going to jump to assuming no exception got installed
3105
3106 __ addptr(rsp, wordSize);
3107
3108 // clear last_Java_sp
3109 __ reset_last_Java_frame(thread, true);
3110 // check for pending exceptions
3111 Label pending;
3112 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3113 __ jcc(Assembler::notEqual, pending);
3114
3115 // get the returned Method*
3116 __ get_vm_result_2(rbx, thread);
3117 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx);
3118
3119 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax);
3120
3121 RegisterSaver::restore_live_registers(masm);
3122
3123 // We are back the the original state on entry and ready to go.
3124
3125 __ jmp(rax);
3126
3127 // Pending exception after the safepoint
3128
3129 __ bind(pending);
3130
3131 RegisterSaver::restore_live_registers(masm);
3132
3133 // exception pending => remove activation and forward to exception handler
3134
3135 __ get_thread(thread);
3136 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
3137 __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
3138 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3139
3140 // -------------
3141 // make sure all code is generated
3142 masm->flush();
3143
3144 // return the blob
3145 // frame_size_words or bytes??
3146 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true);
3147 }