src/hotspot/cpu/x86/x86_64.ad

*** 528,543 ****
--- 528,550 ----
  
  source_hpp %{
  #if INCLUDE_ZGC
  #include "gc/z/zBarrierSetAssembler.hpp"
  #endif
+ 
+ extern unsigned long followed_by_equals;
+ extern unsigned long not_followed_by_equals;
+ 
  %}
  
  //----------SOURCE BLOCK-------------------------------------------------------
  // This is a block of C++ code which provides values, functions, and
  // definitions necessary in the rest of the architecture description
  source %{
+   unsigned long followed_by_equals = 0;
+   unsigned long not_followed_by_equals = 0;
+ 
  #define   RELOC_IMM64    Assembler::imm_operand
  #define   RELOC_DISP32   Assembler::disp32_operand
  
  #define __ _masm.
  
*** 11586,11613 ****
  %}
  
  instruct compP_rReg(rFlagsRegU cr, rRegP op1, rRegP op2)
  %{
    match(Set cr (CmpP op1 op2));
  
    format %{ "cmpq    $op1, $op2\t# ptr" %}
!   opcode(0x3B); /* Opcode 3B /r */
!   ins_encode(REX_reg_reg_wide(op1, op2), OpcP, reg_reg(op1, op2));
    ins_pipe(ialu_cr_reg_reg);
  %}
  
  instruct compP_rReg_mem(rFlagsRegU cr, rRegP op1, memory op2)
  %{
    match(Set cr (CmpP op1 (LoadP op2)));
  
    ins_cost(500); // XXX
    format %{ "cmpq    $op1, $op2\t# ptr" %}
!   opcode(0x3B); /* Opcode 3B /r */
!   ins_encode(REX_reg_mem_wide(op1, op2), OpcP, reg_mem(op1, op2));
    ins_pipe(ialu_cr_reg_mem);
  %}
  
  // // // Cisc-spilled version of cmpP_rReg
  // //instruct compP_mem_rReg(rFlagsRegU cr, memory op1, rRegP op2)
  // //%{
  // //  match(Set cr (CmpP (LoadP op1) op2));
  // //
--- 11593,11687 ----
  %}
  
  instruct compP_rReg(rFlagsRegU cr, rRegP op1, rRegP op2)
  %{
    match(Set cr (CmpP op1 op2));
+   predicate(!((CmpPNode*)n)->followed_by_equals() && !((CmpPNode*)n)->not_followed_by_equals());
  
    format %{ "cmpq    $op1, $op2\t# ptr" %}
!   ins_encode %{
!     __ cmpq($op1$$Register, $op2$$Register);
!   %}
    ins_pipe(ialu_cr_reg_reg);
  %}
  
  instruct compP_rReg_mem(rFlagsRegU cr, rRegP op1, memory op2)
  %{
    match(Set cr (CmpP op1 (LoadP op2)));
+   predicate(!((CmpPNode*)n)->followed_by_equals() && !((CmpPNode*)n)->not_followed_by_equals());
  
    ins_cost(500); // XXX
    format %{ "cmpq    $op1, $op2\t# ptr" %}
!   ins_encode %{
!     __ cmpq($op1$$Register, $op2$$Address);
!   %}
    ins_pipe(ialu_cr_reg_mem);
  %}
  
+ instruct compP_rReg_followed_by_equals(rFlagsRegU cr, rRegP op1, rRegP op2, rRegP tmp)
+ %{
+   match(Set cr (CmpP op1 op2));
+   predicate(((CmpPNode*)n)->followed_by_equals());
+   effect(TEMP tmp);
+ 
+   format %{ "cmpq    $op1, $op2\t# ptr" %}
+   ins_encode %{
+     __ lea($tmp$$Register, ExternalAddress((address)&followed_by_equals));
+     __ lock(); __ addq(Address($tmp$$Register, 0), 1);
+     __ cmpq($op1$$Register, $op2$$Register);
+   %}
+   ins_pipe(ialu_cr_reg_reg);
+ %}
+ 
+ instruct compP_rReg_mem_followed_by_equals(rFlagsRegU cr, rRegP op1, memory op2, rRegP tmp)
+ %{
+   match(Set cr (CmpP op1 (LoadP op2)));
+   predicate(((CmpPNode*)n)->followed_by_equals());
+   effect(TEMP tmp);
+ 
+   ins_cost(500); // XXX
+   format %{ "cmpq    $op1, $op2\t# ptr" %}
+   ins_encode %{
+     __ lea($tmp$$Register, ExternalAddress((address)&followed_by_equals));
+     __ lock(); __ addq(Address($tmp$$Register, 0), 1);
+     __ cmpq($op1$$Register, $op2$$Address);
+   %}
+   ins_pipe(ialu_cr_reg_mem);
+ %}
+ 
+ instruct compP_rReg_not_followed_by_equals(rFlagsRegU cr, rRegP op1, rRegP op2, rRegP tmp)
+ %{
+   match(Set cr (CmpP op1 op2));
+   predicate(((CmpPNode*)n)->not_followed_by_equals());
+   effect(TEMP tmp);
+ 
+   format %{ "cmpq    $op1, $op2\t# ptr" %}
+   ins_encode %{
+     __ lea($tmp$$Register, ExternalAddress((address)&not_followed_by_equals));
+     __ lock(); __ addq(Address($tmp$$Register, 0), 1);
+     __ cmpq($op1$$Register, $op2$$Register);
+   %}
+   ins_pipe(ialu_cr_reg_reg);
+ %}
+ 
+ instruct compP_rReg_mem_not_followed_by_equals(rFlagsRegU cr, rRegP op1, memory op2, rRegP tmp)
+ %{
+   match(Set cr (CmpP op1 (LoadP op2)));
+   predicate(((CmpPNode*)n)->not_followed_by_equals());
+   effect(TEMP tmp);
+ 
+   ins_cost(500); // XXX
+   format %{ "cmpq    $op1, $op2\t# ptr" %}
+   ins_encode %{
+     __ lea($tmp$$Register, ExternalAddress((address)&not_followed_by_equals));
+     __ lock(); __ addq(Address($tmp$$Register, 0), 1);
+     __ cmpq($op1$$Register, $op2$$Address);
+   %}
+   ins_pipe(ialu_cr_reg_mem);
+ %}
+ 
+ 
  // // // Cisc-spilled version of cmpP_rReg
  // //instruct compP_mem_rReg(rFlagsRegU cr, memory op1, rRegP op2)
  // //%{
  // //  match(Set cr (CmpP (LoadP op1) op2));
  // //