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src/cpu/x86/vm/templateTable_x86.cpp

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2609     assert(state == vtos, "only valid state");
2610     Register robj = LP64_ONLY(c_rarg1) NOT_LP64(rax);
2611     __ movptr(robj, aaddress(0));
2612     __ load_klass(rdi, robj);
2613     __ movl(rdi, Address(rdi, Klass::access_flags_offset()));
2614     __ testl(rdi, JVM_ACC_HAS_FINALIZER);
2615     Label skip_register_finalizer;
2616     __ jcc(Assembler::zero, skip_register_finalizer);
2617 
2618     __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::register_finalizer), robj);
2619 
2620     __ bind(skip_register_finalizer);
2621   }
2622 
2623   // Narrow result if state is itos but result type is smaller.
2624   // Need to narrow in the return bytecode rather than in generate_return_entry
2625   // since compiled code callers expect the result to already be narrowed.
2626   if (state == itos) {
2627     __ narrow(rax);
2628   }
2629   __ remove_activation(state, rbcp);
2630 
2631   __ jmp(rbcp);
2632 }
2633 
2634 // ----------------------------------------------------------------------------
2635 // Volatile variables demand their effects be made known to all CPU's
2636 // in order.  Store buffers on most chips allow reads & writes to
2637 // reorder; the JMM's ReadAfterWrite.java test fails in -Xint mode
2638 // without some kind of memory barrier (i.e., it's not sufficient that
2639 // the interpreter does not reorder volatile references, the hardware
2640 // also must not reorder them).
2641 //
2642 // According to the new Java Memory Model (JMM):
2643 // (1) All volatiles are serialized wrt to each other.  ALSO reads &
2644 //     writes act as aquire & release, so:
2645 // (2) A read cannot let unrelated NON-volatile memory refs that
2646 //     happen after the read float up to before the read.  It's OK for
2647 //     non-volatile memory refs that happen before the volatile read to
2648 //     float down below it.
2649 // (3) Similar a volatile write cannot let unrelated NON-volatile




2609     assert(state == vtos, "only valid state");
2610     Register robj = LP64_ONLY(c_rarg1) NOT_LP64(rax);
2611     __ movptr(robj, aaddress(0));
2612     __ load_klass(rdi, robj);
2613     __ movl(rdi, Address(rdi, Klass::access_flags_offset()));
2614     __ testl(rdi, JVM_ACC_HAS_FINALIZER);
2615     Label skip_register_finalizer;
2616     __ jcc(Assembler::zero, skip_register_finalizer);
2617 
2618     __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::register_finalizer), robj);
2619 
2620     __ bind(skip_register_finalizer);
2621   }
2622 
2623   // Narrow result if state is itos but result type is smaller.
2624   // Need to narrow in the return bytecode rather than in generate_return_entry
2625   // since compiled code callers expect the result to already be narrowed.
2626   if (state == itos) {
2627     __ narrow(rax);
2628   }
2629   __ remove_activation(state, rbcp, true, true, true, state == qtos && ValueTypeReturnedAsFields);
2630 
2631   __ jmp(rbcp);
2632 }
2633 
2634 // ----------------------------------------------------------------------------
2635 // Volatile variables demand their effects be made known to all CPU's
2636 // in order.  Store buffers on most chips allow reads & writes to
2637 // reorder; the JMM's ReadAfterWrite.java test fails in -Xint mode
2638 // without some kind of memory barrier (i.e., it's not sufficient that
2639 // the interpreter does not reorder volatile references, the hardware
2640 // also must not reorder them).
2641 //
2642 // According to the new Java Memory Model (JMM):
2643 // (1) All volatiles are serialized wrt to each other.  ALSO reads &
2644 //     writes act as aquire & release, so:
2645 // (2) A read cannot let unrelated NON-volatile memory refs that
2646 //     happen after the read float up to before the read.  It's OK for
2647 //     non-volatile memory refs that happen before the volatile read to
2648 //     float down below it.
2649 // (3) Similar a volatile write cannot let unrelated NON-volatile


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