1 /*
2 * Copyright (c) 2003, 2017, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/macroAssembler.hpp"
27 #include "asm/macroAssembler.inline.hpp"
28 #include "code/debugInfoRec.hpp"
29 #include "code/icBuffer.hpp"
30 #include "code/vtableStubs.hpp"
31 #include "interpreter/interpreter.hpp"
32 #include "logging/log.hpp"
33 #include "memory/resourceArea.hpp"
34 #include "oops/compiledICHolder.hpp"
35 #include "runtime/sharedRuntime.hpp"
36 #include "runtime/vframeArray.hpp"
37 #include "vmreg_x86.inline.hpp"
38 #ifdef COMPILER1
39 #include "c1/c1_Runtime1.hpp"
40 #endif
41 #ifdef COMPILER2
42 #include "opto/runtime.hpp"
43 #endif
44 #include "vm_version_x86.hpp"
45
46 #define __ masm->
47
48 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
49
50 class RegisterSaver {
51 // Capture info about frame layout
52 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
53 enum layout {
54 fpu_state_off = 0,
55 fpu_state_end = fpu_state_off+FPUStateSizeInWords,
56 st0_off, st0H_off,
57 st1_off, st1H_off,
58 st2_off, st2H_off,
59 st3_off, st3H_off,
60 st4_off, st4H_off,
61 st5_off, st5H_off,
62 st6_off, st6H_off,
63 st7_off, st7H_off,
64 xmm_off,
65 DEF_XMM_OFFS(0),
66 DEF_XMM_OFFS(1),
67 DEF_XMM_OFFS(2),
68 DEF_XMM_OFFS(3),
69 DEF_XMM_OFFS(4),
70 DEF_XMM_OFFS(5),
71 DEF_XMM_OFFS(6),
72 DEF_XMM_OFFS(7),
73 flags_off = xmm7_off + 16/BytesPerInt + 1, // 16-byte stack alignment fill word
74 rdi_off,
75 rsi_off,
76 ignore_off, // extra copy of rbp,
77 rsp_off,
78 rbx_off,
79 rdx_off,
80 rcx_off,
81 rax_off,
82 // The frame sender code expects that rbp will be in the "natural" place and
83 // will override any oopMap setting for it. We must therefore force the layout
84 // so that it agrees with the frame sender code.
85 rbp_off,
86 return_off, // slot for return address
87 reg_save_size };
88 enum { FPU_regs_live = flags_off - fpu_state_end };
89
90 public:
91
92 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words,
93 int* total_frame_words, bool verify_fpu = true, bool save_vectors = false);
94 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false);
95
96 static int rax_offset() { return rax_off; }
97 static int rbx_offset() { return rbx_off; }
98
99 // Offsets into the register save area
100 // Used by deoptimization when it is managing result register
101 // values on its own
102
103 static int raxOffset(void) { return rax_off; }
104 static int rdxOffset(void) { return rdx_off; }
105 static int rbxOffset(void) { return rbx_off; }
106 static int xmm0Offset(void) { return xmm0_off; }
107 // This really returns a slot in the fp save area, which one is not important
108 static int fpResultOffset(void) { return st0_off; }
109
110 // During deoptimization only the result register need to be restored
111 // all the other values have already been extracted.
112
113 static void restore_result_registers(MacroAssembler* masm);
114
115 };
116
117 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words,
118 int* total_frame_words, bool verify_fpu, bool save_vectors) {
119 int num_xmm_regs = XMMRegisterImpl::number_of_registers;
120 int ymm_bytes = num_xmm_regs * 16;
121 int zmm_bytes = num_xmm_regs * 32;
122 #ifdef COMPILER2
123 if (save_vectors) {
124 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
125 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
126 // Save upper half of YMM registers
127 int vect_bytes = ymm_bytes;
128 if (UseAVX > 2) {
129 // Save upper half of ZMM registers as well
130 vect_bytes += zmm_bytes;
131 }
132 additional_frame_words += vect_bytes / wordSize;
133 }
134 #else
135 assert(!save_vectors, "vectors are generated only by C2");
136 #endif
137 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize;
138 int frame_words = frame_size_in_bytes / wordSize;
139 *total_frame_words = frame_words;
140
141 assert(FPUStateSizeInWords == 27, "update stack layout");
142
143 // save registers, fpu state, and flags
144 // We assume caller has already has return address slot on the stack
145 // We push epb twice in this sequence because we want the real rbp,
146 // to be under the return like a normal enter and we want to use pusha
147 // We push by hand instead of pusing push
148 __ enter();
149 __ pusha();
150 __ pushf();
151 __ subptr(rsp,FPU_regs_live*wordSize); // Push FPU registers space
152 __ push_FPU_state(); // Save FPU state & init
153
154 if (verify_fpu) {
155 // Some stubs may have non standard FPU control word settings so
156 // only check and reset the value when it required to be the
157 // standard value. The safepoint blob in particular can be used
158 // in methods which are using the 24 bit control word for
159 // optimized float math.
160
161 #ifdef ASSERT
162 // Make sure the control word has the expected value
163 Label ok;
164 __ cmpw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
165 __ jccb(Assembler::equal, ok);
166 __ stop("corrupted control word detected");
167 __ bind(ok);
168 #endif
169
170 // Reset the control word to guard against exceptions being unmasked
171 // since fstp_d can cause FPU stack underflow exceptions. Write it
172 // into the on stack copy and then reload that to make sure that the
173 // current and future values are correct.
174 __ movw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
175 }
176
177 __ frstor(Address(rsp, 0));
178 if (!verify_fpu) {
179 // Set the control word so that exceptions are masked for the
180 // following code.
181 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
182 }
183
184 int off = st0_off;
185 int delta = st1_off - off;
186
187 // Save the FPU registers in de-opt-able form
188 for (int n = 0; n < FloatRegisterImpl::number_of_registers; n++) {
189 __ fstp_d(Address(rsp, off*wordSize));
190 off += delta;
191 }
192
193 off = xmm0_off;
194 delta = xmm1_off - off;
195 if(UseSSE == 1) {
196 // Save the XMM state
197 for (int n = 0; n < num_xmm_regs; n++) {
198 __ movflt(Address(rsp, off*wordSize), as_XMMRegister(n));
199 off += delta;
200 }
201 } else if(UseSSE >= 2) {
202 // Save whole 128bit (16 bytes) XMM registers
203 for (int n = 0; n < num_xmm_regs; n++) {
204 __ movdqu(Address(rsp, off*wordSize), as_XMMRegister(n));
205 off += delta;
206 }
207 }
208
209 if (save_vectors) {
210 __ subptr(rsp, ymm_bytes);
211 // Save upper half of YMM registers
212 for (int n = 0; n < num_xmm_regs; n++) {
213 __ vextractf128_high(Address(rsp, n*16), as_XMMRegister(n));
214 }
215 if (UseAVX > 2) {
216 __ subptr(rsp, zmm_bytes);
217 // Save upper half of ZMM registers
218 for (int n = 0; n < num_xmm_regs; n++) {
219 __ vextractf64x4_high(Address(rsp, n*32), as_XMMRegister(n));
220 }
221 }
222 }
223 __ vzeroupper();
224
225 // Set an oopmap for the call site. This oopmap will map all
226 // oop-registers and debug-info registers as callee-saved. This
227 // will allow deoptimization at this safepoint to find all possible
228 // debug-info recordings, as well as let GC find all oops.
229
230 OopMapSet *oop_maps = new OopMapSet();
231 OopMap* map = new OopMap( frame_words, 0 );
232
233 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words)
234 #define NEXTREG(x) (x)->as_VMReg()->next()
235
236 map->set_callee_saved(STACK_OFFSET(rax_off), rax->as_VMReg());
237 map->set_callee_saved(STACK_OFFSET(rcx_off), rcx->as_VMReg());
238 map->set_callee_saved(STACK_OFFSET(rdx_off), rdx->as_VMReg());
239 map->set_callee_saved(STACK_OFFSET(rbx_off), rbx->as_VMReg());
240 // rbp, location is known implicitly, no oopMap
241 map->set_callee_saved(STACK_OFFSET(rsi_off), rsi->as_VMReg());
242 map->set_callee_saved(STACK_OFFSET(rdi_off), rdi->as_VMReg());
243 // %%% This is really a waste but we'll keep things as they were for now for the upper component
244 off = st0_off;
245 delta = st1_off - off;
246 for (int n = 0; n < FloatRegisterImpl::number_of_registers; n++) {
247 FloatRegister freg_name = as_FloatRegister(n);
248 map->set_callee_saved(STACK_OFFSET(off), freg_name->as_VMReg());
249 map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(freg_name));
250 off += delta;
251 }
252 off = xmm0_off;
253 delta = xmm1_off - off;
254 for (int n = 0; n < num_xmm_regs; n++) {
255 XMMRegister xmm_name = as_XMMRegister(n);
256 map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg());
257 map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(xmm_name));
258 off += delta;
259 }
260 #undef NEXTREG
261 #undef STACK_OFFSET
262
263 return map;
264 }
265
266 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) {
267 int num_xmm_regs = XMMRegisterImpl::number_of_registers;
268 int ymm_bytes = num_xmm_regs * 16;
269 int zmm_bytes = num_xmm_regs * 32;
270 // Recover XMM & FPU state
271 int additional_frame_bytes = 0;
272 #ifdef COMPILER2
273 if (restore_vectors) {
274 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
275 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
276 // Save upper half of YMM registers
277 additional_frame_bytes = ymm_bytes;
278 if (UseAVX > 2) {
279 // Save upper half of ZMM registers as well
280 additional_frame_bytes += zmm_bytes;
281 }
282 }
283 #else
284 assert(!restore_vectors, "vectors are generated only by C2");
285 #endif
286
287 int off = xmm0_off;
288 int delta = xmm1_off - off;
289
290 __ vzeroupper();
291
292 if (UseSSE == 1) {
293 // Restore XMM registers
294 assert(additional_frame_bytes == 0, "");
295 for (int n = 0; n < num_xmm_regs; n++) {
296 __ movflt(as_XMMRegister(n), Address(rsp, off*wordSize));
297 off += delta;
298 }
299 } else if (UseSSE >= 2) {
300 // Restore whole 128bit (16 bytes) XMM registers. Do this before restoring YMM and
301 // ZMM because the movdqu instruction zeros the upper part of the XMM register.
302 for (int n = 0; n < num_xmm_regs; n++) {
303 __ movdqu(as_XMMRegister(n), Address(rsp, off*wordSize+additional_frame_bytes));
304 off += delta;
305 }
306 }
307
308 if (restore_vectors) {
309 if (UseAVX > 2) {
310 // Restore upper half of ZMM registers.
311 for (int n = 0; n < num_xmm_regs; n++) {
312 __ vinsertf64x4_high(as_XMMRegister(n), Address(rsp, n*32));
313 }
314 __ addptr(rsp, zmm_bytes);
315 }
316 // Restore upper half of YMM registers.
317 for (int n = 0; n < num_xmm_regs; n++) {
318 __ vinsertf128_high(as_XMMRegister(n), Address(rsp, n*16));
319 }
320 __ addptr(rsp, ymm_bytes);
321 }
322
323 __ pop_FPU_state();
324 __ addptr(rsp, FPU_regs_live*wordSize); // Pop FPU registers
325
326 __ popf();
327 __ popa();
328 // Get the rbp, described implicitly by the frame sender code (no oopMap)
329 __ pop(rbp);
330 }
331
332 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
333
334 // Just restore result register. Only used by deoptimization. By
335 // now any callee save register that needs to be restore to a c2
336 // caller of the deoptee has been extracted into the vframeArray
337 // and will be stuffed into the c2i adapter we create for later
338 // restoration so only result registers need to be restored here.
339 //
340
341 __ frstor(Address(rsp, 0)); // Restore fpu state
342
343 // Recover XMM & FPU state
344 if( UseSSE == 1 ) {
345 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize));
346 } else if( UseSSE >= 2 ) {
347 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize));
348 }
349 __ movptr(rax, Address(rsp, rax_off*wordSize));
350 __ movptr(rdx, Address(rsp, rdx_off*wordSize));
351 // Pop all of the register save are off the stack except the return address
352 __ addptr(rsp, return_off * wordSize);
353 }
354
355 // Is vector's size (in bytes) bigger than a size saved by default?
356 // 16 bytes XMM registers are saved by default using SSE2 movdqu instructions.
357 // Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated.
358 bool SharedRuntime::is_wide_vector(int size) {
359 return size > 16;
360 }
361
362 size_t SharedRuntime::trampoline_size() {
363 return 16;
364 }
365
366 void SharedRuntime::generate_trampoline(MacroAssembler *masm, address destination) {
367 __ jump(RuntimeAddress(destination));
368 }
369
370 // The java_calling_convention describes stack locations as ideal slots on
371 // a frame with no abi restrictions. Since we must observe abi restrictions
372 // (like the placement of the register window) the slots must be biased by
373 // the following value.
374 static int reg2offset_in(VMReg r) {
375 // Account for saved rbp, and return address
376 // This should really be in_preserve_stack_slots
377 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size;
378 }
379
380 static int reg2offset_out(VMReg r) {
381 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
382 }
383
384 // ---------------------------------------------------------------------------
385 // Read the array of BasicTypes from a signature, and compute where the
386 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
387 // quantities. Values less than SharedInfo::stack0 are registers, those above
388 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
389 // as framesizes are fixed.
390 // VMRegImpl::stack0 refers to the first slot 0(sp).
391 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register
392 // up to RegisterImpl::number_of_registers) are the 32-bit
393 // integer registers.
394
395 // Pass first two oop/int args in registers ECX and EDX.
396 // Pass first two float/double args in registers XMM0 and XMM1.
397 // Doubles have precedence, so if you pass a mix of floats and doubles
398 // the doubles will grab the registers before the floats will.
399
400 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
401 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
402 // units regardless of build. Of course for i486 there is no 64 bit build
403
404
405 // ---------------------------------------------------------------------------
406 // The compiled Java calling convention.
407 // Pass first two oop/int args in registers ECX and EDX.
408 // Pass first two float/double args in registers XMM0 and XMM1.
409 // Doubles have precedence, so if you pass a mix of floats and doubles
410 // the doubles will grab the registers before the floats will.
411 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
412 VMRegPair *regs,
413 int total_args_passed,
414 int is_outgoing) {
415 uint stack = 0; // Starting stack position for args on stack
416
417
418 // Pass first two oop/int args in registers ECX and EDX.
419 uint reg_arg0 = 9999;
420 uint reg_arg1 = 9999;
421
422 // Pass first two float/double args in registers XMM0 and XMM1.
423 // Doubles have precedence, so if you pass a mix of floats and doubles
424 // the doubles will grab the registers before the floats will.
425 // CNC - TURNED OFF FOR non-SSE.
426 // On Intel we have to round all doubles (and most floats) at
427 // call sites by storing to the stack in any case.
428 // UseSSE=0 ==> Don't Use ==> 9999+0
429 // UseSSE=1 ==> Floats only ==> 9999+1
430 // UseSSE>=2 ==> Floats or doubles ==> 9999+2
431 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 };
432 uint fargs = (UseSSE>=2) ? 2 : UseSSE;
433 uint freg_arg0 = 9999+fargs;
434 uint freg_arg1 = 9999+fargs;
435
436 // Pass doubles & longs aligned on the stack. First count stack slots for doubles
437 int i;
438 for( i = 0; i < total_args_passed; i++) {
439 if( sig_bt[i] == T_DOUBLE ) {
440 // first 2 doubles go in registers
441 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i;
442 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i;
443 else // Else double is passed low on the stack to be aligned.
444 stack += 2;
445 } else if( sig_bt[i] == T_LONG ) {
446 stack += 2;
447 }
448 }
449 int dstack = 0; // Separate counter for placing doubles
450
451 // Now pick where all else goes.
452 for( i = 0; i < total_args_passed; i++) {
453 // From the type and the argument number (count) compute the location
454 switch( sig_bt[i] ) {
455 case T_SHORT:
456 case T_CHAR:
457 case T_BYTE:
458 case T_BOOLEAN:
459 case T_INT:
460 case T_ARRAY:
461 case T_OBJECT:
462 case T_ADDRESS:
463 if( reg_arg0 == 9999 ) {
464 reg_arg0 = i;
465 regs[i].set1(rcx->as_VMReg());
466 } else if( reg_arg1 == 9999 ) {
467 reg_arg1 = i;
468 regs[i].set1(rdx->as_VMReg());
469 } else {
470 regs[i].set1(VMRegImpl::stack2reg(stack++));
471 }
472 break;
473 case T_FLOAT:
474 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) {
475 freg_arg0 = i;
476 regs[i].set1(xmm0->as_VMReg());
477 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) {
478 freg_arg1 = i;
479 regs[i].set1(xmm1->as_VMReg());
480 } else {
481 regs[i].set1(VMRegImpl::stack2reg(stack++));
482 }
483 break;
484 case T_LONG:
485 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
486 regs[i].set2(VMRegImpl::stack2reg(dstack));
487 dstack += 2;
488 break;
489 case T_DOUBLE:
490 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
491 if( freg_arg0 == (uint)i ) {
492 regs[i].set2(xmm0->as_VMReg());
493 } else if( freg_arg1 == (uint)i ) {
494 regs[i].set2(xmm1->as_VMReg());
495 } else {
496 regs[i].set2(VMRegImpl::stack2reg(dstack));
497 dstack += 2;
498 }
499 break;
500 case T_VOID: regs[i].set_bad(); break;
501 break;
502 default:
503 ShouldNotReachHere();
504 break;
505 }
506 }
507
508 // return value can be odd number of VMRegImpl stack slots make multiple of 2
509 return round_to(stack, 2);
510 }
511
512 // Patch the callers callsite with entry to compiled code if it exists.
513 static void patch_callers_callsite(MacroAssembler *masm) {
514 Label L;
515 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
516 __ jcc(Assembler::equal, L);
517 // Schedule the branch target address early.
518 // Call into the VM to patch the caller, then jump to compiled callee
519 // rax, isn't live so capture return address while we easily can
520 __ movptr(rax, Address(rsp, 0));
521 __ pusha();
522 __ pushf();
523
524 if (UseSSE == 1) {
525 __ subptr(rsp, 2*wordSize);
526 __ movflt(Address(rsp, 0), xmm0);
527 __ movflt(Address(rsp, wordSize), xmm1);
528 }
529 if (UseSSE >= 2) {
530 __ subptr(rsp, 4*wordSize);
531 __ movdbl(Address(rsp, 0), xmm0);
532 __ movdbl(Address(rsp, 2*wordSize), xmm1);
533 }
534 #ifdef COMPILER2
535 // C2 may leave the stack dirty if not in SSE2+ mode
536 if (UseSSE >= 2) {
537 __ verify_FPU(0, "c2i transition should have clean FPU stack");
538 } else {
539 __ empty_FPU_stack();
540 }
541 #endif /* COMPILER2 */
542
543 // VM needs caller's callsite
544 __ push(rax);
545 // VM needs target method
546 __ push(rbx);
547 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
548 __ addptr(rsp, 2*wordSize);
549
550 if (UseSSE == 1) {
551 __ movflt(xmm0, Address(rsp, 0));
552 __ movflt(xmm1, Address(rsp, wordSize));
553 __ addptr(rsp, 2*wordSize);
554 }
555 if (UseSSE >= 2) {
556 __ movdbl(xmm0, Address(rsp, 0));
557 __ movdbl(xmm1, Address(rsp, 2*wordSize));
558 __ addptr(rsp, 4*wordSize);
559 }
560
561 __ popf();
562 __ popa();
563 __ bind(L);
564 }
565
566
567 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) {
568 int next_off = st_off - Interpreter::stackElementSize;
569 __ movdbl(Address(rsp, next_off), r);
570 }
571
572 static void gen_c2i_adapter(MacroAssembler *masm,
573 const GrowableArray<SigEntry>& sig_extended,
574 const VMRegPair *regs,
575 Label& skip_fixup,
576 address start,
577 OopMapSet*& oop_maps,
578 int& frame_complete,
579 int& frame_size_in_words) {
580 // Before we get into the guts of the C2I adapter, see if we should be here
581 // at all. We've come from compiled code and are attempting to jump to the
582 // interpreter, which means the caller made a static call to get here
583 // (vcalls always get a compiled target if there is one). Check for a
584 // compiled target. If there is one, we need to patch the caller's call.
585 patch_callers_callsite(masm);
586
587 __ bind(skip_fixup);
588
589 #ifdef COMPILER2
590 // C2 may leave the stack dirty if not in SSE2+ mode
591 if (UseSSE >= 2) {
592 __ verify_FPU(0, "c2i transition should have clean FPU stack");
593 } else {
594 __ empty_FPU_stack();
595 }
596 #endif /* COMPILER2 */
597
598 // Since all args are passed on the stack, total_args_passed * interpreter_
599 // stack_element_size is the
600 // space we need.
601 int extraspace = sig_extended.length() * Interpreter::stackElementSize;
602
603 // Get return address
604 __ pop(rax);
605
606 // set senderSP value
607 __ movptr(rsi, rsp);
608
609 __ subptr(rsp, extraspace);
610
611 // Now write the args into the outgoing interpreter space
612 for (int i = 0; i < sig_extended.length(); i++) {
613 if (sig_extended.at(i)._bt == T_VOID) {
614 assert(i > 0 && (sig_extended.at(i-1)._bt == T_LONG || sig_extended.at(i-1)._bt == T_DOUBLE), "missing half");
615 continue;
616 }
617
618 // st_off points to lowest address on stack.
619 int st_off = ((sig_extended.length() - 1) - i) * Interpreter::stackElementSize;
620 int next_off = st_off - Interpreter::stackElementSize;
621
622 // Say 4 args:
623 // i st_off
624 // 0 12 T_LONG
625 // 1 8 T_VOID
626 // 2 4 T_OBJECT
627 // 3 0 T_BOOL
628 VMReg r_1 = regs[i].first();
629 VMReg r_2 = regs[i].second();
630 if (!r_1->is_valid()) {
631 assert(!r_2->is_valid(), "");
632 continue;
633 }
634
635 if (r_1->is_stack()) {
636 // memory to memory use fpu stack top
637 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
638
639 if (!r_2->is_valid()) {
640 __ movl(rdi, Address(rsp, ld_off));
641 __ movptr(Address(rsp, st_off), rdi);
642 } else {
643
644 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW
645 // st_off == MSW, st_off-wordSize == LSW
646
647 __ movptr(rdi, Address(rsp, ld_off));
648 __ movptr(Address(rsp, next_off), rdi);
649 #ifndef _LP64
650 __ movptr(rdi, Address(rsp, ld_off + wordSize));
651 __ movptr(Address(rsp, st_off), rdi);
652 #else
653 #ifdef ASSERT
654 // Overwrite the unused slot with known junk
655 __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
656 __ movptr(Address(rsp, st_off), rax);
657 #endif /* ASSERT */
658 #endif // _LP64
659 }
660 } else if (r_1->is_Register()) {
661 Register r = r_1->as_Register();
662 if (!r_2->is_valid()) {
663 __ movl(Address(rsp, st_off), r);
664 } else {
665 // long/double in gpr
666 NOT_LP64(ShouldNotReachHere());
667 // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
668 // T_DOUBLE and T_LONG use two slots in the interpreter
669 if (sig_extended.at(i)._bt == T_LONG || sig_extended.at(i)._bt == T_DOUBLE) {
670 // long/double in gpr
671 #ifdef ASSERT
672 // Overwrite the unused slot with known junk
673 LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab)));
674 __ movptr(Address(rsp, st_off), rax);
675 #endif /* ASSERT */
676 __ movptr(Address(rsp, next_off), r);
677 } else {
678 __ movptr(Address(rsp, st_off), r);
679 }
680 }
681 } else {
682 assert(r_1->is_XMMRegister(), "");
683 if (!r_2->is_valid()) {
684 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
685 } else {
686 assert(sig_extended.at(i)._bt == T_DOUBLE || sig_extended.at(i)._bt == T_LONG, "wrong type");
687 move_c2i_double(masm, r_1->as_XMMRegister(), st_off);
688 }
689 }
690 }
691
692 // Schedule the branch target address early.
693 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset())));
694 // And repush original return address
695 __ push(rax);
696 __ jmp(rcx);
697 }
698
699
700 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) {
701 int next_val_off = ld_off - Interpreter::stackElementSize;
702 __ movdbl(r, Address(saved_sp, next_val_off));
703 }
704
705 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg,
706 address code_start, address code_end,
707 Label& L_ok) {
708 Label L_fail;
709 __ lea(temp_reg, ExternalAddress(code_start));
710 __ cmpptr(pc_reg, temp_reg);
711 __ jcc(Assembler::belowEqual, L_fail);
712 __ lea(temp_reg, ExternalAddress(code_end));
713 __ cmpptr(pc_reg, temp_reg);
714 __ jcc(Assembler::below, L_ok);
715 __ bind(L_fail);
716 }
717
718 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
719 int comp_args_on_stack,
720 const GrowableArray<SigEntry>& sig_extended,
721 const VMRegPair *regs) {
722
723 // Note: rsi contains the senderSP on entry. We must preserve it since
724 // we may do a i2c -> c2i transition if we lose a race where compiled
725 // code goes non-entrant while we get args ready.
726
727 // Adapters can be frameless because they do not require the caller
728 // to perform additional cleanup work, such as correcting the stack pointer.
729 // An i2c adapter is frameless because the *caller* frame, which is interpreted,
730 // routinely repairs its own stack pointer (from interpreter_frame_last_sp),
731 // even if a callee has modified the stack pointer.
732 // A c2i adapter is frameless because the *callee* frame, which is interpreted,
733 // routinely repairs its caller's stack pointer (from sender_sp, which is set
734 // up via the senderSP register).
735 // In other words, if *either* the caller or callee is interpreted, we can
736 // get the stack pointer repaired after a call.
737 // This is why c2i and i2c adapters cannot be indefinitely composed.
738 // In particular, if a c2i adapter were to somehow call an i2c adapter,
739 // both caller and callee would be compiled methods, and neither would
740 // clean up the stack pointer changes performed by the two adapters.
741 // If this happens, control eventually transfers back to the compiled
742 // caller, but with an uncorrected stack, causing delayed havoc.
743
744 // Pick up the return address
745 __ movptr(rax, Address(rsp, 0));
746
747 if (VerifyAdapterCalls &&
748 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) {
749 // So, let's test for cascading c2i/i2c adapters right now.
750 // assert(Interpreter::contains($return_addr) ||
751 // StubRoutines::contains($return_addr),
752 // "i2c adapter must return to an interpreter frame");
753 __ block_comment("verify_i2c { ");
754 Label L_ok;
755 if (Interpreter::code() != NULL)
756 range_check(masm, rax, rdi,
757 Interpreter::code()->code_start(), Interpreter::code()->code_end(),
758 L_ok);
759 if (StubRoutines::code1() != NULL)
760 range_check(masm, rax, rdi,
761 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(),
762 L_ok);
763 if (StubRoutines::code2() != NULL)
764 range_check(masm, rax, rdi,
765 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(),
766 L_ok);
767 const char* msg = "i2c adapter must return to an interpreter frame";
768 __ block_comment(msg);
769 __ stop(msg);
770 __ bind(L_ok);
771 __ block_comment("} verify_i2ce ");
772 }
773
774 // Must preserve original SP for loading incoming arguments because
775 // we need to align the outgoing SP for compiled code.
776 __ movptr(rdi, rsp);
777
778 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
779 // in registers, we will occasionally have no stack args.
780 int comp_words_on_stack = 0;
781 if (comp_args_on_stack) {
782 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
783 // registers are below. By subtracting stack0, we either get a negative
784 // number (all values in registers) or the maximum stack slot accessed.
785 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg);
786 // Convert 4-byte stack slots to words.
787 comp_words_on_stack = round_to(comp_args_on_stack*4, wordSize)>>LogBytesPerWord;
788 // Round up to miminum stack alignment, in wordSize
789 comp_words_on_stack = round_to(comp_words_on_stack, 2);
790 __ subptr(rsp, comp_words_on_stack * wordSize);
791 }
792
793 // Align the outgoing SP
794 __ andptr(rsp, -(StackAlignmentInBytes));
795
796 // push the return address on the stack (note that pushing, rather
797 // than storing it, yields the correct frame alignment for the callee)
798 __ push(rax);
799
800 // Put saved SP in another register
801 const Register saved_sp = rax;
802 __ movptr(saved_sp, rdi);
803
804
805 // Will jump to the compiled code just as if compiled code was doing it.
806 // Pre-load the register-jump target early, to schedule it better.
807 __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset())));
808
809 // Now generate the shuffle code. Pick up all register args and move the
810 // rest through the floating point stack top.
811 for (int i = 0; i < sig_extended.length(); i++) {
812 if (sig_extended.at(i)._bt == T_VOID) {
813 // Longs and doubles are passed in native word order, but misaligned
814 // in the 32-bit build.
815 assert(i > 0 && (sig_extended.at(i-1)._bt == T_LONG || sig_extended.at(i-1)._bt == T_DOUBLE), "missing half");
816 continue;
817 }
818
819 // Pick up 0, 1 or 2 words from SP+offset.
820
821 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
822 "scrambled load targets?");
823 // Load in argument order going down.
824 int ld_off = (sig_extended.length() - i) * Interpreter::stackElementSize;
825 // Point to interpreter value (vs. tag)
826 int next_off = ld_off - Interpreter::stackElementSize;
827 //
828 //
829 //
830 VMReg r_1 = regs[i].first();
831 VMReg r_2 = regs[i].second();
832 if (!r_1->is_valid()) {
833 assert(!r_2->is_valid(), "");
834 continue;
835 }
836 if (r_1->is_stack()) {
837 // Convert stack slot to an SP offset (+ wordSize to account for return address )
838 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
839
840 // We can use rsi as a temp here because compiled code doesn't need rsi as an input
841 // and if we end up going thru a c2i because of a miss a reasonable value of rsi
842 // we be generated.
843 if (!r_2->is_valid()) {
844 // __ fld_s(Address(saved_sp, ld_off));
845 // __ fstp_s(Address(rsp, st_off));
846 __ movl(rsi, Address(saved_sp, ld_off));
847 __ movptr(Address(rsp, st_off), rsi);
848 } else {
849 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
850 // are accessed as negative so LSW is at LOW address
851
852 // ld_off is MSW so get LSW
853 // st_off is LSW (i.e. reg.first())
854 // __ fld_d(Address(saved_sp, next_off));
855 // __ fstp_d(Address(rsp, st_off));
856 //
857 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
858 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
859 // So we must adjust where to pick up the data to match the interpreter.
860 //
861 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
862 // are accessed as negative so LSW is at LOW address
863
864 // ld_off is MSW so get LSW
865 const int offset = (NOT_LP64(true ||) sig_extended.at(i)._bt==T_LONG||sig_extended.at(i)._bt==T_DOUBLE)?
866 next_off : ld_off;
867 __ movptr(rsi, Address(saved_sp, offset));
868 __ movptr(Address(rsp, st_off), rsi);
869 #ifndef _LP64
870 __ movptr(rsi, Address(saved_sp, ld_off));
871 __ movptr(Address(rsp, st_off + wordSize), rsi);
872 #endif // _LP64
873 }
874 } else if (r_1->is_Register()) { // Register argument
875 Register r = r_1->as_Register();
876 assert(r != rax, "must be different");
877 if (r_2->is_valid()) {
878 //
879 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
880 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
881 // So we must adjust where to pick up the data to match the interpreter.
882
883 const int offset = (NOT_LP64(true ||) sig_extended.at(i)._bt==T_LONG||sig_extended.at(i)._bt==T_DOUBLE)?
884 next_off : ld_off;
885
886 // this can be a misaligned move
887 __ movptr(r, Address(saved_sp, offset));
888 #ifndef _LP64
889 assert(r_2->as_Register() != rax, "need another temporary register");
890 // Remember r_1 is low address (and LSB on x86)
891 // So r_2 gets loaded from high address regardless of the platform
892 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off));
893 #endif // _LP64
894 } else {
895 __ movl(r, Address(saved_sp, ld_off));
896 }
897 } else {
898 assert(r_1->is_XMMRegister(), "");
899 if (!r_2->is_valid()) {
900 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
901 } else {
902 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off);
903 }
904 }
905 }
906
907 // 6243940 We might end up in handle_wrong_method if
908 // the callee is deoptimized as we race thru here. If that
909 // happens we don't want to take a safepoint because the
910 // caller frame will look interpreted and arguments are now
911 // "compiled" so it is much better to make this transition
912 // invisible to the stack walking code. Unfortunately if
913 // we try and find the callee by normal means a safepoint
914 // is possible. So we stash the desired callee in the thread
915 // and the vm will find there should this case occur.
916
917 __ get_thread(rax);
918 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx);
919
920 // move Method* to rax, in case we end up in an c2i adapter.
921 // the c2i adapters expect Method* in rax, (c2) because c2's
922 // resolve stubs return the result (the method) in rax,.
923 // I'd love to fix this.
924 __ mov(rax, rbx);
925
926 __ jmp(rdi);
927 }
928
929 // ---------------------------------------------------------------
930 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
931 int comp_args_on_stack,
932 const GrowableArray<SigEntry>& sig_extended,
933 const VMRegPair *regs,
934 AdapterFingerPrint* fingerprint,
935 AdapterBlob*& new_adapter) {
936 address i2c_entry = __ pc();
937
938 gen_i2c_adapter(masm, comp_args_on_stack, sig_extended, regs);
939
940 // -------------------------------------------------------------------------
941 // Generate a C2I adapter. On entry we know rbx, holds the Method* during calls
942 // to the interpreter. The args start out packed in the compiled layout. They
943 // need to be unpacked into the interpreter layout. This will almost always
944 // require some stack space. We grow the current (compiled) stack, then repack
945 // the args. We finally end in a jump to the generic interpreter entry point.
946 // On exit from the interpreter, the interpreter will restore our SP (lest the
947 // compiled code, which relys solely on SP and not EBP, get sick).
948
949 address c2i_unverified_entry = __ pc();
950 Label skip_fixup;
951
952 Register holder = rax;
953 Register receiver = rcx;
954 Register temp = rbx;
955
956 {
957
958 Label missed;
959 __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes()));
960 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset()));
961 __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset()));
962 __ jcc(Assembler::notEqual, missed);
963 // Method might have been compiled since the call site was patched to
964 // interpreted if that is the case treat it as a miss so we can get
965 // the call site corrected.
966 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
967 __ jcc(Assembler::equal, skip_fixup);
968
969 __ bind(missed);
970 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
971 }
972
973 address c2i_entry = __ pc();
974
975 OopMapSet* oop_maps = NULL;
976 int frame_complete = CodeOffsets::frame_never_safe;
977 int frame_size_in_words = 0;
978 gen_c2i_adapter(masm, sig_extended, regs, skip_fixup, i2c_entry, oop_maps, frame_complete, frame_size_in_words);
979
980 __ flush();
981 new_adapter = AdapterBlob::create(masm->code(), frame_complete, frame_size_in_words, oop_maps);
982 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
983 }
984
985 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
986 VMRegPair *regs,
987 VMRegPair *regs2,
988 int total_args_passed) {
989 assert(regs2 == NULL, "not needed on x86");
990 // We return the amount of VMRegImpl stack slots we need to reserve for all
991 // the arguments NOT counting out_preserve_stack_slots.
992
993 uint stack = 0; // All arguments on stack
994
995 for( int i = 0; i < total_args_passed; i++) {
996 // From the type and the argument number (count) compute the location
997 switch( sig_bt[i] ) {
998 case T_BOOLEAN:
999 case T_CHAR:
1000 case T_FLOAT:
1001 case T_BYTE:
1002 case T_SHORT:
1003 case T_INT:
1004 case T_OBJECT:
1005 case T_ARRAY:
1006 case T_ADDRESS:
1007 case T_METADATA:
1008 regs[i].set1(VMRegImpl::stack2reg(stack++));
1009 break;
1010 case T_LONG:
1011 case T_DOUBLE: // The stack numbering is reversed from Java
1012 // Since C arguments do not get reversed, the ordering for
1013 // doubles on the stack must be opposite the Java convention
1014 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
1015 regs[i].set2(VMRegImpl::stack2reg(stack));
1016 stack += 2;
1017 break;
1018 case T_VOID: regs[i].set_bad(); break;
1019 default:
1020 ShouldNotReachHere();
1021 break;
1022 }
1023 }
1024 return stack;
1025 }
1026
1027 // A simple move of integer like type
1028 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1029 if (src.first()->is_stack()) {
1030 if (dst.first()->is_stack()) {
1031 // stack to stack
1032 // __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5);
1033 // __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
1034 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first())));
1035 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1036 } else {
1037 // stack to reg
1038 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1039 }
1040 } else if (dst.first()->is_stack()) {
1041 // reg to stack
1042 // no need to sign extend on 64bit
1043 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1044 } else {
1045 if (dst.first() != src.first()) {
1046 __ mov(dst.first()->as_Register(), src.first()->as_Register());
1047 }
1048 }
1049 }
1050
1051 // An oop arg. Must pass a handle not the oop itself
1052 static void object_move(MacroAssembler* masm,
1053 OopMap* map,
1054 int oop_handle_offset,
1055 int framesize_in_slots,
1056 VMRegPair src,
1057 VMRegPair dst,
1058 bool is_receiver,
1059 int* receiver_offset) {
1060
1061 // Because of the calling conventions we know that src can be a
1062 // register or a stack location. dst can only be a stack location.
1063
1064 assert(dst.first()->is_stack(), "must be stack");
1065 // must pass a handle. First figure out the location we use as a handle
1066
1067 if (src.first()->is_stack()) {
1068 // Oop is already on the stack as an argument
1069 Register rHandle = rax;
1070 Label nil;
1071 __ xorptr(rHandle, rHandle);
1072 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
1073 __ jcc(Assembler::equal, nil);
1074 __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1075 __ bind(nil);
1076 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1077
1078 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1079 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
1080 if (is_receiver) {
1081 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
1082 }
1083 } else {
1084 // Oop is in an a register we must store it to the space we reserve
1085 // on the stack for oop_handles
1086 const Register rOop = src.first()->as_Register();
1087 const Register rHandle = rax;
1088 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset;
1089 int offset = oop_slot*VMRegImpl::stack_slot_size;
1090 Label skip;
1091 __ movptr(Address(rsp, offset), rOop);
1092 map->set_oop(VMRegImpl::stack2reg(oop_slot));
1093 __ xorptr(rHandle, rHandle);
1094 __ cmpptr(rOop, (int32_t)NULL_WORD);
1095 __ jcc(Assembler::equal, skip);
1096 __ lea(rHandle, Address(rsp, offset));
1097 __ bind(skip);
1098 // Store the handle parameter
1099 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1100 if (is_receiver) {
1101 *receiver_offset = offset;
1102 }
1103 }
1104 }
1105
1106 // A float arg may have to do float reg int reg conversion
1107 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1108 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1109
1110 // Because of the calling convention we know that src is either a stack location
1111 // or an xmm register. dst can only be a stack location.
1112
1113 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters");
1114
1115 if (src.first()->is_stack()) {
1116 __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1117 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1118 } else {
1119 // reg to stack
1120 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1121 }
1122 }
1123
1124 // A long move
1125 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1126
1127 // The only legal possibility for a long_move VMRegPair is:
1128 // 1: two stack slots (possibly unaligned)
1129 // as neither the java or C calling convention will use registers
1130 // for longs.
1131
1132 if (src.first()->is_stack() && dst.first()->is_stack()) {
1133 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack");
1134 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1135 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1136 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1137 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1138 } else {
1139 ShouldNotReachHere();
1140 }
1141 }
1142
1143 // A double move
1144 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1145
1146 // The only legal possibilities for a double_move VMRegPair are:
1147 // The painful thing here is that like long_move a VMRegPair might be
1148
1149 // Because of the calling convention we know that src is either
1150 // 1: a single physical register (xmm registers only)
1151 // 2: two stack slots (possibly unaligned)
1152 // dst can only be a pair of stack slots.
1153
1154 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args");
1155
1156 if (src.first()->is_stack()) {
1157 // source is all stack
1158 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1159 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1160 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1161 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1162 } else {
1163 // reg to stack
1164 // No worries about stack alignment
1165 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1166 }
1167 }
1168
1169
1170 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1171 // We always ignore the frame_slots arg and just use the space just below frame pointer
1172 // which by this time is free to use
1173 switch (ret_type) {
1174 case T_FLOAT:
1175 __ fstp_s(Address(rbp, -wordSize));
1176 break;
1177 case T_DOUBLE:
1178 __ fstp_d(Address(rbp, -2*wordSize));
1179 break;
1180 case T_VOID: break;
1181 case T_LONG:
1182 __ movptr(Address(rbp, -wordSize), rax);
1183 NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx));
1184 break;
1185 default: {
1186 __ movptr(Address(rbp, -wordSize), rax);
1187 }
1188 }
1189 }
1190
1191 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1192 // We always ignore the frame_slots arg and just use the space just below frame pointer
1193 // which by this time is free to use
1194 switch (ret_type) {
1195 case T_FLOAT:
1196 __ fld_s(Address(rbp, -wordSize));
1197 break;
1198 case T_DOUBLE:
1199 __ fld_d(Address(rbp, -2*wordSize));
1200 break;
1201 case T_LONG:
1202 __ movptr(rax, Address(rbp, -wordSize));
1203 NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize)));
1204 break;
1205 case T_VOID: break;
1206 default: {
1207 __ movptr(rax, Address(rbp, -wordSize));
1208 }
1209 }
1210 }
1211
1212
1213 static void save_or_restore_arguments(MacroAssembler* masm,
1214 const int stack_slots,
1215 const int total_in_args,
1216 const int arg_save_area,
1217 OopMap* map,
1218 VMRegPair* in_regs,
1219 BasicType* in_sig_bt) {
1220 // if map is non-NULL then the code should store the values,
1221 // otherwise it should load them.
1222 int handle_index = 0;
1223 // Save down double word first
1224 for ( int i = 0; i < total_in_args; i++) {
1225 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) {
1226 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area;
1227 int offset = slot * VMRegImpl::stack_slot_size;
1228 handle_index += 2;
1229 assert(handle_index <= stack_slots, "overflow");
1230 if (map != NULL) {
1231 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1232 } else {
1233 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1234 }
1235 }
1236 if (in_regs[i].first()->is_Register() && in_sig_bt[i] == T_LONG) {
1237 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area;
1238 int offset = slot * VMRegImpl::stack_slot_size;
1239 handle_index += 2;
1240 assert(handle_index <= stack_slots, "overflow");
1241 if (map != NULL) {
1242 __ movl(Address(rsp, offset), in_regs[i].first()->as_Register());
1243 if (in_regs[i].second()->is_Register()) {
1244 __ movl(Address(rsp, offset + 4), in_regs[i].second()->as_Register());
1245 }
1246 } else {
1247 __ movl(in_regs[i].first()->as_Register(), Address(rsp, offset));
1248 if (in_regs[i].second()->is_Register()) {
1249 __ movl(in_regs[i].second()->as_Register(), Address(rsp, offset + 4));
1250 }
1251 }
1252 }
1253 }
1254 // Save or restore single word registers
1255 for ( int i = 0; i < total_in_args; i++) {
1256 if (in_regs[i].first()->is_Register()) {
1257 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area;
1258 int offset = slot * VMRegImpl::stack_slot_size;
1259 assert(handle_index <= stack_slots, "overflow");
1260 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1261 map->set_oop(VMRegImpl::stack2reg(slot));;
1262 }
1263
1264 // Value is in an input register pass we must flush it to the stack
1265 const Register reg = in_regs[i].first()->as_Register();
1266 switch (in_sig_bt[i]) {
1267 case T_ARRAY:
1268 if (map != NULL) {
1269 __ movptr(Address(rsp, offset), reg);
1270 } else {
1271 __ movptr(reg, Address(rsp, offset));
1272 }
1273 break;
1274 case T_BOOLEAN:
1275 case T_CHAR:
1276 case T_BYTE:
1277 case T_SHORT:
1278 case T_INT:
1279 if (map != NULL) {
1280 __ movl(Address(rsp, offset), reg);
1281 } else {
1282 __ movl(reg, Address(rsp, offset));
1283 }
1284 break;
1285 case T_OBJECT:
1286 default: ShouldNotReachHere();
1287 }
1288 } else if (in_regs[i].first()->is_XMMRegister()) {
1289 if (in_sig_bt[i] == T_FLOAT) {
1290 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area;
1291 int offset = slot * VMRegImpl::stack_slot_size;
1292 assert(handle_index <= stack_slots, "overflow");
1293 if (map != NULL) {
1294 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1295 } else {
1296 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1297 }
1298 }
1299 } else if (in_regs[i].first()->is_stack()) {
1300 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1301 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1302 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots));
1303 }
1304 }
1305 }
1306 }
1307
1308 // Check GCLocker::needs_gc and enter the runtime if it's true. This
1309 // keeps a new JNI critical region from starting until a GC has been
1310 // forced. Save down any oops in registers and describe them in an
1311 // OopMap.
1312 static void check_needs_gc_for_critical_native(MacroAssembler* masm,
1313 Register thread,
1314 int stack_slots,
1315 int total_c_args,
1316 int total_in_args,
1317 int arg_save_area,
1318 OopMapSet* oop_maps,
1319 VMRegPair* in_regs,
1320 BasicType* in_sig_bt) {
1321 __ block_comment("check GCLocker::needs_gc");
1322 Label cont;
1323 __ cmp8(ExternalAddress((address)GCLocker::needs_gc_address()), false);
1324 __ jcc(Assembler::equal, cont);
1325
1326 // Save down any incoming oops and call into the runtime to halt for a GC
1327
1328 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1329
1330 save_or_restore_arguments(masm, stack_slots, total_in_args,
1331 arg_save_area, map, in_regs, in_sig_bt);
1332
1333 address the_pc = __ pc();
1334 oop_maps->add_gc_map( __ offset(), map);
1335 __ set_last_Java_frame(thread, rsp, noreg, the_pc);
1336
1337 __ block_comment("block_for_jni_critical");
1338 __ push(thread);
1339 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical)));
1340 __ increment(rsp, wordSize);
1341
1342 __ get_thread(thread);
1343 __ reset_last_Java_frame(thread, false);
1344
1345 save_or_restore_arguments(masm, stack_slots, total_in_args,
1346 arg_save_area, NULL, in_regs, in_sig_bt);
1347
1348 __ bind(cont);
1349 #ifdef ASSERT
1350 if (StressCriticalJNINatives) {
1351 // Stress register saving
1352 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1353 save_or_restore_arguments(masm, stack_slots, total_in_args,
1354 arg_save_area, map, in_regs, in_sig_bt);
1355 // Destroy argument registers
1356 for (int i = 0; i < total_in_args - 1; i++) {
1357 if (in_regs[i].first()->is_Register()) {
1358 const Register reg = in_regs[i].first()->as_Register();
1359 __ xorptr(reg, reg);
1360 } else if (in_regs[i].first()->is_XMMRegister()) {
1361 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister());
1362 } else if (in_regs[i].first()->is_FloatRegister()) {
1363 ShouldNotReachHere();
1364 } else if (in_regs[i].first()->is_stack()) {
1365 // Nothing to do
1366 } else {
1367 ShouldNotReachHere();
1368 }
1369 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) {
1370 i++;
1371 }
1372 }
1373
1374 save_or_restore_arguments(masm, stack_slots, total_in_args,
1375 arg_save_area, NULL, in_regs, in_sig_bt);
1376 }
1377 #endif
1378 }
1379
1380 // Unpack an array argument into a pointer to the body and the length
1381 // if the array is non-null, otherwise pass 0 for both.
1382 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) {
1383 Register tmp_reg = rax;
1384 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1385 "possible collision");
1386 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1387 "possible collision");
1388
1389 // Pass the length, ptr pair
1390 Label is_null, done;
1391 VMRegPair tmp(tmp_reg->as_VMReg());
1392 if (reg.first()->is_stack()) {
1393 // Load the arg up from the stack
1394 simple_move32(masm, reg, tmp);
1395 reg = tmp;
1396 }
1397 __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
1398 __ jccb(Assembler::equal, is_null);
1399 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1400 simple_move32(masm, tmp, body_arg);
1401 // load the length relative to the body.
1402 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() -
1403 arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1404 simple_move32(masm, tmp, length_arg);
1405 __ jmpb(done);
1406 __ bind(is_null);
1407 // Pass zeros
1408 __ xorptr(tmp_reg, tmp_reg);
1409 simple_move32(masm, tmp, body_arg);
1410 simple_move32(masm, tmp, length_arg);
1411 __ bind(done);
1412 }
1413
1414 static void verify_oop_args(MacroAssembler* masm,
1415 methodHandle method,
1416 const BasicType* sig_bt,
1417 const VMRegPair* regs) {
1418 Register temp_reg = rbx; // not part of any compiled calling seq
1419 if (VerifyOops) {
1420 for (int i = 0; i < method->size_of_parameters(); i++) {
1421 if (sig_bt[i] == T_OBJECT ||
1422 sig_bt[i] == T_ARRAY) {
1423 VMReg r = regs[i].first();
1424 assert(r->is_valid(), "bad oop arg");
1425 if (r->is_stack()) {
1426 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1427 __ verify_oop(temp_reg);
1428 } else {
1429 __ verify_oop(r->as_Register());
1430 }
1431 }
1432 }
1433 }
1434 }
1435
1436 static void gen_special_dispatch(MacroAssembler* masm,
1437 methodHandle method,
1438 const BasicType* sig_bt,
1439 const VMRegPair* regs) {
1440 verify_oop_args(masm, method, sig_bt, regs);
1441 vmIntrinsics::ID iid = method->intrinsic_id();
1442
1443 // Now write the args into the outgoing interpreter space
1444 bool has_receiver = false;
1445 Register receiver_reg = noreg;
1446 int member_arg_pos = -1;
1447 Register member_reg = noreg;
1448 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1449 if (ref_kind != 0) {
1450 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1451 member_reg = rbx; // known to be free at this point
1452 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1453 } else if (iid == vmIntrinsics::_invokeBasic) {
1454 has_receiver = true;
1455 } else {
1456 fatal("unexpected intrinsic id %d", iid);
1457 }
1458
1459 if (member_reg != noreg) {
1460 // Load the member_arg into register, if necessary.
1461 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1462 VMReg r = regs[member_arg_pos].first();
1463 if (r->is_stack()) {
1464 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1465 } else {
1466 // no data motion is needed
1467 member_reg = r->as_Register();
1468 }
1469 }
1470
1471 if (has_receiver) {
1472 // Make sure the receiver is loaded into a register.
1473 assert(method->size_of_parameters() > 0, "oob");
1474 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1475 VMReg r = regs[0].first();
1476 assert(r->is_valid(), "bad receiver arg");
1477 if (r->is_stack()) {
1478 // Porting note: This assumes that compiled calling conventions always
1479 // pass the receiver oop in a register. If this is not true on some
1480 // platform, pick a temp and load the receiver from stack.
1481 fatal("receiver always in a register");
1482 receiver_reg = rcx; // known to be free at this point
1483 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1484 } else {
1485 // no data motion is needed
1486 receiver_reg = r->as_Register();
1487 }
1488 }
1489
1490 // Figure out which address we are really jumping to:
1491 MethodHandles::generate_method_handle_dispatch(masm, iid,
1492 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1493 }
1494
1495 // ---------------------------------------------------------------------------
1496 // Generate a native wrapper for a given method. The method takes arguments
1497 // in the Java compiled code convention, marshals them to the native
1498 // convention (handlizes oops, etc), transitions to native, makes the call,
1499 // returns to java state (possibly blocking), unhandlizes any result and
1500 // returns.
1501 //
1502 // Critical native functions are a shorthand for the use of
1503 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1504 // functions. The wrapper is expected to unpack the arguments before
1505 // passing them to the callee and perform checks before and after the
1506 // native call to ensure that they GCLocker
1507 // lock_critical/unlock_critical semantics are followed. Some other
1508 // parts of JNI setup are skipped like the tear down of the JNI handle
1509 // block and the check for pending exceptions it's impossible for them
1510 // to be thrown.
1511 //
1512 // They are roughly structured like this:
1513 // if (GCLocker::needs_gc())
1514 // SharedRuntime::block_for_jni_critical();
1515 // tranistion to thread_in_native
1516 // unpack arrray arguments and call native entry point
1517 // check for safepoint in progress
1518 // check if any thread suspend flags are set
1519 // call into JVM and possible unlock the JNI critical
1520 // if a GC was suppressed while in the critical native.
1521 // transition back to thread_in_Java
1522 // return to caller
1523 //
1524 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1525 const methodHandle& method,
1526 int compile_id,
1527 BasicType* in_sig_bt,
1528 VMRegPair* in_regs,
1529 BasicType ret_type) {
1530 if (method->is_method_handle_intrinsic()) {
1531 vmIntrinsics::ID iid = method->intrinsic_id();
1532 intptr_t start = (intptr_t)__ pc();
1533 int vep_offset = ((intptr_t)__ pc()) - start;
1534 gen_special_dispatch(masm,
1535 method,
1536 in_sig_bt,
1537 in_regs);
1538 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1539 __ flush();
1540 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1541 return nmethod::new_native_nmethod(method,
1542 compile_id,
1543 masm->code(),
1544 vep_offset,
1545 frame_complete,
1546 stack_slots / VMRegImpl::slots_per_word,
1547 in_ByteSize(-1),
1548 in_ByteSize(-1),
1549 (OopMapSet*)NULL);
1550 }
1551 bool is_critical_native = true;
1552 address native_func = method->critical_native_function();
1553 if (native_func == NULL) {
1554 native_func = method->native_function();
1555 is_critical_native = false;
1556 }
1557 assert(native_func != NULL, "must have function");
1558
1559 // An OopMap for lock (and class if static)
1560 OopMapSet *oop_maps = new OopMapSet();
1561
1562 // We have received a description of where all the java arg are located
1563 // on entry to the wrapper. We need to convert these args to where
1564 // the jni function will expect them. To figure out where they go
1565 // we convert the java signature to a C signature by inserting
1566 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1567
1568 const int total_in_args = method->size_of_parameters();
1569 int total_c_args = total_in_args;
1570 if (!is_critical_native) {
1571 total_c_args += 1;
1572 if (method->is_static()) {
1573 total_c_args++;
1574 }
1575 } else {
1576 for (int i = 0; i < total_in_args; i++) {
1577 if (in_sig_bt[i] == T_ARRAY) {
1578 total_c_args++;
1579 }
1580 }
1581 }
1582
1583 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1584 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1585 BasicType* in_elem_bt = NULL;
1586
1587 int argc = 0;
1588 if (!is_critical_native) {
1589 out_sig_bt[argc++] = T_ADDRESS;
1590 if (method->is_static()) {
1591 out_sig_bt[argc++] = T_OBJECT;
1592 }
1593
1594 for (int i = 0; i < total_in_args ; i++ ) {
1595 out_sig_bt[argc++] = in_sig_bt[i];
1596 }
1597 } else {
1598 Thread* THREAD = Thread::current();
1599 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args);
1600 SignatureStream ss(method->signature());
1601 for (int i = 0; i < total_in_args ; i++ ) {
1602 if (in_sig_bt[i] == T_ARRAY) {
1603 // Arrays are passed as int, elem* pair
1604 out_sig_bt[argc++] = T_INT;
1605 out_sig_bt[argc++] = T_ADDRESS;
1606 Symbol* atype = ss.as_symbol(CHECK_NULL);
1607 const char* at = atype->as_C_string();
1608 if (strlen(at) == 2) {
1609 assert(at[0] == '[', "must be");
1610 switch (at[1]) {
1611 case 'B': in_elem_bt[i] = T_BYTE; break;
1612 case 'C': in_elem_bt[i] = T_CHAR; break;
1613 case 'D': in_elem_bt[i] = T_DOUBLE; break;
1614 case 'F': in_elem_bt[i] = T_FLOAT; break;
1615 case 'I': in_elem_bt[i] = T_INT; break;
1616 case 'J': in_elem_bt[i] = T_LONG; break;
1617 case 'S': in_elem_bt[i] = T_SHORT; break;
1618 case 'Z': in_elem_bt[i] = T_BOOLEAN; break;
1619 default: ShouldNotReachHere();
1620 }
1621 }
1622 } else {
1623 out_sig_bt[argc++] = in_sig_bt[i];
1624 in_elem_bt[i] = T_VOID;
1625 }
1626 if (in_sig_bt[i] != T_VOID) {
1627 assert(in_sig_bt[i] == ss.type(), "must match");
1628 ss.next();
1629 }
1630 }
1631 }
1632
1633 // Now figure out where the args must be stored and how much stack space
1634 // they require.
1635 int out_arg_slots;
1636 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args);
1637
1638 // Compute framesize for the wrapper. We need to handlize all oops in
1639 // registers a max of 2 on x86.
1640
1641 // Calculate the total number of stack slots we will need.
1642
1643 // First count the abi requirement plus all of the outgoing args
1644 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1645
1646 // Now the space for the inbound oop handle area
1647 int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers
1648 if (is_critical_native) {
1649 // Critical natives may have to call out so they need a save area
1650 // for register arguments.
1651 int double_slots = 0;
1652 int single_slots = 0;
1653 for ( int i = 0; i < total_in_args; i++) {
1654 if (in_regs[i].first()->is_Register()) {
1655 const Register reg = in_regs[i].first()->as_Register();
1656 switch (in_sig_bt[i]) {
1657 case T_ARRAY: // critical array (uses 2 slots on LP64)
1658 case T_BOOLEAN:
1659 case T_BYTE:
1660 case T_SHORT:
1661 case T_CHAR:
1662 case T_INT: single_slots++; break;
1663 case T_LONG: double_slots++; break;
1664 default: ShouldNotReachHere();
1665 }
1666 } else if (in_regs[i].first()->is_XMMRegister()) {
1667 switch (in_sig_bt[i]) {
1668 case T_FLOAT: single_slots++; break;
1669 case T_DOUBLE: double_slots++; break;
1670 default: ShouldNotReachHere();
1671 }
1672 } else if (in_regs[i].first()->is_FloatRegister()) {
1673 ShouldNotReachHere();
1674 }
1675 }
1676 total_save_slots = double_slots * 2 + single_slots;
1677 // align the save area
1678 if (double_slots != 0) {
1679 stack_slots = round_to(stack_slots, 2);
1680 }
1681 }
1682
1683 int oop_handle_offset = stack_slots;
1684 stack_slots += total_save_slots;
1685
1686 // Now any space we need for handlizing a klass if static method
1687
1688 int klass_slot_offset = 0;
1689 int klass_offset = -1;
1690 int lock_slot_offset = 0;
1691 bool is_static = false;
1692
1693 if (method->is_static()) {
1694 klass_slot_offset = stack_slots;
1695 stack_slots += VMRegImpl::slots_per_word;
1696 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1697 is_static = true;
1698 }
1699
1700 // Plus a lock if needed
1701
1702 if (method->is_synchronized()) {
1703 lock_slot_offset = stack_slots;
1704 stack_slots += VMRegImpl::slots_per_word;
1705 }
1706
1707 // Now a place (+2) to save return values or temp during shuffling
1708 // + 2 for return address (which we own) and saved rbp,
1709 stack_slots += 4;
1710
1711 // Ok The space we have allocated will look like:
1712 //
1713 //
1714 // FP-> | |
1715 // |---------------------|
1716 // | 2 slots for moves |
1717 // |---------------------|
1718 // | lock box (if sync) |
1719 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset)
1720 // | klass (if static) |
1721 // |---------------------| <- klass_slot_offset
1722 // | oopHandle area |
1723 // |---------------------| <- oop_handle_offset (a max of 2 registers)
1724 // | outbound memory |
1725 // | based arguments |
1726 // | |
1727 // |---------------------|
1728 // | |
1729 // SP-> | out_preserved_slots |
1730 //
1731 //
1732 // ****************************************************************************
1733 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1734 // arguments off of the stack after the jni call. Before the call we can use
1735 // instructions that are SP relative. After the jni call we switch to FP
1736 // relative instructions instead of re-adjusting the stack on windows.
1737 // ****************************************************************************
1738
1739
1740 // Now compute actual number of stack words we need rounding to make
1741 // stack properly aligned.
1742 stack_slots = round_to(stack_slots, StackAlignmentInSlots);
1743
1744 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1745
1746 intptr_t start = (intptr_t)__ pc();
1747
1748 // First thing make an ic check to see if we should even be here
1749
1750 // We are free to use all registers as temps without saving them and
1751 // restoring them except rbp. rbp is the only callee save register
1752 // as far as the interpreter and the compiler(s) are concerned.
1753
1754
1755 const Register ic_reg = rax;
1756 const Register receiver = rcx;
1757 Label hit;
1758 Label exception_pending;
1759
1760 __ verify_oop(receiver);
1761 __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
1762 __ jcc(Assembler::equal, hit);
1763
1764 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1765
1766 // verified entry must be aligned for code patching.
1767 // and the first 5 bytes must be in the same cache line
1768 // if we align at 8 then we will be sure 5 bytes are in the same line
1769 __ align(8);
1770
1771 __ bind(hit);
1772
1773 int vep_offset = ((intptr_t)__ pc()) - start;
1774
1775 #ifdef COMPILER1
1776 // For Object.hashCode, System.identityHashCode try to pull hashCode from object header if available.
1777 if ((InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) || (method->intrinsic_id() == vmIntrinsics::_identityHashCode)) {
1778 inline_check_hashcode_from_object_header(masm, method, rcx /*obj_reg*/, rax /*result*/);
1779 }
1780 #endif // COMPILER1
1781
1782 // The instruction at the verified entry point must be 5 bytes or longer
1783 // because it can be patched on the fly by make_non_entrant. The stack bang
1784 // instruction fits that requirement.
1785
1786 // Generate stack overflow check
1787
1788 if (UseStackBanging) {
1789 __ bang_stack_with_offset((int)JavaThread::stack_shadow_zone_size());
1790 } else {
1791 // need a 5 byte instruction to allow MT safe patching to non-entrant
1792 __ fat_nop();
1793 }
1794
1795 // Generate a new frame for the wrapper.
1796 __ enter();
1797 // -2 because return address is already present and so is saved rbp
1798 __ subptr(rsp, stack_size - 2*wordSize);
1799
1800 // Frame is now completed as far as size and linkage.
1801 int frame_complete = ((intptr_t)__ pc()) - start;
1802
1803 if (UseRTMLocking) {
1804 // Abort RTM transaction before calling JNI
1805 // because critical section will be large and will be
1806 // aborted anyway. Also nmethod could be deoptimized.
1807 __ xabort(0);
1808 }
1809
1810 // Calculate the difference between rsp and rbp,. We need to know it
1811 // after the native call because on windows Java Natives will pop
1812 // the arguments and it is painful to do rsp relative addressing
1813 // in a platform independent way. So after the call we switch to
1814 // rbp, relative addressing.
1815
1816 int fp_adjustment = stack_size - 2*wordSize;
1817
1818 #ifdef COMPILER2
1819 // C2 may leave the stack dirty if not in SSE2+ mode
1820 if (UseSSE >= 2) {
1821 __ verify_FPU(0, "c2i transition should have clean FPU stack");
1822 } else {
1823 __ empty_FPU_stack();
1824 }
1825 #endif /* COMPILER2 */
1826
1827 // Compute the rbp, offset for any slots used after the jni call
1828
1829 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment;
1830
1831 // We use rdi as a thread pointer because it is callee save and
1832 // if we load it once it is usable thru the entire wrapper
1833 const Register thread = rdi;
1834
1835 // We use rsi as the oop handle for the receiver/klass
1836 // It is callee save so it survives the call to native
1837
1838 const Register oop_handle_reg = rsi;
1839
1840 __ get_thread(thread);
1841
1842 if (is_critical_native) {
1843 check_needs_gc_for_critical_native(masm, thread, stack_slots, total_c_args, total_in_args,
1844 oop_handle_offset, oop_maps, in_regs, in_sig_bt);
1845 }
1846
1847 //
1848 // We immediately shuffle the arguments so that any vm call we have to
1849 // make from here on out (sync slow path, jvmti, etc.) we will have
1850 // captured the oops from our caller and have a valid oopMap for
1851 // them.
1852
1853 // -----------------
1854 // The Grand Shuffle
1855 //
1856 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
1857 // and, if static, the class mirror instead of a receiver. This pretty much
1858 // guarantees that register layout will not match (and x86 doesn't use reg
1859 // parms though amd does). Since the native abi doesn't use register args
1860 // and the java conventions does we don't have to worry about collisions.
1861 // All of our moved are reg->stack or stack->stack.
1862 // We ignore the extra arguments during the shuffle and handle them at the
1863 // last moment. The shuffle is described by the two calling convention
1864 // vectors we have in our possession. We simply walk the java vector to
1865 // get the source locations and the c vector to get the destinations.
1866
1867 int c_arg = is_critical_native ? 0 : (method->is_static() ? 2 : 1 );
1868
1869 // Record rsp-based slot for receiver on stack for non-static methods
1870 int receiver_offset = -1;
1871
1872 // This is a trick. We double the stack slots so we can claim
1873 // the oops in the caller's frame. Since we are sure to have
1874 // more args than the caller doubling is enough to make
1875 // sure we can capture all the incoming oop args from the
1876 // caller.
1877 //
1878 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1879
1880 // Mark location of rbp,
1881 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg());
1882
1883 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx
1884 // Are free to temporaries if we have to do stack to steck moves.
1885 // All inbound args are referenced based on rbp, and all outbound args via rsp.
1886
1887 for (int i = 0; i < total_in_args ; i++, c_arg++ ) {
1888 switch (in_sig_bt[i]) {
1889 case T_ARRAY:
1890 if (is_critical_native) {
1891 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]);
1892 c_arg++;
1893 break;
1894 }
1895 case T_OBJECT:
1896 assert(!is_critical_native, "no oop arguments");
1897 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
1898 ((i == 0) && (!is_static)),
1899 &receiver_offset);
1900 break;
1901 case T_VOID:
1902 break;
1903
1904 case T_FLOAT:
1905 float_move(masm, in_regs[i], out_regs[c_arg]);
1906 break;
1907
1908 case T_DOUBLE:
1909 assert( i + 1 < total_in_args &&
1910 in_sig_bt[i + 1] == T_VOID &&
1911 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
1912 double_move(masm, in_regs[i], out_regs[c_arg]);
1913 break;
1914
1915 case T_LONG :
1916 long_move(masm, in_regs[i], out_regs[c_arg]);
1917 break;
1918
1919 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
1920
1921 default:
1922 simple_move32(masm, in_regs[i], out_regs[c_arg]);
1923 }
1924 }
1925
1926 // Pre-load a static method's oop into rsi. Used both by locking code and
1927 // the normal JNI call code.
1928 if (method->is_static() && !is_critical_native) {
1929
1930 // load opp into a register
1931 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror()));
1932
1933 // Now handlize the static class mirror it's known not-null.
1934 __ movptr(Address(rsp, klass_offset), oop_handle_reg);
1935 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
1936
1937 // Now get the handle
1938 __ lea(oop_handle_reg, Address(rsp, klass_offset));
1939 // store the klass handle as second argument
1940 __ movptr(Address(rsp, wordSize), oop_handle_reg);
1941 }
1942
1943 // Change state to native (we save the return address in the thread, since it might not
1944 // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
1945 // points into the right code segment. It does not have to be the correct return pc.
1946 // We use the same pc/oopMap repeatedly when we call out
1947
1948 intptr_t the_pc = (intptr_t) __ pc();
1949 oop_maps->add_gc_map(the_pc - start, map);
1950
1951 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc);
1952
1953
1954 // We have all of the arguments setup at this point. We must not touch any register
1955 // argument registers at this point (what if we save/restore them there are no oop?
1956
1957 {
1958 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
1959 __ mov_metadata(rax, method());
1960 __ call_VM_leaf(
1961 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
1962 thread, rax);
1963 }
1964
1965 // RedefineClasses() tracing support for obsolete method entry
1966 if (log_is_enabled(Trace, redefine, class, obsolete)) {
1967 __ mov_metadata(rax, method());
1968 __ call_VM_leaf(
1969 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
1970 thread, rax);
1971 }
1972
1973 // These are register definitions we need for locking/unlocking
1974 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction
1975 const Register obj_reg = rcx; // Will contain the oop
1976 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock)
1977
1978 Label slow_path_lock;
1979 Label lock_done;
1980
1981 // Lock a synchronized method
1982 if (method->is_synchronized()) {
1983 assert(!is_critical_native, "unhandled");
1984
1985
1986 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
1987
1988 // Get the handle (the 2nd argument)
1989 __ movptr(oop_handle_reg, Address(rsp, wordSize));
1990
1991 // Get address of the box
1992
1993 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset));
1994
1995 // Load the oop from the handle
1996 __ movptr(obj_reg, Address(oop_handle_reg, 0));
1997
1998 if (UseBiasedLocking) {
1999 // Note that oop_handle_reg is trashed during this call
2000 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, oop_handle_reg, false, lock_done, &slow_path_lock);
2001 }
2002
2003 // Load immediate 1 into swap_reg %rax,
2004 __ movptr(swap_reg, 1);
2005
2006 // Load (object->mark() | 1) into swap_reg %rax,
2007 __ orptr(swap_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
2008
2009 // Save (object->mark() | 1) into BasicLock's displaced header
2010 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2011
2012 if (os::is_MP()) {
2013 __ lock();
2014 }
2015
2016 // src -> dest iff dest == rax, else rax, <- dest
2017 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg)
2018 __ cmpxchgptr(lock_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
2019 __ jcc(Assembler::equal, lock_done);
2020
2021 // Test if the oopMark is an obvious stack pointer, i.e.,
2022 // 1) (mark & 3) == 0, and
2023 // 2) rsp <= mark < mark + os::pagesize()
2024 // These 3 tests can be done by evaluating the following
2025 // expression: ((mark - rsp) & (3 - os::vm_page_size())),
2026 // assuming both stack pointer and pagesize have their
2027 // least significant 2 bits clear.
2028 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg
2029
2030 __ subptr(swap_reg, rsp);
2031 __ andptr(swap_reg, 3 - os::vm_page_size());
2032
2033 // Save the test result, for recursive case, the result is zero
2034 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2035 __ jcc(Assembler::notEqual, slow_path_lock);
2036 // Slow path will re-enter here
2037 __ bind(lock_done);
2038
2039 if (UseBiasedLocking) {
2040 // Re-fetch oop_handle_reg as we trashed it above
2041 __ movptr(oop_handle_reg, Address(rsp, wordSize));
2042 }
2043 }
2044
2045
2046 // Finally just about ready to make the JNI call
2047
2048
2049 // get JNIEnv* which is first argument to native
2050 if (!is_critical_native) {
2051 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset())));
2052 __ movptr(Address(rsp, 0), rdx);
2053 }
2054
2055 // Now set thread in native
2056 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native);
2057
2058 __ call(RuntimeAddress(native_func));
2059
2060 // Verify or restore cpu control state after JNI call
2061 __ restore_cpu_control_state_after_jni();
2062
2063 // WARNING - on Windows Java Natives use pascal calling convention and pop the
2064 // arguments off of the stack. We could just re-adjust the stack pointer here
2065 // and continue to do SP relative addressing but we instead switch to FP
2066 // relative addressing.
2067
2068 // Unpack native results.
2069 switch (ret_type) {
2070 case T_BOOLEAN: __ c2bool(rax); break;
2071 case T_CHAR : __ andptr(rax, 0xFFFF); break;
2072 case T_BYTE : __ sign_extend_byte (rax); break;
2073 case T_SHORT : __ sign_extend_short(rax); break;
2074 case T_INT : /* nothing to do */ break;
2075 case T_DOUBLE :
2076 case T_FLOAT :
2077 // Result is in st0 we'll save as needed
2078 break;
2079 case T_ARRAY: // Really a handle
2080 case T_OBJECT: // Really a handle
2081 break; // can't de-handlize until after safepoint check
2082 case T_VOID: break;
2083 case T_LONG: break;
2084 default : ShouldNotReachHere();
2085 }
2086
2087 // Switch thread to "native transition" state before reading the synchronization state.
2088 // This additional state is necessary because reading and testing the synchronization
2089 // state is not atomic w.r.t. GC, as this scenario demonstrates:
2090 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
2091 // VM thread changes sync state to synchronizing and suspends threads for GC.
2092 // Thread A is resumed to finish this native method, but doesn't block here since it
2093 // didn't see any synchronization is progress, and escapes.
2094 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
2095
2096 if(os::is_MP()) {
2097 if (UseMembar) {
2098 // Force this write out before the read below
2099 __ membar(Assembler::Membar_mask_bits(
2100 Assembler::LoadLoad | Assembler::LoadStore |
2101 Assembler::StoreLoad | Assembler::StoreStore));
2102 } else {
2103 // Write serialization page so VM thread can do a pseudo remote membar.
2104 // We use the current thread pointer to calculate a thread specific
2105 // offset to write to within the page. This minimizes bus traffic
2106 // due to cache line collision.
2107 __ serialize_memory(thread, rcx);
2108 }
2109 }
2110
2111 if (AlwaysRestoreFPU) {
2112 // Make sure the control word is correct.
2113 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
2114 }
2115
2116 Label after_transition;
2117
2118 // check for safepoint operation in progress and/or pending suspend requests
2119 { Label Continue;
2120
2121 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()),
2122 SafepointSynchronize::_not_synchronized);
2123
2124 Label L;
2125 __ jcc(Assembler::notEqual, L);
2126 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0);
2127 __ jcc(Assembler::equal, Continue);
2128 __ bind(L);
2129
2130 // Don't use call_VM as it will see a possible pending exception and forward it
2131 // and never return here preventing us from clearing _last_native_pc down below.
2132 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
2133 // preserved and correspond to the bcp/locals pointers. So we do a runtime call
2134 // by hand.
2135 //
2136 __ vzeroupper();
2137
2138 save_native_result(masm, ret_type, stack_slots);
2139 __ push(thread);
2140 if (!is_critical_native) {
2141 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
2142 JavaThread::check_special_condition_for_native_trans)));
2143 } else {
2144 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
2145 JavaThread::check_special_condition_for_native_trans_and_transition)));
2146 }
2147 __ increment(rsp, wordSize);
2148 // Restore any method result value
2149 restore_native_result(masm, ret_type, stack_slots);
2150
2151 if (is_critical_native) {
2152 // The call above performed the transition to thread_in_Java so
2153 // skip the transition logic below.
2154 __ jmpb(after_transition);
2155 }
2156
2157 __ bind(Continue);
2158 }
2159
2160 // change thread state
2161 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java);
2162 __ bind(after_transition);
2163
2164 Label reguard;
2165 Label reguard_done;
2166 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_reserved_disabled);
2167 __ jcc(Assembler::equal, reguard);
2168
2169 // slow path reguard re-enters here
2170 __ bind(reguard_done);
2171
2172 // Handle possible exception (will unlock if necessary)
2173
2174 // native result if any is live
2175
2176 // Unlock
2177 Label slow_path_unlock;
2178 Label unlock_done;
2179 if (method->is_synchronized()) {
2180
2181 Label done;
2182
2183 // Get locked oop from the handle we passed to jni
2184 __ movptr(obj_reg, Address(oop_handle_reg, 0));
2185
2186 if (UseBiasedLocking) {
2187 __ biased_locking_exit(obj_reg, rbx, done);
2188 }
2189
2190 // Simple recursive lock?
2191
2192 __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD);
2193 __ jcc(Assembler::equal, done);
2194
2195 // Must save rax, if if it is live now because cmpxchg must use it
2196 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2197 save_native_result(masm, ret_type, stack_slots);
2198 }
2199
2200 // get old displaced header
2201 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset));
2202
2203 // get address of the stack lock
2204 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2205
2206 // Atomic swap old header if oop still contains the stack lock
2207 if (os::is_MP()) {
2208 __ lock();
2209 }
2210
2211 // src -> dest iff dest == rax, else rax, <- dest
2212 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg)
2213 __ cmpxchgptr(rbx, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
2214 __ jcc(Assembler::notEqual, slow_path_unlock);
2215
2216 // slow path re-enters here
2217 __ bind(unlock_done);
2218 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2219 restore_native_result(masm, ret_type, stack_slots);
2220 }
2221
2222 __ bind(done);
2223
2224 }
2225
2226 {
2227 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
2228 // Tell dtrace about this method exit
2229 save_native_result(masm, ret_type, stack_slots);
2230 __ mov_metadata(rax, method());
2231 __ call_VM_leaf(
2232 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2233 thread, rax);
2234 restore_native_result(masm, ret_type, stack_slots);
2235 }
2236
2237 // We can finally stop using that last_Java_frame we setup ages ago
2238
2239 __ reset_last_Java_frame(thread, false);
2240
2241 // Unbox oop result, e.g. JNIHandles::resolve value.
2242 if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
2243 __ resolve_jobject(rax /* value */,
2244 thread /* thread */,
2245 rcx /* tmp */);
2246 }
2247
2248 if (CheckJNICalls) {
2249 // clear_pending_jni_exception_check
2250 __ movptr(Address(thread, JavaThread::pending_jni_exception_check_fn_offset()), NULL_WORD);
2251 }
2252
2253 if (!is_critical_native) {
2254 // reset handle block
2255 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset()));
2256 __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD);
2257
2258 // Any exception pending?
2259 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2260 __ jcc(Assembler::notEqual, exception_pending);
2261 }
2262
2263 // no exception, we're almost done
2264
2265 // check that only result value is on FPU stack
2266 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit");
2267
2268 // Fixup floating pointer results so that result looks like a return from a compiled method
2269 if (ret_type == T_FLOAT) {
2270 if (UseSSE >= 1) {
2271 // Pop st0 and store as float and reload into xmm register
2272 __ fstp_s(Address(rbp, -4));
2273 __ movflt(xmm0, Address(rbp, -4));
2274 }
2275 } else if (ret_type == T_DOUBLE) {
2276 if (UseSSE >= 2) {
2277 // Pop st0 and store as double and reload into xmm register
2278 __ fstp_d(Address(rbp, -8));
2279 __ movdbl(xmm0, Address(rbp, -8));
2280 }
2281 }
2282
2283 // Return
2284
2285 __ leave();
2286 __ ret(0);
2287
2288 // Unexpected paths are out of line and go here
2289
2290 // Slow path locking & unlocking
2291 if (method->is_synchronized()) {
2292
2293 // BEGIN Slow path lock
2294
2295 __ bind(slow_path_lock);
2296
2297 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2298 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2299 __ push(thread);
2300 __ push(lock_reg);
2301 __ push(obj_reg);
2302 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C)));
2303 __ addptr(rsp, 3*wordSize);
2304
2305 #ifdef ASSERT
2306 { Label L;
2307 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
2308 __ jcc(Assembler::equal, L);
2309 __ stop("no pending exception allowed on exit from monitorenter");
2310 __ bind(L);
2311 }
2312 #endif
2313 __ jmp(lock_done);
2314
2315 // END Slow path lock
2316
2317 // BEGIN Slow path unlock
2318 __ bind(slow_path_unlock);
2319 __ vzeroupper();
2320 // Slow path unlock
2321
2322 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2323 save_native_result(masm, ret_type, stack_slots);
2324 }
2325 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2326
2327 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2328 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
2329
2330
2331 // should be a peal
2332 // +wordSize because of the push above
2333 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2334 __ push(thread);
2335 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2336 __ push(rax);
2337
2338 __ push(obj_reg);
2339 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
2340 __ addptr(rsp, 3*wordSize);
2341 #ifdef ASSERT
2342 {
2343 Label L;
2344 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2345 __ jcc(Assembler::equal, L);
2346 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2347 __ bind(L);
2348 }
2349 #endif /* ASSERT */
2350
2351 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2352
2353 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2354 restore_native_result(masm, ret_type, stack_slots);
2355 }
2356 __ jmp(unlock_done);
2357 // END Slow path unlock
2358
2359 }
2360
2361 // SLOW PATH Reguard the stack if needed
2362
2363 __ bind(reguard);
2364 __ vzeroupper();
2365 save_native_result(masm, ret_type, stack_slots);
2366 {
2367 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
2368 }
2369 restore_native_result(masm, ret_type, stack_slots);
2370 __ jmp(reguard_done);
2371
2372
2373 // BEGIN EXCEPTION PROCESSING
2374
2375 if (!is_critical_native) {
2376 // Forward the exception
2377 __ bind(exception_pending);
2378
2379 // remove possible return value from FPU register stack
2380 __ empty_FPU_stack();
2381
2382 // pop our frame
2383 __ leave();
2384 // and forward the exception
2385 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2386 }
2387
2388 __ flush();
2389
2390 nmethod *nm = nmethod::new_native_nmethod(method,
2391 compile_id,
2392 masm->code(),
2393 vep_offset,
2394 frame_complete,
2395 stack_slots / VMRegImpl::slots_per_word,
2396 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2397 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2398 oop_maps);
2399
2400 if (is_critical_native) {
2401 nm->set_lazy_critical_native(true);
2402 }
2403
2404 return nm;
2405
2406 }
2407
2408 // this function returns the adjust size (in number of words) to a c2i adapter
2409 // activation for use during deoptimization
2410 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2411 return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2412 }
2413
2414
2415 uint SharedRuntime::out_preserve_stack_slots() {
2416 return 0;
2417 }
2418
2419 //------------------------------generate_deopt_blob----------------------------
2420 void SharedRuntime::generate_deopt_blob() {
2421 // allocate space for the code
2422 ResourceMark rm;
2423 // setup code generation tools
2424 // note: the buffer code size must account for StackShadowPages=50
2425 CodeBuffer buffer("deopt_blob", 1536, 1024);
2426 MacroAssembler* masm = new MacroAssembler(&buffer);
2427 int frame_size_in_words;
2428 OopMap* map = NULL;
2429 // Account for the extra args we place on the stack
2430 // by the time we call fetch_unroll_info
2431 const int additional_words = 2; // deopt kind, thread
2432
2433 OopMapSet *oop_maps = new OopMapSet();
2434
2435 // -------------
2436 // This code enters when returning to a de-optimized nmethod. A return
2437 // address has been pushed on the the stack, and return values are in
2438 // registers.
2439 // If we are doing a normal deopt then we were called from the patched
2440 // nmethod from the point we returned to the nmethod. So the return
2441 // address on the stack is wrong by NativeCall::instruction_size
2442 // We will adjust the value to it looks like we have the original return
2443 // address on the stack (like when we eagerly deoptimized).
2444 // In the case of an exception pending with deoptimized then we enter
2445 // with a return address on the stack that points after the call we patched
2446 // into the exception handler. We have the following register state:
2447 // rax,: exception
2448 // rbx,: exception handler
2449 // rdx: throwing pc
2450 // So in this case we simply jam rdx into the useless return address and
2451 // the stack looks just like we want.
2452 //
2453 // At this point we need to de-opt. We save the argument return
2454 // registers. We call the first C routine, fetch_unroll_info(). This
2455 // routine captures the return values and returns a structure which
2456 // describes the current frame size and the sizes of all replacement frames.
2457 // The current frame is compiled code and may contain many inlined
2458 // functions, each with their own JVM state. We pop the current frame, then
2459 // push all the new frames. Then we call the C routine unpack_frames() to
2460 // populate these frames. Finally unpack_frames() returns us the new target
2461 // address. Notice that callee-save registers are BLOWN here; they have
2462 // already been captured in the vframeArray at the time the return PC was
2463 // patched.
2464 address start = __ pc();
2465 Label cont;
2466
2467 // Prolog for non exception case!
2468
2469 // Save everything in sight.
2470
2471 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2472 // Normal deoptimization
2473 __ push(Deoptimization::Unpack_deopt);
2474 __ jmp(cont);
2475
2476 int reexecute_offset = __ pc() - start;
2477
2478 // Reexecute case
2479 // return address is the pc describes what bci to do re-execute at
2480
2481 // No need to update map as each call to save_live_registers will produce identical oopmap
2482 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2483
2484 __ push(Deoptimization::Unpack_reexecute);
2485 __ jmp(cont);
2486
2487 int exception_offset = __ pc() - start;
2488
2489 // Prolog for exception case
2490
2491 // all registers are dead at this entry point, except for rax, and
2492 // rdx which contain the exception oop and exception pc
2493 // respectively. Set them in TLS and fall thru to the
2494 // unpack_with_exception_in_tls entry point.
2495
2496 __ get_thread(rdi);
2497 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx);
2498 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax);
2499
2500 int exception_in_tls_offset = __ pc() - start;
2501
2502 // new implementation because exception oop is now passed in JavaThread
2503
2504 // Prolog for exception case
2505 // All registers must be preserved because they might be used by LinearScan
2506 // Exceptiop oop and throwing PC are passed in JavaThread
2507 // tos: stack at point of call to method that threw the exception (i.e. only
2508 // args are on the stack, no return address)
2509
2510 // make room on stack for the return address
2511 // It will be patched later with the throwing pc. The correct value is not
2512 // available now because loading it from memory would destroy registers.
2513 __ push(0);
2514
2515 // Save everything in sight.
2516
2517 // No need to update map as each call to save_live_registers will produce identical oopmap
2518 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2519
2520 // Now it is safe to overwrite any register
2521
2522 // store the correct deoptimization type
2523 __ push(Deoptimization::Unpack_exception);
2524
2525 // load throwing pc from JavaThread and patch it as the return address
2526 // of the current frame. Then clear the field in JavaThread
2527 __ get_thread(rdi);
2528 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset()));
2529 __ movptr(Address(rbp, wordSize), rdx);
2530 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD);
2531
2532 #ifdef ASSERT
2533 // verify that there is really an exception oop in JavaThread
2534 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset()));
2535 __ verify_oop(rax);
2536
2537 // verify that there is no pending exception
2538 Label no_pending_exception;
2539 __ movptr(rax, Address(rdi, Thread::pending_exception_offset()));
2540 __ testptr(rax, rax);
2541 __ jcc(Assembler::zero, no_pending_exception);
2542 __ stop("must not have pending exception here");
2543 __ bind(no_pending_exception);
2544 #endif
2545
2546 __ bind(cont);
2547
2548 // Compiled code leaves the floating point stack dirty, empty it.
2549 __ empty_FPU_stack();
2550
2551
2552 // Call C code. Need thread and this frame, but NOT official VM entry
2553 // crud. We cannot block on this call, no GC can happen.
2554 __ get_thread(rcx);
2555 __ push(rcx);
2556 // fetch_unroll_info needs to call last_java_frame()
2557 __ set_last_Java_frame(rcx, noreg, noreg, NULL);
2558
2559 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2560
2561 // Need to have an oopmap that tells fetch_unroll_info where to
2562 // find any register it might need.
2563
2564 oop_maps->add_gc_map( __ pc()-start, map);
2565
2566 // Discard args to fetch_unroll_info
2567 __ pop(rcx);
2568 __ pop(rcx);
2569
2570 __ get_thread(rcx);
2571 __ reset_last_Java_frame(rcx, false);
2572
2573 // Load UnrollBlock into EDI
2574 __ mov(rdi, rax);
2575
2576 // Move the unpack kind to a safe place in the UnrollBlock because
2577 // we are very short of registers
2578
2579 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes());
2580 // retrieve the deopt kind from the UnrollBlock.
2581 __ movl(rax, unpack_kind);
2582
2583 Label noException;
2584 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending?
2585 __ jcc(Assembler::notEqual, noException);
2586 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset()));
2587 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset()));
2588 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD);
2589 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD);
2590
2591 __ verify_oop(rax);
2592
2593 // Overwrite the result registers with the exception results.
2594 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2595 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2596
2597 __ bind(noException);
2598
2599 // Stack is back to only having register save data on the stack.
2600 // Now restore the result registers. Everything else is either dead or captured
2601 // in the vframeArray.
2602
2603 RegisterSaver::restore_result_registers(masm);
2604
2605 // Non standard control word may be leaked out through a safepoint blob, and we can
2606 // deopt at a poll point with the non standard control word. However, we should make
2607 // sure the control word is correct after restore_result_registers.
2608 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
2609
2610 // All of the register save area has been popped of the stack. Only the
2611 // return address remains.
2612
2613 // Pop all the frames we must move/replace.
2614 //
2615 // Frame picture (youngest to oldest)
2616 // 1: self-frame (no frame link)
2617 // 2: deopting frame (no frame link)
2618 // 3: caller of deopting frame (could be compiled/interpreted).
2619 //
2620 // Note: by leaving the return address of self-frame on the stack
2621 // and using the size of frame 2 to adjust the stack
2622 // when we are done the return to frame 3 will still be on the stack.
2623
2624 // Pop deoptimized frame
2625 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2626
2627 // sp should be pointing at the return address to the caller (3)
2628
2629 // Pick up the initial fp we should save
2630 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
2631 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
2632
2633 #ifdef ASSERT
2634 // Compilers generate code that bang the stack by as much as the
2635 // interpreter would need. So this stack banging should never
2636 // trigger a fault. Verify that it does not on non product builds.
2637 if (UseStackBanging) {
2638 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2639 __ bang_stack_size(rbx, rcx);
2640 }
2641 #endif
2642
2643 // Load array of frame pcs into ECX
2644 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2645
2646 __ pop(rsi); // trash the old pc
2647
2648 // Load array of frame sizes into ESI
2649 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2650
2651 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2652
2653 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2654 __ movl(counter, rbx);
2655
2656 // Now adjust the caller's stack to make up for the extra locals
2657 // but record the original sp so that we can save it in the skeletal interpreter
2658 // frame and the stack walking of interpreter_sender will get the unextended sp
2659 // value and not the "real" sp value.
2660
2661 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2662 __ movptr(sp_temp, rsp);
2663 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2664 __ subptr(rsp, rbx);
2665
2666 // Push interpreter frames in a loop
2667 Label loop;
2668 __ bind(loop);
2669 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2670 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
2671 __ pushptr(Address(rcx, 0)); // save return address
2672 __ enter(); // save old & set new rbp,
2673 __ subptr(rsp, rbx); // Prolog!
2674 __ movptr(rbx, sp_temp); // sender's sp
2675 // This value is corrected by layout_activation_impl
2676 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD);
2677 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2678 __ movptr(sp_temp, rsp); // pass to next frame
2679 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2680 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2681 __ decrementl(counter); // decrement counter
2682 __ jcc(Assembler::notZero, loop);
2683 __ pushptr(Address(rcx, 0)); // save final return address
2684
2685 // Re-push self-frame
2686 __ enter(); // save old & set new rbp,
2687
2688 // Return address and rbp, are in place
2689 // We'll push additional args later. Just allocate a full sized
2690 // register save area
2691 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize);
2692
2693 // Restore frame locals after moving the frame
2694 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2695 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2696 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local
2697 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2698 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2699
2700 // Set up the args to unpack_frame
2701
2702 __ pushl(unpack_kind); // get the unpack_kind value
2703 __ get_thread(rcx);
2704 __ push(rcx);
2705
2706 // set last_Java_sp, last_Java_fp
2707 __ set_last_Java_frame(rcx, noreg, rbp, NULL);
2708
2709 // Call C code. Need thread but NOT official VM entry
2710 // crud. We cannot block on this call, no GC can happen. Call should
2711 // restore return values to their stack-slots with the new SP.
2712 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2713 // Set an oopmap for the call site
2714 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 ));
2715
2716 // rax, contains the return result type
2717 __ push(rax);
2718
2719 __ get_thread(rcx);
2720 __ reset_last_Java_frame(rcx, false);
2721
2722 // Collect return values
2723 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize));
2724 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize));
2725
2726 // Clear floating point stack before returning to interpreter
2727 __ empty_FPU_stack();
2728
2729 // Check if we should push the float or double return value.
2730 Label results_done, yes_double_value;
2731 __ cmpl(Address(rsp, 0), T_DOUBLE);
2732 __ jcc (Assembler::zero, yes_double_value);
2733 __ cmpl(Address(rsp, 0), T_FLOAT);
2734 __ jcc (Assembler::notZero, results_done);
2735
2736 // return float value as expected by interpreter
2737 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2738 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2739 __ jmp(results_done);
2740
2741 // return double value as expected by interpreter
2742 __ bind(yes_double_value);
2743 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2744 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2745
2746 __ bind(results_done);
2747
2748 // Pop self-frame.
2749 __ leave(); // Epilog!
2750
2751 // Jump to interpreter
2752 __ ret(0);
2753
2754 // -------------
2755 // make sure all code is generated
2756 masm->flush();
2757
2758 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2759 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2760 }
2761
2762
2763 #ifdef COMPILER2
2764 //------------------------------generate_uncommon_trap_blob--------------------
2765 void SharedRuntime::generate_uncommon_trap_blob() {
2766 // allocate space for the code
2767 ResourceMark rm;
2768 // setup code generation tools
2769 CodeBuffer buffer("uncommon_trap_blob", 512, 512);
2770 MacroAssembler* masm = new MacroAssembler(&buffer);
2771
2772 enum frame_layout {
2773 arg0_off, // thread sp + 0 // Arg location for
2774 arg1_off, // unloaded_class_index sp + 1 // calling C
2775 arg2_off, // exec_mode sp + 2
2776 // The frame sender code expects that rbp will be in the "natural" place and
2777 // will override any oopMap setting for it. We must therefore force the layout
2778 // so that it agrees with the frame sender code.
2779 rbp_off, // callee saved register sp + 3
2780 return_off, // slot for return address sp + 4
2781 framesize
2782 };
2783
2784 address start = __ pc();
2785
2786 if (UseRTMLocking) {
2787 // Abort RTM transaction before possible nmethod deoptimization.
2788 __ xabort(0);
2789 }
2790
2791 // Push self-frame.
2792 __ subptr(rsp, return_off*wordSize); // Epilog!
2793
2794 // rbp, is an implicitly saved callee saved register (i.e. the calling
2795 // convention will save restore it in prolog/epilog) Other than that
2796 // there are no callee save registers no that adapter frames are gone.
2797 __ movptr(Address(rsp, rbp_off*wordSize), rbp);
2798
2799 // Clear the floating point exception stack
2800 __ empty_FPU_stack();
2801
2802 // set last_Java_sp
2803 __ get_thread(rdx);
2804 __ set_last_Java_frame(rdx, noreg, noreg, NULL);
2805
2806 // Call C code. Need thread but NOT official VM entry
2807 // crud. We cannot block on this call, no GC can happen. Call should
2808 // capture callee-saved registers as well as return values.
2809 __ movptr(Address(rsp, arg0_off*wordSize), rdx);
2810 // argument already in ECX
2811 __ movl(Address(rsp, arg1_off*wordSize),rcx);
2812 __ movl(Address(rsp, arg2_off*wordSize), Deoptimization::Unpack_uncommon_trap);
2813 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
2814
2815 // Set an oopmap for the call site
2816 OopMapSet *oop_maps = new OopMapSet();
2817 OopMap* map = new OopMap( framesize, 0 );
2818 // No oopMap for rbp, it is known implicitly
2819
2820 oop_maps->add_gc_map( __ pc()-start, map);
2821
2822 __ get_thread(rcx);
2823
2824 __ reset_last_Java_frame(rcx, false);
2825
2826 // Load UnrollBlock into EDI
2827 __ movptr(rdi, rax);
2828
2829 #ifdef ASSERT
2830 { Label L;
2831 __ cmpptr(Address(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()),
2832 (int32_t)Deoptimization::Unpack_uncommon_trap);
2833 __ jcc(Assembler::equal, L);
2834 __ stop("SharedRuntime::generate_deopt_blob: expected Unpack_uncommon_trap");
2835 __ bind(L);
2836 }
2837 #endif
2838
2839 // Pop all the frames we must move/replace.
2840 //
2841 // Frame picture (youngest to oldest)
2842 // 1: self-frame (no frame link)
2843 // 2: deopting frame (no frame link)
2844 // 3: caller of deopting frame (could be compiled/interpreted).
2845
2846 // Pop self-frame. We have no frame, and must rely only on EAX and ESP.
2847 __ addptr(rsp,(framesize-1)*wordSize); // Epilog!
2848
2849 // Pop deoptimized frame
2850 __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2851 __ addptr(rsp, rcx);
2852
2853 // sp should be pointing at the return address to the caller (3)
2854
2855 // Pick up the initial fp we should save
2856 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
2857 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
2858
2859 #ifdef ASSERT
2860 // Compilers generate code that bang the stack by as much as the
2861 // interpreter would need. So this stack banging should never
2862 // trigger a fault. Verify that it does not on non product builds.
2863 if (UseStackBanging) {
2864 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2865 __ bang_stack_size(rbx, rcx);
2866 }
2867 #endif
2868
2869 // Load array of frame pcs into ECX
2870 __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2871
2872 __ pop(rsi); // trash the pc
2873
2874 // Load array of frame sizes into ESI
2875 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2876
2877 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2878
2879 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2880 __ movl(counter, rbx);
2881
2882 // Now adjust the caller's stack to make up for the extra locals
2883 // but record the original sp so that we can save it in the skeletal interpreter
2884 // frame and the stack walking of interpreter_sender will get the unextended sp
2885 // value and not the "real" sp value.
2886
2887 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2888 __ movptr(sp_temp, rsp);
2889 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2890 __ subptr(rsp, rbx);
2891
2892 // Push interpreter frames in a loop
2893 Label loop;
2894 __ bind(loop);
2895 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2896 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
2897 __ pushptr(Address(rcx, 0)); // save return address
2898 __ enter(); // save old & set new rbp,
2899 __ subptr(rsp, rbx); // Prolog!
2900 __ movptr(rbx, sp_temp); // sender's sp
2901 // This value is corrected by layout_activation_impl
2902 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD );
2903 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2904 __ movptr(sp_temp, rsp); // pass to next frame
2905 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2906 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2907 __ decrementl(counter); // decrement counter
2908 __ jcc(Assembler::notZero, loop);
2909 __ pushptr(Address(rcx, 0)); // save final return address
2910
2911 // Re-push self-frame
2912 __ enter(); // save old & set new rbp,
2913 __ subptr(rsp, (framesize-2) * wordSize); // Prolog!
2914
2915
2916 // set last_Java_sp, last_Java_fp
2917 __ get_thread(rdi);
2918 __ set_last_Java_frame(rdi, noreg, rbp, NULL);
2919
2920 // Call C code. Need thread but NOT official VM entry
2921 // crud. We cannot block on this call, no GC can happen. Call should
2922 // restore return values to their stack-slots with the new SP.
2923 __ movptr(Address(rsp,arg0_off*wordSize),rdi);
2924 __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap);
2925 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2926 // Set an oopmap for the call site
2927 oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) );
2928
2929 __ get_thread(rdi);
2930 __ reset_last_Java_frame(rdi, true);
2931
2932 // Pop self-frame.
2933 __ leave(); // Epilog!
2934
2935 // Jump to interpreter
2936 __ ret(0);
2937
2938 // -------------
2939 // make sure all code is generated
2940 masm->flush();
2941
2942 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize);
2943 }
2944 #endif // COMPILER2
2945
2946 //------------------------------generate_handler_blob------
2947 //
2948 // Generate a special Compile2Runtime blob that saves all registers,
2949 // setup oopmap, and calls safepoint code to stop the compiled code for
2950 // a safepoint.
2951 //
2952 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
2953
2954 // Account for thread arg in our frame
2955 const int additional_words = 1;
2956 int frame_size_in_words;
2957
2958 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
2959
2960 ResourceMark rm;
2961 OopMapSet *oop_maps = new OopMapSet();
2962 OopMap* map;
2963
2964 // allocate space for the code
2965 // setup code generation tools
2966 CodeBuffer buffer("handler_blob", 1024, 512);
2967 MacroAssembler* masm = new MacroAssembler(&buffer);
2968
2969 const Register java_thread = rdi; // callee-saved for VC++
2970 address start = __ pc();
2971 address call_pc = NULL;
2972 bool cause_return = (poll_type == POLL_AT_RETURN);
2973 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP);
2974
2975 if (UseRTMLocking) {
2976 // Abort RTM transaction before calling runtime
2977 // because critical section will be large and will be
2978 // aborted anyway. Also nmethod could be deoptimized.
2979 __ xabort(0);
2980 }
2981
2982 // If cause_return is true we are at a poll_return and there is
2983 // the return address on the stack to the caller on the nmethod
2984 // that is safepoint. We can leave this return on the stack and
2985 // effectively complete the return and safepoint in the caller.
2986 // Otherwise we push space for a return address that the safepoint
2987 // handler will install later to make the stack walking sensible.
2988 if (!cause_return)
2989 __ push(rbx); // Make room for return address (or push it again)
2990
2991 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false, save_vectors);
2992
2993 // The following is basically a call_VM. However, we need the precise
2994 // address of the call in order to generate an oopmap. Hence, we do all the
2995 // work ourselves.
2996
2997 // Push thread argument and setup last_Java_sp
2998 __ get_thread(java_thread);
2999 __ push(java_thread);
3000 __ set_last_Java_frame(java_thread, noreg, noreg, NULL);
3001
3002 // if this was not a poll_return then we need to correct the return address now.
3003 if (!cause_return) {
3004 __ movptr(rax, Address(java_thread, JavaThread::saved_exception_pc_offset()));
3005 __ movptr(Address(rbp, wordSize), rax);
3006 }
3007
3008 // do the call
3009 __ call(RuntimeAddress(call_ptr));
3010
3011 // Set an oopmap for the call site. This oopmap will map all
3012 // oop-registers and debug-info registers as callee-saved. This
3013 // will allow deoptimization at this safepoint to find all possible
3014 // debug-info recordings, as well as let GC find all oops.
3015
3016 oop_maps->add_gc_map( __ pc() - start, map);
3017
3018 // Discard arg
3019 __ pop(rcx);
3020
3021 Label noException;
3022
3023 // Clear last_Java_sp again
3024 __ get_thread(java_thread);
3025 __ reset_last_Java_frame(java_thread, false);
3026
3027 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3028 __ jcc(Assembler::equal, noException);
3029
3030 // Exception pending
3031 RegisterSaver::restore_live_registers(masm, save_vectors);
3032
3033 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3034
3035 __ bind(noException);
3036
3037 // Normal exit, register restoring and exit
3038 RegisterSaver::restore_live_registers(masm, save_vectors);
3039
3040 __ ret(0);
3041
3042 // make sure all code is generated
3043 masm->flush();
3044
3045 // Fill-out other meta info
3046 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
3047 }
3048
3049 //
3050 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
3051 //
3052 // Generate a stub that calls into vm to find out the proper destination
3053 // of a java call. All the argument registers are live at this point
3054 // but since this is generic code we don't know what they are and the caller
3055 // must do any gc of the args.
3056 //
3057 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
3058 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3059
3060 // allocate space for the code
3061 ResourceMark rm;
3062
3063 CodeBuffer buffer(name, 1000, 512);
3064 MacroAssembler* masm = new MacroAssembler(&buffer);
3065
3066 int frame_size_words;
3067 enum frame_layout {
3068 thread_off,
3069 extra_words };
3070
3071 OopMapSet *oop_maps = new OopMapSet();
3072 OopMap* map = NULL;
3073
3074 int start = __ offset();
3075
3076 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words);
3077
3078 int frame_complete = __ offset();
3079
3080 const Register thread = rdi;
3081 __ get_thread(rdi);
3082
3083 __ push(thread);
3084 __ set_last_Java_frame(thread, noreg, rbp, NULL);
3085
3086 __ call(RuntimeAddress(destination));
3087
3088
3089 // Set an oopmap for the call site.
3090 // We need this not only for callee-saved registers, but also for volatile
3091 // registers that the compiler might be keeping live across a safepoint.
3092
3093 oop_maps->add_gc_map( __ offset() - start, map);
3094
3095 // rax, contains the address we are going to jump to assuming no exception got installed
3096
3097 __ addptr(rsp, wordSize);
3098
3099 // clear last_Java_sp
3100 __ reset_last_Java_frame(thread, true);
3101 // check for pending exceptions
3102 Label pending;
3103 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3104 __ jcc(Assembler::notEqual, pending);
3105
3106 // get the returned Method*
3107 __ get_vm_result_2(rbx, thread);
3108 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx);
3109
3110 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax);
3111
3112 RegisterSaver::restore_live_registers(masm);
3113
3114 // We are back the the original state on entry and ready to go.
3115
3116 __ jmp(rax);
3117
3118 // Pending exception after the safepoint
3119
3120 __ bind(pending);
3121
3122 RegisterSaver::restore_live_registers(masm);
3123
3124 // exception pending => remove activation and forward to exception handler
3125
3126 __ get_thread(thread);
3127 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
3128 __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
3129 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3130
3131 // -------------
3132 // make sure all code is generated
3133 masm->flush();
3134
3135 // return the blob
3136 // frame_size_words or bytes??
3137 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true);
3138 }