186 }
187 #endif // COMPILER2
188 if ((state == ftos && UseSSE < 1) || (state == dtos && UseSSE < 2)) {
189 __ MacroAssembler::verify_FPU(1, "generate_return_entry_for compiled");
190 } else {
191 __ MacroAssembler::verify_FPU(0, "generate_return_entry_for compiled");
192 }
193
194 if (state == ftos) {
195 __ MacroAssembler::verify_FPU(UseSSE >= 1 ? 0 : 1, "generate_return_entry_for in interpreter");
196 } else if (state == dtos) {
197 __ MacroAssembler::verify_FPU(UseSSE >= 2 ? 0 : 1, "generate_return_entry_for in interpreter");
198 }
199 #endif // _LP64
200
201 // Restore stack bottom in case i2c adjusted stack
202 __ movptr(rsp, Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize));
203 // and NULL it as marker that esp is now tos until next java call
204 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD);
205
206 __ restore_bcp();
207 __ restore_locals();
208
209 if (state == atos) {
210 Register mdp = rbx;
211 Register tmp = rcx;
212 __ profile_return_type(mdp, rax, tmp);
213 }
214
215 const Register cache = rbx;
216 const Register index = rcx;
217 __ get_cache_and_index_at_bcp(cache, index, 1, index_size);
218
219 const Register flags = cache;
220 __ movl(flags, Address(cache, index, Address::times_ptr, ConstantPoolCache::base_offset() + ConstantPoolCacheEntry::flags_offset()));
221 __ andl(flags, ConstantPoolCacheEntry::parameter_size_mask);
222 __ lea(rsp, Address(rsp, flags, Interpreter::stackElementScale()));
223
224 const Register java_thread = NOT_LP64(rcx) LP64_ONLY(r15_thread);
225 if (JvmtiExport::can_pop_frame()) {
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186 }
187 #endif // COMPILER2
188 if ((state == ftos && UseSSE < 1) || (state == dtos && UseSSE < 2)) {
189 __ MacroAssembler::verify_FPU(1, "generate_return_entry_for compiled");
190 } else {
191 __ MacroAssembler::verify_FPU(0, "generate_return_entry_for compiled");
192 }
193
194 if (state == ftos) {
195 __ MacroAssembler::verify_FPU(UseSSE >= 1 ? 0 : 1, "generate_return_entry_for in interpreter");
196 } else if (state == dtos) {
197 __ MacroAssembler::verify_FPU(UseSSE >= 2 ? 0 : 1, "generate_return_entry_for in interpreter");
198 }
199 #endif // _LP64
200
201 // Restore stack bottom in case i2c adjusted stack
202 __ movptr(rsp, Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize));
203 // and NULL it as marker that esp is now tos until next java call
204 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD);
205
206 if (state == qtos && ValueTypeReturnedAsFields) {
207 // A value type is being returned. If fields are in registers we
208 // need to allocate a value type instance and initialize it with
209 // the value of the fields.
210 __ super_call_VM_leaf(StubRoutines::store_value_type_fields_to_buf());
211 }
212
213 __ restore_bcp();
214 __ restore_locals();
215
216 if (state == atos) {
217 Register mdp = rbx;
218 Register tmp = rcx;
219 __ profile_return_type(mdp, rax, tmp);
220 }
221
222 const Register cache = rbx;
223 const Register index = rcx;
224 __ get_cache_and_index_at_bcp(cache, index, 1, index_size);
225
226 const Register flags = cache;
227 __ movl(flags, Address(cache, index, Address::times_ptr, ConstantPoolCache::base_offset() + ConstantPoolCacheEntry::flags_offset()));
228 __ andl(flags, ConstantPoolCacheEntry::parameter_size_mask);
229 __ lea(rsp, Address(rsp, flags, Interpreter::stackElementScale()));
230
231 const Register java_thread = NOT_LP64(rcx) LP64_ONLY(r15_thread);
232 if (JvmtiExport::can_pop_frame()) {
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