src/hotspot/cpu/x86/macroAssembler_x86.cpp

rev 50307 : [mq]: cont

*** 991,1000 ****
--- 991,1020 ----
    if (target % modulus != 0) {
      nop(modulus - (target % modulus));
    }
  }
  
+ void MacroAssembler::push_f(XMMRegister r) {
+   subptr(rsp, wordSize);
+   movflt(Address(rsp, 0), r);
+ }
+ 
+ void MacroAssembler::pop_f(XMMRegister r) {
+   movflt(r, Address(rsp, 0));
+   addptr(rsp, wordSize);
+ }
+ 
+ void MacroAssembler::push_d(XMMRegister r) {
+   subptr(rsp, 2 * wordSize);
+   movdbl(Address(rsp, 0), r);
+ }
+ 
+ void MacroAssembler::pop_d(XMMRegister r) {
+   movdbl(r, Address(rsp, 0));
+   addptr(rsp, 2 * Interpreter::stackElementSize);
+ }
+ 
  void MacroAssembler::andpd(XMMRegister dst, AddressLiteral src) {
    // Used in sign-masking with aligned address.
    assert((UseAVX > 0) || (((intptr_t)src.target() & 15) == 0), "SSE mode requires address alignment 16 bytes");
    if (reachable(src)) {
      Assembler::andpd(dst, as_Address(src));
*** 3684,3693 ****
--- 3704,3724 ----
    fxrstor(Address(rsp, 0));
  #endif
    addptr(rsp, FPUStateSizeInWords * wordSize);
  }
  
+ #ifdef ASSERT
+ void MacroAssembler::stop_if_in_cont(Register cont, const char* name) {
+   Label no_cont;
+   movptr(cont, Address(r15_thread, in_bytes(JavaThread::continuation_offset())));
+   testl(cont, cont);
+   jcc(Assembler::zero, no_cont);
+   stop(name);
+   bind(no_cont);
+ }
+ #endif
+ 
  void MacroAssembler::pop_IU_state() {
    popa();
    LP64_ONLY(addq(rsp, 8));
    popf();
  }