1 /*
2 * Copyright (c) 2000, 2017, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_InstructionPrinter.hpp"
27 #include "c1/c1_LIR.hpp"
28 #include "c1/c1_LIRAssembler.hpp"
29 #include "c1/c1_ValueStack.hpp"
30 #include "ci/ciInstance.hpp"
31 #include "runtime/sharedRuntime.hpp"
32
33 Register LIR_OprDesc::as_register() const {
34 return FrameMap::cpu_rnr2reg(cpu_regnr());
35 }
36
37 Register LIR_OprDesc::as_register_lo() const {
38 return FrameMap::cpu_rnr2reg(cpu_regnrLo());
39 }
40
41 Register LIR_OprDesc::as_register_hi() const {
42 return FrameMap::cpu_rnr2reg(cpu_regnrHi());
43 }
44
45 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal();
46
47 LIR_Opr LIR_OprFact::value_type(ValueType* type) {
48 ValueTag tag = type->tag();
49 switch (tag) {
50 case metaDataTag : {
51 ClassConstant* c = type->as_ClassConstant();
52 if (c != NULL && !c->value()->is_loaded()) {
53 return LIR_OprFact::metadataConst(NULL);
54 } else if (c != NULL) {
55 return LIR_OprFact::metadataConst(c->value()->constant_encoding());
56 } else {
57 MethodConstant* m = type->as_MethodConstant();
58 assert (m != NULL, "not a class or a method?");
59 return LIR_OprFact::metadataConst(m->value()->constant_encoding());
60 }
61 }
62 case objectTag : {
63 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding());
64 }
65 case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value());
66 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value());
67 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value());
68 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value());
69 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value());
70 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
71 }
72 }
73
74
75 LIR_Opr LIR_OprFact::dummy_value_type(ValueType* type) {
76 switch (type->tag()) {
77 case objectTag: return LIR_OprFact::oopConst(NULL);
78 case addressTag:return LIR_OprFact::addressConst(0);
79 case intTag: return LIR_OprFact::intConst(0);
80 case floatTag: return LIR_OprFact::floatConst(0.0);
81 case longTag: return LIR_OprFact::longConst(0);
82 case doubleTag: return LIR_OprFact::doubleConst(0.0);
83 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1);
84 }
85 return illegalOpr;
86 }
87
88
89
90 //---------------------------------------------------
91
92
93 LIR_Address::Scale LIR_Address::scale(BasicType type) {
94 int elem_size = type2aelembytes(type);
95 switch (elem_size) {
96 case 1: return LIR_Address::times_1;
97 case 2: return LIR_Address::times_2;
98 case 4: return LIR_Address::times_4;
99 case 8: return LIR_Address::times_8;
100 }
101 ShouldNotReachHere();
102 return LIR_Address::times_1;
103 }
104
105 //---------------------------------------------------
106
107 char LIR_OprDesc::type_char(BasicType t) {
108 switch (t) {
109 case T_ARRAY:
110 t = T_OBJECT;
111 case T_BOOLEAN:
112 case T_CHAR:
113 case T_FLOAT:
114 case T_DOUBLE:
115 case T_BYTE:
116 case T_SHORT:
117 case T_INT:
118 case T_LONG:
119 case T_OBJECT:
120 case T_ADDRESS:
121 case T_VOID:
122 return ::type2char(t);
123 case T_METADATA:
124 return 'M';
125 case T_ILLEGAL:
126 return '?';
127
128 default:
129 ShouldNotReachHere();
130 return '?';
131 }
132 }
133
134 #ifndef PRODUCT
135 void LIR_OprDesc::validate_type() const {
136
137 #ifdef ASSERT
138 if (!is_pointer() && !is_illegal()) {
139 OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160
140 switch (as_BasicType(type_field())) {
141 case T_LONG:
142 assert((kindfield == cpu_register || kindfield == stack_value) &&
143 size_field() == double_size, "must match");
144 break;
145 case T_FLOAT:
146 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
147 assert((kindfield == fpu_register || kindfield == stack_value
148 ARM_ONLY(|| kindfield == cpu_register)
149 PPC32_ONLY(|| kindfield == cpu_register) ) &&
150 size_field() == single_size, "must match");
151 break;
152 case T_DOUBLE:
153 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI)
154 assert((kindfield == fpu_register || kindfield == stack_value
155 ARM_ONLY(|| kindfield == cpu_register)
156 PPC32_ONLY(|| kindfield == cpu_register) ) &&
157 size_field() == double_size, "must match");
158 break;
159 case T_BOOLEAN:
160 case T_CHAR:
161 case T_BYTE:
162 case T_SHORT:
163 case T_INT:
164 case T_ADDRESS:
165 case T_OBJECT:
166 case T_METADATA:
167 case T_ARRAY:
168 assert((kindfield == cpu_register || kindfield == stack_value) &&
169 size_field() == single_size, "must match");
170 break;
171
172 case T_ILLEGAL:
173 // XXX TKR also means unknown right now
174 // assert(is_illegal(), "must match");
175 break;
176
177 default:
178 ShouldNotReachHere();
179 }
180 }
181 #endif
182
183 }
184 #endif // PRODUCT
185
186
187 bool LIR_OprDesc::is_oop() const {
188 if (is_pointer()) {
189 return pointer()->is_oop_pointer();
190 } else {
191 OprType t= type_field();
192 assert(t != unknown_type, "not set");
193 return t == object_type;
194 }
195 }
196
197
198
199 void LIR_Op2::verify() const {
200 #ifdef ASSERT
201 switch (code()) {
202 case lir_cmove:
203 case lir_xchg:
204 break;
205
206 default:
207 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(),
208 "can't produce oops from arith");
209 }
210
211 if (TwoOperandLIRForm) {
212
213 #ifdef ASSERT
214 bool threeOperandForm = false;
215 #ifdef S390
216 // There are 3 operand shifts on S390 (see LIR_Assembler::shift_op()).
217 threeOperandForm =
218 code() == lir_shl ||
219 ((code() == lir_shr || code() == lir_ushr) && (result_opr()->is_double_cpu() || in_opr1()->type() == T_OBJECT));
220 #endif
221 #endif
222
223 switch (code()) {
224 case lir_add:
225 case lir_sub:
226 case lir_mul:
227 case lir_mul_strictfp:
228 case lir_div:
229 case lir_div_strictfp:
230 case lir_rem:
231 case lir_logic_and:
232 case lir_logic_or:
233 case lir_logic_xor:
234 case lir_shl:
235 case lir_shr:
236 assert(in_opr1() == result_opr() || threeOperandForm, "opr1 and result must match");
237 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
238 break;
239
240 // special handling for lir_ushr because of write barriers
241 case lir_ushr:
242 assert(in_opr1() == result_opr() || in_opr2()->is_constant() || threeOperandForm, "opr1 and result must match or shift count is constant");
243 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid");
244 break;
245
246 default:
247 break;
248 }
249 }
250 #endif
251 }
252
253
254 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block)
255 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
256 , _cond(cond)
257 , _type(type)
258 , _label(block->label())
259 , _block(block)
260 , _ublock(NULL)
261 , _stub(NULL) {
262 }
263
264 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) :
265 LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
266 , _cond(cond)
267 , _type(type)
268 , _label(stub->entry())
269 , _block(NULL)
270 , _ublock(NULL)
271 , _stub(stub) {
272 }
273
274 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock)
275 : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL)
276 , _cond(cond)
277 , _type(type)
278 , _label(block->label())
279 , _block(block)
280 , _ublock(ublock)
281 , _stub(NULL)
282 {
283 }
284
285 void LIR_OpBranch::change_block(BlockBegin* b) {
286 assert(_block != NULL, "must have old block");
287 assert(_block->label() == label(), "must be equal");
288
289 _block = b;
290 _label = b->label();
291 }
292
293 void LIR_OpBranch::change_ublock(BlockBegin* b) {
294 assert(_ublock != NULL, "must have old block");
295 _ublock = b;
296 }
297
298 void LIR_OpBranch::negate_cond() {
299 switch (_cond) {
300 case lir_cond_equal: _cond = lir_cond_notEqual; break;
301 case lir_cond_notEqual: _cond = lir_cond_equal; break;
302 case lir_cond_less: _cond = lir_cond_greaterEqual; break;
303 case lir_cond_lessEqual: _cond = lir_cond_greater; break;
304 case lir_cond_greaterEqual: _cond = lir_cond_less; break;
305 case lir_cond_greater: _cond = lir_cond_lessEqual; break;
306 default: ShouldNotReachHere();
307 }
308 }
309
310
311 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
312 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
313 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch,
314 CodeStub* stub)
315
316 : LIR_Op(code, result, NULL)
317 , _object(object)
318 , _array(LIR_OprFact::illegalOpr)
319 , _klass(klass)
320 , _tmp1(tmp1)
321 , _tmp2(tmp2)
322 , _tmp3(tmp3)
323 , _fast_check(fast_check)
324 , _stub(stub)
325 , _info_for_patch(info_for_patch)
326 , _info_for_exception(info_for_exception)
327 , _profiled_method(NULL)
328 , _profiled_bci(-1)
329 , _should_profile(false)
330 {
331 if (code == lir_checkcast) {
332 assert(info_for_exception != NULL, "checkcast throws exceptions");
333 } else if (code == lir_instanceof) {
334 assert(info_for_exception == NULL, "instanceof throws no exceptions");
335 } else {
336 ShouldNotReachHere();
337 }
338 }
339
340
341
342 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception)
343 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL)
344 , _object(object)
345 , _array(array)
346 , _klass(NULL)
347 , _tmp1(tmp1)
348 , _tmp2(tmp2)
349 , _tmp3(tmp3)
350 , _fast_check(false)
351 , _stub(NULL)
352 , _info_for_patch(NULL)
353 , _info_for_exception(info_for_exception)
354 , _profiled_method(NULL)
355 , _profiled_bci(-1)
356 , _should_profile(false)
357 {
358 if (code == lir_store_check) {
359 _stub = new ArrayStoreExceptionStub(object, info_for_exception);
360 assert(info_for_exception != NULL, "store_check throws exceptions");
361 } else {
362 ShouldNotReachHere();
363 }
364 }
365
366
367 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length,
368 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info)
369 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info)
370 , _tmp(tmp)
371 , _src(src)
372 , _src_pos(src_pos)
373 , _dst(dst)
374 , _dst_pos(dst_pos)
375 , _flags(flags)
376 , _expected_type(expected_type)
377 , _length(length) {
378 _stub = new ArrayCopyStub(this);
379 }
380
381 LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res)
382 : LIR_Op(lir_updatecrc32, res, NULL)
383 , _crc(crc)
384 , _val(val) {
385 }
386
387 //-------------------verify--------------------------
388
389 void LIR_Op1::verify() const {
390 switch(code()) {
391 case lir_move:
392 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be");
393 break;
394 case lir_null_check:
395 assert(in_opr()->is_register(), "must be");
396 break;
397 case lir_return:
398 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be");
399 break;
400 default:
401 break;
402 }
403 }
404
405 void LIR_OpRTCall::verify() const {
406 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function");
407 }
408
409 //-------------------visits--------------------------
410
411 // complete rework of LIR instruction visitor.
412 // The virtual call for each instruction type is replaced by a big
413 // switch that adds the operands for each instruction
414
415 void LIR_OpVisitState::visit(LIR_Op* op) {
416 // copy information from the LIR_Op
417 reset();
418 set_op(op);
419
420 switch (op->code()) {
421
422 // LIR_Op0
423 case lir_word_align: // result and info always invalid
424 case lir_backwardbranch_target: // result and info always invalid
425 case lir_build_frame: // result and info always invalid
426 case lir_fpop_raw: // result and info always invalid
427 case lir_24bit_FPU: // result and info always invalid
428 case lir_reset_FPU: // result and info always invalid
429 case lir_breakpoint: // result and info always invalid
430 case lir_membar: // result and info always invalid
431 case lir_membar_acquire: // result and info always invalid
432 case lir_membar_release: // result and info always invalid
433 case lir_membar_loadload: // result and info always invalid
434 case lir_membar_storestore: // result and info always invalid
435 case lir_membar_loadstore: // result and info always invalid
436 case lir_membar_storeload: // result and info always invalid
437 case lir_on_spin_wait:
438 {
439 assert(op->as_Op0() != NULL, "must be");
440 assert(op->_info == NULL, "info not used by this instruction");
441 assert(op->_result->is_illegal(), "not used");
442 break;
443 }
444
445 case lir_nop: // may have info, result always invalid
446 case lir_std_entry: // may have result, info always invalid
447 case lir_osr_entry: // may have result, info always invalid
448 case lir_get_thread: // may have result, info always invalid
449 {
450 assert(op->as_Op0() != NULL, "must be");
451 if (op->_info != NULL) do_info(op->_info);
452 if (op->_result->is_valid()) do_output(op->_result);
453 break;
454 }
455
456 case lir_getfp: // result always valid
457 case lir_getsp: // result always valid
458 {
459 assert(op->as_Op0() != NULL, "must be");
460 if (op->_info) do_info(op->_info);
461 if (op->_result->is_valid()) do_output(op->_result);
462 break;
463 }
464
465
466
467 // LIR_OpLabel
468 case lir_label: // result and info always invalid
469 {
470 assert(op->as_OpLabel() != NULL, "must be");
471 assert(op->_info == NULL, "info not used by this instruction");
472 assert(op->_result->is_illegal(), "not used");
473 break;
474 }
475
476
477 // LIR_Op1
478 case lir_fxch: // input always valid, result and info always invalid
479 case lir_fld: // input always valid, result and info always invalid
480 case lir_ffree: // input always valid, result and info always invalid
481 case lir_push: // input always valid, result and info always invalid
482 case lir_pop: // input always valid, result and info always invalid
483 case lir_return: // input always valid, result and info always invalid
484 case lir_leal: // input and result always valid, info always invalid
485 case lir_neg: // input and result always valid, info always invalid
486 case lir_monaddr: // input and result always valid, info always invalid
487 case lir_null_check: // input and info always valid, result always invalid
488 case lir_move: // input and result always valid, may have info
489 case lir_pack64: // input and result always valid
490 case lir_unpack64: // input and result always valid
491 {
492 assert(op->as_Op1() != NULL, "must be");
493 LIR_Op1* op1 = (LIR_Op1*)op;
494
495 if (op1->_info) do_info(op1->_info);
496 if (op1->_opr->is_valid()) do_input(op1->_opr);
497 if (op1->_result->is_valid()) do_output(op1->_result);
498
499 break;
500 }
501
502 case lir_safepoint:
503 {
504 assert(op->as_Op1() != NULL, "must be");
505 LIR_Op1* op1 = (LIR_Op1*)op;
506
507 assert(op1->_info != NULL, ""); do_info(op1->_info);
508 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register
509 assert(op1->_result->is_illegal(), "safepoint does not produce value");
510
511 break;
512 }
513
514 // LIR_OpConvert;
515 case lir_convert: // input and result always valid, info always invalid
516 {
517 assert(op->as_OpConvert() != NULL, "must be");
518 LIR_OpConvert* opConvert = (LIR_OpConvert*)op;
519
520 assert(opConvert->_info == NULL, "must be");
521 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr);
522 if (opConvert->_result->is_valid()) do_output(opConvert->_result);
523 #ifdef PPC32
524 if (opConvert->_tmp1->is_valid()) do_temp(opConvert->_tmp1);
525 if (opConvert->_tmp2->is_valid()) do_temp(opConvert->_tmp2);
526 #endif
527 do_stub(opConvert->_stub);
528
529 break;
530 }
531
532 // LIR_OpBranch;
533 case lir_branch: // may have info, input and result register always invalid
534 case lir_cond_float_branch: // may have info, input and result register always invalid
535 {
536 assert(op->as_OpBranch() != NULL, "must be");
537 LIR_OpBranch* opBranch = (LIR_OpBranch*)op;
538
539 if (opBranch->_info != NULL) do_info(opBranch->_info);
540 assert(opBranch->_result->is_illegal(), "not used");
541 if (opBranch->_stub != NULL) opBranch->stub()->visit(this);
542
543 break;
544 }
545
546
547 // LIR_OpAllocObj
548 case lir_alloc_object:
549 {
550 assert(op->as_OpAllocObj() != NULL, "must be");
551 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op;
552
553 if (opAllocObj->_info) do_info(opAllocObj->_info);
554 if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr);
555 do_temp(opAllocObj->_opr);
556 }
557 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1);
558 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2);
559 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3);
560 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4);
561 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result);
562 do_stub(opAllocObj->_stub);
563 break;
564 }
565
566
567 // LIR_OpRoundFP;
568 case lir_roundfp: {
569 assert(op->as_OpRoundFP() != NULL, "must be");
570 LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op;
571
572 assert(op->_info == NULL, "info not used by this instruction");
573 assert(opRoundFP->_tmp->is_illegal(), "not used");
574 do_input(opRoundFP->_opr);
575 do_output(opRoundFP->_result);
576
577 break;
578 }
579
580
581 // LIR_Op2
582 case lir_cmp:
583 case lir_cmp_l2i:
584 case lir_ucmp_fd2i:
585 case lir_cmp_fd2i:
586 case lir_add:
587 case lir_sub:
588 case lir_mul:
589 case lir_div:
590 case lir_rem:
591 case lir_sqrt:
592 case lir_abs:
593 case lir_logic_and:
594 case lir_logic_or:
595 case lir_logic_xor:
596 case lir_shl:
597 case lir_shr:
598 case lir_ushr:
599 case lir_xadd:
600 case lir_xchg:
601 case lir_assert:
602 {
603 assert(op->as_Op2() != NULL, "must be");
604 LIR_Op2* op2 = (LIR_Op2*)op;
605 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
606 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
607
608 if (op2->_info) do_info(op2->_info);
609 if (op2->_opr1->is_valid()) do_input(op2->_opr1);
610 if (op2->_opr2->is_valid()) do_input(op2->_opr2);
611 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
612 if (op2->_result->is_valid()) do_output(op2->_result);
613 if (op->code() == lir_xchg || op->code() == lir_xadd) {
614 // on ARM and PPC, return value is loaded first so could
615 // destroy inputs. On other platforms that implement those
616 // (x86, sparc), the extra constrainsts are harmless.
617 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
618 if (op2->_opr2->is_valid()) do_temp(op2->_opr2);
619 }
620
621 break;
622 }
623
624 // special handling for cmove: right input operand must not be equal
625 // to the result operand, otherwise the backend fails
626 case lir_cmove:
627 {
628 assert(op->as_Op2() != NULL, "must be");
629 LIR_Op2* op2 = (LIR_Op2*)op;
630
631 assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() &&
632 op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
633 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used");
634
635 do_input(op2->_opr1);
636 do_input(op2->_opr2);
637 do_temp(op2->_opr2);
638 do_output(op2->_result);
639
640 break;
641 }
642
643 // vspecial handling for strict operations: register input operands
644 // as temp to guarantee that they do not overlap with other
645 // registers
646 case lir_mul_strictfp:
647 case lir_div_strictfp:
648 {
649 assert(op->as_Op2() != NULL, "must be");
650 LIR_Op2* op2 = (LIR_Op2*)op;
651
652 assert(op2->_info == NULL, "not used");
653 assert(op2->_opr1->is_valid(), "used");
654 assert(op2->_opr2->is_valid(), "used");
655 assert(op2->_result->is_valid(), "used");
656 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
657 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
658
659 do_input(op2->_opr1); do_temp(op2->_opr1);
660 do_input(op2->_opr2); do_temp(op2->_opr2);
661 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1);
662 do_output(op2->_result);
663
664 break;
665 }
666
667 case lir_throw: {
668 assert(op->as_Op2() != NULL, "must be");
669 LIR_Op2* op2 = (LIR_Op2*)op;
670
671 if (op2->_info) do_info(op2->_info);
672 if (op2->_opr1->is_valid()) do_temp(op2->_opr1);
673 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter
674 assert(op2->_result->is_illegal(), "no result");
675 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() &&
676 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used");
677
678 break;
679 }
680
681 case lir_unwind: {
682 assert(op->as_Op1() != NULL, "must be");
683 LIR_Op1* op1 = (LIR_Op1*)op;
684
685 assert(op1->_info == NULL, "no info");
686 assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr);
687 assert(op1->_result->is_illegal(), "no result");
688
689 break;
690 }
691
692 // LIR_Op3
693 case lir_idiv:
694 case lir_irem: {
695 assert(op->as_Op3() != NULL, "must be");
696 LIR_Op3* op3= (LIR_Op3*)op;
697
698 if (op3->_info) do_info(op3->_info);
699 if (op3->_opr1->is_valid()) do_input(op3->_opr1);
700
701 // second operand is input and temp, so ensure that second operand
702 // and third operand get not the same register
703 if (op3->_opr2->is_valid()) do_input(op3->_opr2);
704 if (op3->_opr2->is_valid()) do_temp(op3->_opr2);
705 if (op3->_opr3->is_valid()) do_temp(op3->_opr3);
706
707 if (op3->_result->is_valid()) do_output(op3->_result);
708
709 break;
710 }
711
712 case lir_fmad:
713 case lir_fmaf: {
714 assert(op->as_Op3() != NULL, "must be");
715 LIR_Op3* op3= (LIR_Op3*)op;
716 assert(op3->_info == NULL, "no info");
717 do_input(op3->_opr1);
718 do_input(op3->_opr2);
719 do_input(op3->_opr3);
720 do_output(op3->_result);
721 break;
722 }
723
724 // LIR_OpJavaCall
725 case lir_static_call:
726 case lir_optvirtual_call:
727 case lir_icvirtual_call:
728 case lir_virtual_call:
729 case lir_dynamic_call: {
730 LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall();
731 assert(opJavaCall != NULL, "must be");
732
733 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver);
734
735 // only visit register parameters
736 int n = opJavaCall->_arguments->length();
737 for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) {
738 if (!opJavaCall->_arguments->at(i)->is_pointer()) {
739 do_input(*opJavaCall->_arguments->adr_at(i));
740 }
741 }
742
743 if (opJavaCall->_info) do_info(opJavaCall->_info);
744 if (FrameMap::method_handle_invoke_SP_save_opr() != LIR_OprFact::illegalOpr &&
745 opJavaCall->is_method_handle_invoke()) {
746 opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr();
747 do_temp(opJavaCall->_method_handle_invoke_SP_save_opr);
748 }
749 do_call();
750 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result);
751
752 break;
753 }
754
755
756 // LIR_OpRTCall
757 case lir_rtcall: {
758 assert(op->as_OpRTCall() != NULL, "must be");
759 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op;
760
761 // only visit register parameters
762 int n = opRTCall->_arguments->length();
763 for (int i = 0; i < n; i++) {
764 if (!opRTCall->_arguments->at(i)->is_pointer()) {
765 do_input(*opRTCall->_arguments->adr_at(i));
766 }
767 }
768 if (opRTCall->_info) do_info(opRTCall->_info);
769 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp);
770 do_call();
771 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result);
772
773 break;
774 }
775
776
777 // LIR_OpArrayCopy
778 case lir_arraycopy: {
779 assert(op->as_OpArrayCopy() != NULL, "must be");
780 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op;
781
782 assert(opArrayCopy->_result->is_illegal(), "unused");
783 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src);
784 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos);
785 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst);
786 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos);
787 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length);
788 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp);
789 if (opArrayCopy->_info) do_info(opArrayCopy->_info);
790
791 // the implementation of arraycopy always has a call into the runtime
792 do_call();
793
794 break;
795 }
796
797
798 // LIR_OpUpdateCRC32
799 case lir_updatecrc32: {
800 assert(op->as_OpUpdateCRC32() != NULL, "must be");
801 LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op;
802
803 assert(opUp->_crc->is_valid(), "used"); do_input(opUp->_crc); do_temp(opUp->_crc);
804 assert(opUp->_val->is_valid(), "used"); do_input(opUp->_val); do_temp(opUp->_val);
805 assert(opUp->_result->is_valid(), "used"); do_output(opUp->_result);
806 assert(opUp->_info == NULL, "no info for LIR_OpUpdateCRC32");
807
808 break;
809 }
810
811
812 // LIR_OpLock
813 case lir_lock:
814 case lir_unlock: {
815 assert(op->as_OpLock() != NULL, "must be");
816 LIR_OpLock* opLock = (LIR_OpLock*)op;
817
818 if (opLock->_info) do_info(opLock->_info);
819
820 // TODO: check if these operands really have to be temp
821 // (or if input is sufficient). This may have influence on the oop map!
822 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock);
823 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr);
824 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj);
825
826 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch);
827 assert(opLock->_result->is_illegal(), "unused");
828
829 do_stub(opLock->_stub);
830
831 break;
832 }
833
834
835 // LIR_OpDelay
836 case lir_delay_slot: {
837 assert(op->as_OpDelay() != NULL, "must be");
838 LIR_OpDelay* opDelay = (LIR_OpDelay*)op;
839
840 visit(opDelay->delay_op());
841 break;
842 }
843
844 // LIR_OpTypeCheck
845 case lir_instanceof:
846 case lir_checkcast:
847 case lir_store_check: {
848 assert(op->as_OpTypeCheck() != NULL, "must be");
849 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op;
850
851 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception);
852 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch);
853 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object);
854 if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) {
855 do_temp(opTypeCheck->_object);
856 }
857 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array);
858 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1);
859 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2);
860 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3);
861 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result);
862 do_stub(opTypeCheck->_stub);
863 break;
864 }
865
866 // LIR_OpCompareAndSwap
867 case lir_cas_long:
868 case lir_cas_obj:
869 case lir_cas_int: {
870 assert(op->as_OpCompareAndSwap() != NULL, "must be");
871 LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op;
872
873 assert(opCompareAndSwap->_addr->is_valid(), "used");
874 assert(opCompareAndSwap->_cmp_value->is_valid(), "used");
875 assert(opCompareAndSwap->_new_value->is_valid(), "used");
876 if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info);
877 do_input(opCompareAndSwap->_addr);
878 do_temp(opCompareAndSwap->_addr);
879 do_input(opCompareAndSwap->_cmp_value);
880 do_temp(opCompareAndSwap->_cmp_value);
881 do_input(opCompareAndSwap->_new_value);
882 do_temp(opCompareAndSwap->_new_value);
883 if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1);
884 if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2);
885 if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result);
886
887 break;
888 }
889
890
891 // LIR_OpAllocArray;
892 case lir_alloc_array: {
893 assert(op->as_OpAllocArray() != NULL, "must be");
894 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op;
895
896 if (opAllocArray->_info) do_info(opAllocArray->_info);
897 if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass);
898 if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len);
899 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1);
900 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2);
901 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3);
902 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4);
903 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result);
904 do_stub(opAllocArray->_stub);
905 break;
906 }
907
908 // LIR_OpProfileCall:
909 case lir_profile_call: {
910 assert(op->as_OpProfileCall() != NULL, "must be");
911 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op;
912
913 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv);
914 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo);
915 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1);
916 break;
917 }
918
919 // LIR_OpProfileType:
920 case lir_profile_type: {
921 assert(op->as_OpProfileType() != NULL, "must be");
922 LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op;
923
924 do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp);
925 do_input(opProfileType->_obj);
926 do_temp(opProfileType->_tmp);
927 break;
928 }
929 default:
930 op->visit(this);
931 }
932 }
933
934 void LIR_Op::visit(LIR_OpVisitState* state) {
935 ShouldNotReachHere();
936 }
937
938 void LIR_OpVisitState::do_stub(CodeStub* stub) {
939 if (stub != NULL) {
940 stub->visit(this);
941 }
942 }
943
944 XHandlers* LIR_OpVisitState::all_xhandler() {
945 XHandlers* result = NULL;
946
947 int i;
948 for (i = 0; i < info_count(); i++) {
949 if (info_at(i)->exception_handlers() != NULL) {
950 result = info_at(i)->exception_handlers();
951 break;
952 }
953 }
954
955 #ifdef ASSERT
956 for (i = 0; i < info_count(); i++) {
957 assert(info_at(i)->exception_handlers() == NULL ||
958 info_at(i)->exception_handlers() == result,
959 "only one xhandler list allowed per LIR-operation");
960 }
961 #endif
962
963 if (result != NULL) {
964 return result;
965 } else {
966 return new XHandlers();
967 }
968
969 return result;
970 }
971
972
973 #ifdef ASSERT
974 bool LIR_OpVisitState::no_operands(LIR_Op* op) {
975 visit(op);
976
977 return opr_count(inputMode) == 0 &&
978 opr_count(outputMode) == 0 &&
979 opr_count(tempMode) == 0 &&
980 info_count() == 0 &&
981 !has_call() &&
982 !has_slow_case();
983 }
984 #endif
985
986 //---------------------------------------------------
987
988
989 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) {
990 masm->emit_call(this);
991 }
992
993 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) {
994 masm->emit_rtcall(this);
995 }
996
997 void LIR_OpLabel::emit_code(LIR_Assembler* masm) {
998 masm->emit_opLabel(this);
999 }
1000
1001 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) {
1002 masm->emit_arraycopy(this);
1003 masm->append_code_stub(stub());
1004 }
1005
1006 void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) {
1007 masm->emit_updatecrc32(this);
1008 }
1009
1010 void LIR_Op0::emit_code(LIR_Assembler* masm) {
1011 masm->emit_op0(this);
1012 }
1013
1014 void LIR_Op1::emit_code(LIR_Assembler* masm) {
1015 masm->emit_op1(this);
1016 }
1017
1018 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) {
1019 masm->emit_alloc_obj(this);
1020 masm->append_code_stub(stub());
1021 }
1022
1023 void LIR_OpBranch::emit_code(LIR_Assembler* masm) {
1024 masm->emit_opBranch(this);
1025 if (stub()) {
1026 masm->append_code_stub(stub());
1027 }
1028 }
1029
1030 void LIR_OpConvert::emit_code(LIR_Assembler* masm) {
1031 masm->emit_opConvert(this);
1032 if (stub() != NULL) {
1033 masm->append_code_stub(stub());
1034 }
1035 }
1036
1037 void LIR_Op2::emit_code(LIR_Assembler* masm) {
1038 masm->emit_op2(this);
1039 }
1040
1041 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) {
1042 masm->emit_alloc_array(this);
1043 masm->append_code_stub(stub());
1044 }
1045
1046 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) {
1047 masm->emit_opTypeCheck(this);
1048 if (stub()) {
1049 masm->append_code_stub(stub());
1050 }
1051 }
1052
1053 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) {
1054 masm->emit_compare_and_swap(this);
1055 }
1056
1057 void LIR_Op3::emit_code(LIR_Assembler* masm) {
1058 masm->emit_op3(this);
1059 }
1060
1061 void LIR_OpLock::emit_code(LIR_Assembler* masm) {
1062 masm->emit_lock(this);
1063 if (stub()) {
1064 masm->append_code_stub(stub());
1065 }
1066 }
1067
1068 #ifdef ASSERT
1069 void LIR_OpAssert::emit_code(LIR_Assembler* masm) {
1070 masm->emit_assert(this);
1071 }
1072 #endif
1073
1074 void LIR_OpDelay::emit_code(LIR_Assembler* masm) {
1075 masm->emit_delay(this);
1076 }
1077
1078 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) {
1079 masm->emit_profile_call(this);
1080 }
1081
1082 void LIR_OpProfileType::emit_code(LIR_Assembler* masm) {
1083 masm->emit_profile_type(this);
1084 }
1085
1086 // LIR_List
1087 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block)
1088 : _operations(8)
1089 , _compilation(compilation)
1090 #ifndef PRODUCT
1091 , _block(block)
1092 #endif
1093 #ifdef ASSERT
1094 , _file(NULL)
1095 , _line(0)
1096 #endif
1097 { }
1098
1099
1100 #ifdef ASSERT
1101 void LIR_List::set_file_and_line(const char * file, int line) {
1102 const char * f = strrchr(file, '/');
1103 if (f == NULL) f = strrchr(file, '\\');
1104 if (f == NULL) {
1105 f = file;
1106 } else {
1107 f++;
1108 }
1109 _file = f;
1110 _line = line;
1111 }
1112 #endif
1113
1114
1115 void LIR_List::append(LIR_InsertionBuffer* buffer) {
1116 assert(this == buffer->lir_list(), "wrong lir list");
1117 const int n = _operations.length();
1118
1119 if (buffer->number_of_ops() > 0) {
1120 // increase size of instructions list
1121 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL);
1122 // insert ops from buffer into instructions list
1123 int op_index = buffer->number_of_ops() - 1;
1124 int ip_index = buffer->number_of_insertion_points() - 1;
1125 int from_index = n - 1;
1126 int to_index = _operations.length() - 1;
1127 for (; ip_index >= 0; ip_index --) {
1128 int index = buffer->index_at(ip_index);
1129 // make room after insertion point
1130 while (index < from_index) {
1131 _operations.at_put(to_index --, _operations.at(from_index --));
1132 }
1133 // insert ops from buffer
1134 for (int i = buffer->count_at(ip_index); i > 0; i --) {
1135 _operations.at_put(to_index --, buffer->op_at(op_index --));
1136 }
1137 }
1138 }
1139
1140 buffer->finish();
1141 }
1142
1143
1144 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) {
1145 assert(reg->type() == T_OBJECT, "bad reg");
1146 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info));
1147 }
1148
1149 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) {
1150 assert(reg->type() == T_METADATA, "bad reg");
1151 append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info));
1152 }
1153
1154 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1155 append(new LIR_Op1(
1156 lir_move,
1157 LIR_OprFact::address(addr),
1158 src,
1159 addr->type(),
1160 patch_code,
1161 info));
1162 }
1163
1164
1165 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1166 append(new LIR_Op1(
1167 lir_move,
1168 LIR_OprFact::address(address),
1169 dst,
1170 address->type(),
1171 patch_code,
1172 info, lir_move_volatile));
1173 }
1174
1175 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1176 append(new LIR_Op1(
1177 lir_move,
1178 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1179 dst,
1180 type,
1181 patch_code,
1182 info, lir_move_volatile));
1183 }
1184
1185
1186 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1187 append(new LIR_Op1(
1188 lir_move,
1189 LIR_OprFact::intConst(v),
1190 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1191 type,
1192 patch_code,
1193 info));
1194 }
1195
1196
1197 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1198 append(new LIR_Op1(
1199 lir_move,
1200 LIR_OprFact::oopConst(o),
1201 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)),
1202 type,
1203 patch_code,
1204 info));
1205 }
1206
1207
1208 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1209 append(new LIR_Op1(
1210 lir_move,
1211 src,
1212 LIR_OprFact::address(addr),
1213 addr->type(),
1214 patch_code,
1215 info));
1216 }
1217
1218
1219 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1220 append(new LIR_Op1(
1221 lir_move,
1222 src,
1223 LIR_OprFact::address(addr),
1224 addr->type(),
1225 patch_code,
1226 info,
1227 lir_move_volatile));
1228 }
1229
1230 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) {
1231 append(new LIR_Op1(
1232 lir_move,
1233 src,
1234 LIR_OprFact::address(new LIR_Address(base, offset, type)),
1235 type,
1236 patch_code,
1237 info, lir_move_volatile));
1238 }
1239
1240
1241 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1242 append(new LIR_Op3(
1243 lir_idiv,
1244 left,
1245 right,
1246 tmp,
1247 res,
1248 info));
1249 }
1250
1251
1252 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1253 append(new LIR_Op3(
1254 lir_idiv,
1255 left,
1256 LIR_OprFact::intConst(right),
1257 tmp,
1258 res,
1259 info));
1260 }
1261
1262
1263 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1264 append(new LIR_Op3(
1265 lir_irem,
1266 left,
1267 right,
1268 tmp,
1269 res,
1270 info));
1271 }
1272
1273
1274 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) {
1275 append(new LIR_Op3(
1276 lir_irem,
1277 left,
1278 LIR_OprFact::intConst(right),
1279 tmp,
1280 res,
1281 info));
1282 }
1283
1284
1285 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
1286 append(new LIR_Op2(
1287 lir_cmp,
1288 condition,
1289 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)),
1290 LIR_OprFact::intConst(c),
1291 info));
1292 }
1293
1294
1295 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) {
1296 append(new LIR_Op2(
1297 lir_cmp,
1298 condition,
1299 reg,
1300 LIR_OprFact::address(addr),
1301 info));
1302 }
1303
1304 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1305 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) {
1306 append(new LIR_OpAllocObj(
1307 klass,
1308 dst,
1309 t1,
1310 t2,
1311 t3,
1312 t4,
1313 header_size,
1314 object_size,
1315 init_check,
1316 stub));
1317 }
1318
1319 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) {
1320 append(new LIR_OpAllocArray(
1321 klass,
1322 len,
1323 dst,
1324 t1,
1325 t2,
1326 t3,
1327 t4,
1328 type,
1329 stub));
1330 }
1331
1332 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1333 append(new LIR_Op2(
1334 lir_shl,
1335 value,
1336 count,
1337 dst,
1338 tmp));
1339 }
1340
1341 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1342 append(new LIR_Op2(
1343 lir_shr,
1344 value,
1345 count,
1346 dst,
1347 tmp));
1348 }
1349
1350
1351 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) {
1352 append(new LIR_Op2(
1353 lir_ushr,
1354 value,
1355 count,
1356 dst,
1357 tmp));
1358 }
1359
1360 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) {
1361 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i,
1362 left,
1363 right,
1364 dst));
1365 }
1366
1367 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) {
1368 append(new LIR_OpLock(
1369 lir_lock,
1370 hdr,
1371 obj,
1372 lock,
1373 scratch,
1374 stub,
1375 info));
1376 }
1377
1378 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) {
1379 append(new LIR_OpLock(
1380 lir_unlock,
1381 hdr,
1382 obj,
1383 lock,
1384 scratch,
1385 stub,
1386 NULL));
1387 }
1388
1389
1390 void check_LIR() {
1391 // cannot do the proper checking as PRODUCT and other modes return different results
1392 // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table");
1393 }
1394
1395
1396
1397 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
1398 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1399 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
1400 ciMethod* profiled_method, int profiled_bci) {
1401 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass,
1402 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub);
1403 if (profiled_method != NULL) {
1404 c->set_profiled_method(profiled_method);
1405 c->set_profiled_bci(profiled_bci);
1406 c->set_should_profile(true);
1407 }
1408 append(c);
1409 }
1410
1411 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) {
1412 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL);
1413 if (profiled_method != NULL) {
1414 c->set_profiled_method(profiled_method);
1415 c->set_profiled_bci(profiled_bci);
1416 c->set_should_profile(true);
1417 }
1418 append(c);
1419 }
1420
1421
1422 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3,
1423 CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) {
1424 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception);
1425 if (profiled_method != NULL) {
1426 c->set_profiled_method(profiled_method);
1427 c->set_profiled_bci(profiled_bci);
1428 c->set_should_profile(true);
1429 }
1430 append(c);
1431 }
1432
1433 void LIR_List::null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null) {
1434 if (deoptimize_on_null) {
1435 // Emit an explicit null check and deoptimize if opr is null
1436 CodeStub* deopt = new DeoptimizeStub(info, Deoptimization::Reason_null_check, Deoptimization::Action_none);
1437 cmp(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL));
1438 branch(lir_cond_equal, T_OBJECT, deopt);
1439 } else {
1440 // Emit an implicit null check
1441 append(new LIR_Op1(lir_null_check, opr, info));
1442 }
1443 }
1444
1445 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1446 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1447 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result));
1448 }
1449
1450 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1451 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1452 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result));
1453 }
1454
1455 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1456 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) {
1457 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result));
1458 }
1459
1460
1461 #ifdef PRODUCT
1462
1463 void print_LIR(BlockList* blocks) {
1464 }
1465
1466 #else
1467 // LIR_OprDesc
1468 void LIR_OprDesc::print() const {
1469 print(tty);
1470 }
1471
1472 void LIR_OprDesc::print(outputStream* out) const {
1473 if (is_illegal()) {
1474 return;
1475 }
1476
1477 out->print("[");
1478 if (is_pointer()) {
1479 pointer()->print_value_on(out);
1480 } else if (is_single_stack()) {
1481 out->print("stack:%d", single_stack_ix());
1482 } else if (is_double_stack()) {
1483 out->print("dbl_stack:%d",double_stack_ix());
1484 } else if (is_virtual()) {
1485 out->print("R%d", vreg_number());
1486 } else if (is_single_cpu()) {
1487 out->print("%s", as_register()->name());
1488 } else if (is_double_cpu()) {
1489 out->print("%s", as_register_hi()->name());
1490 out->print("%s", as_register_lo()->name());
1491 #if defined(X86)
1492 } else if (is_single_xmm()) {
1493 out->print("%s", as_xmm_float_reg()->name());
1494 } else if (is_double_xmm()) {
1495 out->print("%s", as_xmm_double_reg()->name());
1496 } else if (is_single_fpu()) {
1497 out->print("fpu%d", fpu_regnr());
1498 } else if (is_double_fpu()) {
1499 out->print("fpu%d", fpu_regnrLo());
1500 #elif defined(AARCH64)
1501 } else if (is_single_fpu()) {
1502 out->print("fpu%d", fpu_regnr());
1503 } else if (is_double_fpu()) {
1504 out->print("fpu%d", fpu_regnrLo());
1505 #elif defined(ARM)
1506 } else if (is_single_fpu()) {
1507 out->print("s%d", fpu_regnr());
1508 } else if (is_double_fpu()) {
1509 out->print("d%d", fpu_regnrLo() >> 1);
1510 #else
1511 } else if (is_single_fpu()) {
1512 out->print("%s", as_float_reg()->name());
1513 } else if (is_double_fpu()) {
1514 out->print("%s", as_double_reg()->name());
1515 #endif
1516
1517 } else if (is_illegal()) {
1518 out->print("-");
1519 } else {
1520 out->print("Unknown Operand");
1521 }
1522 if (!is_illegal()) {
1523 out->print("|%c", type_char());
1524 }
1525 if (is_register() && is_last_use()) {
1526 out->print("(last_use)");
1527 }
1528 out->print("]");
1529 }
1530
1531
1532 // LIR_Address
1533 void LIR_Const::print_value_on(outputStream* out) const {
1534 switch (type()) {
1535 case T_ADDRESS:out->print("address:%d",as_jint()); break;
1536 case T_INT: out->print("int:%d", as_jint()); break;
1537 case T_LONG: out->print("lng:" JLONG_FORMAT, as_jlong()); break;
1538 case T_FLOAT: out->print("flt:%f", as_jfloat()); break;
1539 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break;
1540 case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject())); break;
1541 case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break;
1542 default: out->print("%3d:0x" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break;
1543 }
1544 }
1545
1546 // LIR_Address
1547 void LIR_Address::print_value_on(outputStream* out) const {
1548 out->print("Base:"); _base->print(out);
1549 if (!_index->is_illegal()) {
1550 out->print(" Index:"); _index->print(out);
1551 switch (scale()) {
1552 case times_1: break;
1553 case times_2: out->print(" * 2"); break;
1554 case times_4: out->print(" * 4"); break;
1555 case times_8: out->print(" * 8"); break;
1556 }
1557 }
1558 out->print(" Disp: " INTX_FORMAT, _disp);
1559 }
1560
1561 // debug output of block header without InstructionPrinter
1562 // (because phi functions are not necessary for LIR)
1563 static void print_block(BlockBegin* x) {
1564 // print block id
1565 BlockEnd* end = x->end();
1566 tty->print("B%d ", x->block_id());
1567
1568 // print flags
1569 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std ");
1570 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr ");
1571 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex ");
1572 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr ");
1573 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb ");
1574 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh ");
1575 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le ");
1576
1577 // print block bci range
1578 tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci()));
1579
1580 // print predecessors and successors
1581 if (x->number_of_preds() > 0) {
1582 tty->print("preds: ");
1583 for (int i = 0; i < x->number_of_preds(); i ++) {
1584 tty->print("B%d ", x->pred_at(i)->block_id());
1585 }
1586 }
1587
1588 if (x->number_of_sux() > 0) {
1589 tty->print("sux: ");
1590 for (int i = 0; i < x->number_of_sux(); i ++) {
1591 tty->print("B%d ", x->sux_at(i)->block_id());
1592 }
1593 }
1594
1595 // print exception handlers
1596 if (x->number_of_exception_handlers() > 0) {
1597 tty->print("xhandler: ");
1598 for (int i = 0; i < x->number_of_exception_handlers(); i++) {
1599 tty->print("B%d ", x->exception_handler_at(i)->block_id());
1600 }
1601 }
1602
1603 tty->cr();
1604 }
1605
1606 void print_LIR(BlockList* blocks) {
1607 tty->print_cr("LIR:");
1608 int i;
1609 for (i = 0; i < blocks->length(); i++) {
1610 BlockBegin* bb = blocks->at(i);
1611 print_block(bb);
1612 tty->print("__id_Instruction___________________________________________"); tty->cr();
1613 bb->lir()->print_instructions();
1614 }
1615 }
1616
1617 void LIR_List::print_instructions() {
1618 for (int i = 0; i < _operations.length(); i++) {
1619 _operations.at(i)->print(); tty->cr();
1620 }
1621 tty->cr();
1622 }
1623
1624 // LIR_Ops printing routines
1625 // LIR_Op
1626 void LIR_Op::print_on(outputStream* out) const {
1627 if (id() != -1 || PrintCFGToFile) {
1628 out->print("%4d ", id());
1629 } else {
1630 out->print(" ");
1631 }
1632 out->print("%s ", name());
1633 print_instr(out);
1634 if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci());
1635 #ifdef ASSERT
1636 if (Verbose && _file != NULL) {
1637 out->print(" (%s:%d)", _file, _line);
1638 }
1639 #endif
1640 }
1641
1642 const char * LIR_Op::name() const {
1643 const char* s = NULL;
1644 switch(code()) {
1645 // LIR_Op0
1646 case lir_membar: s = "membar"; break;
1647 case lir_membar_acquire: s = "membar_acquire"; break;
1648 case lir_membar_release: s = "membar_release"; break;
1649 case lir_membar_loadload: s = "membar_loadload"; break;
1650 case lir_membar_storestore: s = "membar_storestore"; break;
1651 case lir_membar_loadstore: s = "membar_loadstore"; break;
1652 case lir_membar_storeload: s = "membar_storeload"; break;
1653 case lir_word_align: s = "word_align"; break;
1654 case lir_label: s = "label"; break;
1655 case lir_nop: s = "nop"; break;
1656 case lir_on_spin_wait: s = "on_spin_wait"; break;
1657 case lir_backwardbranch_target: s = "backbranch"; break;
1658 case lir_std_entry: s = "std_entry"; break;
1659 case lir_osr_entry: s = "osr_entry"; break;
1660 case lir_build_frame: s = "build_frm"; break;
1661 case lir_fpop_raw: s = "fpop_raw"; break;
1662 case lir_24bit_FPU: s = "24bit_FPU"; break;
1663 case lir_reset_FPU: s = "reset_FPU"; break;
1664 case lir_breakpoint: s = "breakpoint"; break;
1665 case lir_get_thread: s = "get_thread"; break;
1666 // LIR_Op1
1667 case lir_fxch: s = "fxch"; break;
1668 case lir_fld: s = "fld"; break;
1669 case lir_ffree: s = "ffree"; break;
1670 case lir_push: s = "push"; break;
1671 case lir_pop: s = "pop"; break;
1672 case lir_null_check: s = "null_check"; break;
1673 case lir_return: s = "return"; break;
1674 case lir_safepoint: s = "safepoint"; break;
1675 case lir_neg: s = "neg"; break;
1676 case lir_leal: s = "leal"; break;
1677 case lir_branch: s = "branch"; break;
1678 case lir_cond_float_branch: s = "flt_cond_br"; break;
1679 case lir_move: s = "move"; break;
1680 case lir_roundfp: s = "roundfp"; break;
1681 case lir_rtcall: s = "rtcall"; break;
1682 case lir_throw: s = "throw"; break;
1683 case lir_unwind: s = "unwind"; break;
1684 case lir_convert: s = "convert"; break;
1685 case lir_alloc_object: s = "alloc_obj"; break;
1686 case lir_monaddr: s = "mon_addr"; break;
1687 case lir_pack64: s = "pack64"; break;
1688 case lir_unpack64: s = "unpack64"; break;
1689 case lir_getsp: s = "getsp"; break;
1690 case lir_getfp: s = "getfp"; break;
1691 // LIR_Op2
1692 case lir_cmp: s = "cmp"; break;
1693 case lir_cmp_l2i: s = "cmp_l2i"; break;
1694 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break;
1695 case lir_cmp_fd2i: s = "comp_fd2i"; break;
1696 case lir_cmove: s = "cmove"; break;
1697 case lir_add: s = "add"; break;
1698 case lir_sub: s = "sub"; break;
1699 case lir_mul: s = "mul"; break;
1700 case lir_mul_strictfp: s = "mul_strictfp"; break;
1701 case lir_div: s = "div"; break;
1702 case lir_div_strictfp: s = "div_strictfp"; break;
1703 case lir_rem: s = "rem"; break;
1704 case lir_abs: s = "abs"; break;
1705 case lir_sqrt: s = "sqrt"; break;
1706 case lir_logic_and: s = "logic_and"; break;
1707 case lir_logic_or: s = "logic_or"; break;
1708 case lir_logic_xor: s = "logic_xor"; break;
1709 case lir_shl: s = "shift_left"; break;
1710 case lir_shr: s = "shift_right"; break;
1711 case lir_ushr: s = "ushift_right"; break;
1712 case lir_alloc_array: s = "alloc_array"; break;
1713 case lir_xadd: s = "xadd"; break;
1714 case lir_xchg: s = "xchg"; break;
1715 // LIR_Op3
1716 case lir_idiv: s = "idiv"; break;
1717 case lir_irem: s = "irem"; break;
1718 case lir_fmad: s = "fmad"; break;
1719 case lir_fmaf: s = "fmaf"; break;
1720 // LIR_OpJavaCall
1721 case lir_static_call: s = "static"; break;
1722 case lir_optvirtual_call: s = "optvirtual"; break;
1723 case lir_icvirtual_call: s = "icvirtual"; break;
1724 case lir_virtual_call: s = "virtual"; break;
1725 case lir_dynamic_call: s = "dynamic"; break;
1726 // LIR_OpArrayCopy
1727 case lir_arraycopy: s = "arraycopy"; break;
1728 // LIR_OpUpdateCRC32
1729 case lir_updatecrc32: s = "updatecrc32"; break;
1730 // LIR_OpLock
1731 case lir_lock: s = "lock"; break;
1732 case lir_unlock: s = "unlock"; break;
1733 // LIR_OpDelay
1734 case lir_delay_slot: s = "delay"; break;
1735 // LIR_OpTypeCheck
1736 case lir_instanceof: s = "instanceof"; break;
1737 case lir_checkcast: s = "checkcast"; break;
1738 case lir_store_check: s = "store_check"; break;
1739 // LIR_OpCompareAndSwap
1740 case lir_cas_long: s = "cas_long"; break;
1741 case lir_cas_obj: s = "cas_obj"; break;
1742 case lir_cas_int: s = "cas_int"; break;
1743 // LIR_OpProfileCall
1744 case lir_profile_call: s = "profile_call"; break;
1745 // LIR_OpProfileType
1746 case lir_profile_type: s = "profile_type"; break;
1747 // LIR_OpAssert
1748 #ifdef ASSERT
1749 case lir_assert: s = "assert"; break;
1750 #endif
1751 case lir_none: ShouldNotReachHere();break;
1752 default: s = "illegal_op"; break;
1753 }
1754 return s;
1755 }
1756
1757 // LIR_OpJavaCall
1758 void LIR_OpJavaCall::print_instr(outputStream* out) const {
1759 out->print("call: ");
1760 out->print("[addr: " INTPTR_FORMAT "]", p2i(address()));
1761 if (receiver()->is_valid()) {
1762 out->print(" [recv: "); receiver()->print(out); out->print("]");
1763 }
1764 if (result_opr()->is_valid()) {
1765 out->print(" [result: "); result_opr()->print(out); out->print("]");
1766 }
1767 }
1768
1769 // LIR_OpLabel
1770 void LIR_OpLabel::print_instr(outputStream* out) const {
1771 out->print("[label:" INTPTR_FORMAT "]", p2i(_label));
1772 }
1773
1774 // LIR_OpArrayCopy
1775 void LIR_OpArrayCopy::print_instr(outputStream* out) const {
1776 src()->print(out); out->print(" ");
1777 src_pos()->print(out); out->print(" ");
1778 dst()->print(out); out->print(" ");
1779 dst_pos()->print(out); out->print(" ");
1780 length()->print(out); out->print(" ");
1781 tmp()->print(out); out->print(" ");
1782 }
1783
1784 // LIR_OpUpdateCRC32
1785 void LIR_OpUpdateCRC32::print_instr(outputStream* out) const {
1786 crc()->print(out); out->print(" ");
1787 val()->print(out); out->print(" ");
1788 result_opr()->print(out); out->print(" ");
1789 }
1790
1791 // LIR_OpCompareAndSwap
1792 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const {
1793 addr()->print(out); out->print(" ");
1794 cmp_value()->print(out); out->print(" ");
1795 new_value()->print(out); out->print(" ");
1796 tmp1()->print(out); out->print(" ");
1797 tmp2()->print(out); out->print(" ");
1798
1799 }
1800
1801 // LIR_Op0
1802 void LIR_Op0::print_instr(outputStream* out) const {
1803 result_opr()->print(out);
1804 }
1805
1806 // LIR_Op1
1807 const char * LIR_Op1::name() const {
1808 if (code() == lir_move) {
1809 switch (move_kind()) {
1810 case lir_move_normal:
1811 return "move";
1812 case lir_move_unaligned:
1813 return "unaligned move";
1814 case lir_move_volatile:
1815 return "volatile_move";
1816 case lir_move_wide:
1817 return "wide_move";
1818 default:
1819 ShouldNotReachHere();
1820 return "illegal_op";
1821 }
1822 } else {
1823 return LIR_Op::name();
1824 }
1825 }
1826
1827
1828 void LIR_Op1::print_instr(outputStream* out) const {
1829 _opr->print(out); out->print(" ");
1830 result_opr()->print(out); out->print(" ");
1831 print_patch_code(out, patch_code());
1832 }
1833
1834
1835 // LIR_Op1
1836 void LIR_OpRTCall::print_instr(outputStream* out) const {
1837 intx a = (intx)addr();
1838 out->print("%s", Runtime1::name_for_address(addr()));
1839 out->print(" ");
1840 tmp()->print(out);
1841 }
1842
1843 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) {
1844 switch(code) {
1845 case lir_patch_none: break;
1846 case lir_patch_low: out->print("[patch_low]"); break;
1847 case lir_patch_high: out->print("[patch_high]"); break;
1848 case lir_patch_normal: out->print("[patch_normal]"); break;
1849 default: ShouldNotReachHere();
1850 }
1851 }
1852
1853 // LIR_OpBranch
1854 void LIR_OpBranch::print_instr(outputStream* out) const {
1855 print_condition(out, cond()); out->print(" ");
1856 if (block() != NULL) {
1857 out->print("[B%d] ", block()->block_id());
1858 } else if (stub() != NULL) {
1859 out->print("[");
1860 stub()->print_name(out);
1861 out->print(": " INTPTR_FORMAT "]", p2i(stub()));
1862 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci());
1863 } else {
1864 out->print("[label:" INTPTR_FORMAT "] ", p2i(label()));
1865 }
1866 if (ublock() != NULL) {
1867 out->print("unordered: [B%d] ", ublock()->block_id());
1868 }
1869 }
1870
1871 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) {
1872 switch(cond) {
1873 case lir_cond_equal: out->print("[EQ]"); break;
1874 case lir_cond_notEqual: out->print("[NE]"); break;
1875 case lir_cond_less: out->print("[LT]"); break;
1876 case lir_cond_lessEqual: out->print("[LE]"); break;
1877 case lir_cond_greaterEqual: out->print("[GE]"); break;
1878 case lir_cond_greater: out->print("[GT]"); break;
1879 case lir_cond_belowEqual: out->print("[BE]"); break;
1880 case lir_cond_aboveEqual: out->print("[AE]"); break;
1881 case lir_cond_always: out->print("[AL]"); break;
1882 default: out->print("[%d]",cond); break;
1883 }
1884 }
1885
1886 // LIR_OpConvert
1887 void LIR_OpConvert::print_instr(outputStream* out) const {
1888 print_bytecode(out, bytecode());
1889 in_opr()->print(out); out->print(" ");
1890 result_opr()->print(out); out->print(" ");
1891 #ifdef PPC32
1892 if(tmp1()->is_valid()) {
1893 tmp1()->print(out); out->print(" ");
1894 tmp2()->print(out); out->print(" ");
1895 }
1896 #endif
1897 }
1898
1899 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) {
1900 switch(code) {
1901 case Bytecodes::_d2f: out->print("[d2f] "); break;
1902 case Bytecodes::_d2i: out->print("[d2i] "); break;
1903 case Bytecodes::_d2l: out->print("[d2l] "); break;
1904 case Bytecodes::_f2d: out->print("[f2d] "); break;
1905 case Bytecodes::_f2i: out->print("[f2i] "); break;
1906 case Bytecodes::_f2l: out->print("[f2l] "); break;
1907 case Bytecodes::_i2b: out->print("[i2b] "); break;
1908 case Bytecodes::_i2c: out->print("[i2c] "); break;
1909 case Bytecodes::_i2d: out->print("[i2d] "); break;
1910 case Bytecodes::_i2f: out->print("[i2f] "); break;
1911 case Bytecodes::_i2l: out->print("[i2l] "); break;
1912 case Bytecodes::_i2s: out->print("[i2s] "); break;
1913 case Bytecodes::_l2i: out->print("[l2i] "); break;
1914 case Bytecodes::_l2f: out->print("[l2f] "); break;
1915 case Bytecodes::_l2d: out->print("[l2d] "); break;
1916 default:
1917 out->print("[?%d]",code);
1918 break;
1919 }
1920 }
1921
1922 void LIR_OpAllocObj::print_instr(outputStream* out) const {
1923 klass()->print(out); out->print(" ");
1924 obj()->print(out); out->print(" ");
1925 tmp1()->print(out); out->print(" ");
1926 tmp2()->print(out); out->print(" ");
1927 tmp3()->print(out); out->print(" ");
1928 tmp4()->print(out); out->print(" ");
1929 out->print("[hdr:%d]", header_size()); out->print(" ");
1930 out->print("[obj:%d]", object_size()); out->print(" ");
1931 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1932 }
1933
1934 void LIR_OpRoundFP::print_instr(outputStream* out) const {
1935 _opr->print(out); out->print(" ");
1936 tmp()->print(out); out->print(" ");
1937 result_opr()->print(out); out->print(" ");
1938 }
1939
1940 // LIR_Op2
1941 void LIR_Op2::print_instr(outputStream* out) const {
1942 if (code() == lir_cmove || code() == lir_cmp) {
1943 print_condition(out, condition()); out->print(" ");
1944 }
1945 in_opr1()->print(out); out->print(" ");
1946 in_opr2()->print(out); out->print(" ");
1947 if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out); out->print(" "); }
1948 if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out); out->print(" "); }
1949 if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out); out->print(" "); }
1950 if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out); out->print(" "); }
1951 if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out); out->print(" "); }
1952 result_opr()->print(out);
1953 }
1954
1955 void LIR_OpAllocArray::print_instr(outputStream* out) const {
1956 klass()->print(out); out->print(" ");
1957 len()->print(out); out->print(" ");
1958 obj()->print(out); out->print(" ");
1959 tmp1()->print(out); out->print(" ");
1960 tmp2()->print(out); out->print(" ");
1961 tmp3()->print(out); out->print(" ");
1962 tmp4()->print(out); out->print(" ");
1963 out->print("[type:0x%x]", type()); out->print(" ");
1964 out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry()));
1965 }
1966
1967
1968 void LIR_OpTypeCheck::print_instr(outputStream* out) const {
1969 object()->print(out); out->print(" ");
1970 if (code() == lir_store_check) {
1971 array()->print(out); out->print(" ");
1972 }
1973 if (code() != lir_store_check) {
1974 klass()->print_name_on(out); out->print(" ");
1975 if (fast_check()) out->print("fast_check ");
1976 }
1977 tmp1()->print(out); out->print(" ");
1978 tmp2()->print(out); out->print(" ");
1979 tmp3()->print(out); out->print(" ");
1980 result_opr()->print(out); out->print(" ");
1981 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci());
1982 }
1983
1984
1985 // LIR_Op3
1986 void LIR_Op3::print_instr(outputStream* out) const {
1987 in_opr1()->print(out); out->print(" ");
1988 in_opr2()->print(out); out->print(" ");
1989 in_opr3()->print(out); out->print(" ");
1990 result_opr()->print(out);
1991 }
1992
1993
1994 void LIR_OpLock::print_instr(outputStream* out) const {
1995 hdr_opr()->print(out); out->print(" ");
1996 obj_opr()->print(out); out->print(" ");
1997 lock_opr()->print(out); out->print(" ");
1998 if (_scratch->is_valid()) {
1999 _scratch->print(out); out->print(" ");
2000 }
2001 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry()));
2002 }
2003
2004 #ifdef ASSERT
2005 void LIR_OpAssert::print_instr(outputStream* out) const {
2006 print_condition(out, condition()); out->print(" ");
2007 in_opr1()->print(out); out->print(" ");
2008 in_opr2()->print(out); out->print(", \"");
2009 out->print("%s", msg()); out->print("\"");
2010 }
2011 #endif
2012
2013
2014 void LIR_OpDelay::print_instr(outputStream* out) const {
2015 _op->print_on(out);
2016 }
2017
2018
2019 // LIR_OpProfileCall
2020 void LIR_OpProfileCall::print_instr(outputStream* out) const {
2021 profiled_method()->name()->print_symbol_on(out);
2022 out->print(".");
2023 profiled_method()->holder()->name()->print_symbol_on(out);
2024 out->print(" @ %d ", profiled_bci());
2025 mdo()->print(out); out->print(" ");
2026 recv()->print(out); out->print(" ");
2027 tmp1()->print(out); out->print(" ");
2028 }
2029
2030 // LIR_OpProfileType
2031 void LIR_OpProfileType::print_instr(outputStream* out) const {
2032 out->print("exact = ");
2033 if (exact_klass() == NULL) {
2034 out->print("unknown");
2035 } else {
2036 exact_klass()->print_name_on(out);
2037 }
2038 out->print(" current = "); ciTypeEntries::print_ciklass(out, current_klass());
2039 out->print(" ");
2040 mdp()->print(out); out->print(" ");
2041 obj()->print(out); out->print(" ");
2042 tmp()->print(out); out->print(" ");
2043 }
2044
2045 #endif // PRODUCT
2046
2047 // Implementation of LIR_InsertionBuffer
2048
2049 void LIR_InsertionBuffer::append(int index, LIR_Op* op) {
2050 assert(_index_and_count.length() % 2 == 0, "must have a count for each index");
2051
2052 int i = number_of_insertion_points() - 1;
2053 if (i < 0 || index_at(i) < index) {
2054 append_new(index, 1);
2055 } else {
2056 assert(index_at(i) == index, "can append LIR_Ops in ascending order only");
2057 assert(count_at(i) > 0, "check");
2058 set_count_at(i, count_at(i) + 1);
2059 }
2060 _ops.push(op);
2061
2062 DEBUG_ONLY(verify());
2063 }
2064
2065 #ifdef ASSERT
2066 void LIR_InsertionBuffer::verify() {
2067 int sum = 0;
2068 int prev_idx = -1;
2069
2070 for (int i = 0; i < number_of_insertion_points(); i++) {
2071 assert(prev_idx < index_at(i), "index must be ordered ascending");
2072 sum += count_at(i);
2073 }
2074 assert(sum == number_of_ops(), "wrong total sum");
2075 }
2076 #endif