667 case lir_membar_storestore:
668 membar_storestore();
669 break;
670
671 case lir_membar_loadstore:
672 membar_loadstore();
673 break;
674
675 case lir_membar_storeload:
676 membar_storeload();
677 break;
678
679 case lir_get_thread:
680 get_thread(op->result_opr());
681 break;
682
683 case lir_on_spin_wait:
684 on_spin_wait();
685 break;
686
687 default:
688 ShouldNotReachHere();
689 break;
690 }
691 }
692
693
694 void LIR_Assembler::emit_op2(LIR_Op2* op) {
695 switch (op->code()) {
696 case lir_cmp:
697 if (op->info() != NULL) {
698 assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(),
699 "shouldn't be codeemitinfo for non-address operands");
700 add_debug_info_for_null_check_here(op->info()); // exception possible
701 }
702 comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op);
703 break;
704
705 case lir_cmp_l2i:
706 case lir_cmp_fd2i:
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667 case lir_membar_storestore:
668 membar_storestore();
669 break;
670
671 case lir_membar_loadstore:
672 membar_loadstore();
673 break;
674
675 case lir_membar_storeload:
676 membar_storeload();
677 break;
678
679 case lir_get_thread:
680 get_thread(op->result_opr());
681 break;
682
683 case lir_on_spin_wait:
684 on_spin_wait();
685 break;
686
687 case lir_getfp:
688 getfp(op->result_opr());
689 break;
690
691 case lir_getsp:
692 getsp(op->result_opr());
693 break;
694
695
696 default:
697 ShouldNotReachHere();
698 break;
699 }
700 }
701
702
703 void LIR_Assembler::emit_op2(LIR_Op2* op) {
704 switch (op->code()) {
705 case lir_cmp:
706 if (op->info() != NULL) {
707 assert(op->in_opr1()->is_address() || op->in_opr2()->is_address(),
708 "shouldn't be codeemitinfo for non-address operands");
709 add_debug_info_for_null_check_here(op->info()); // exception possible
710 }
711 comp_op(op->condition(), op->in_opr1(), op->in_opr2(), op);
712 break;
713
714 case lir_cmp_l2i:
715 case lir_cmp_fd2i:
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