10997 %}
10998 ins_pipe( pipe_slow );
10999 %}
11000
11001 // encode char[] to byte[] in ISO_8859_1
11002 instruct encode_iso_array(rsi_RegP src, rdi_RegP dst, rdx_RegI len,
11003 regD tmp1, regD tmp2, regD tmp3, regD tmp4,
11004 rcx_RegI tmp5, rax_RegI result, rFlagsReg cr) %{
11005 match(Set result (EncodeISOArray src (Binary dst len)));
11006 effect(TEMP tmp1, TEMP tmp2, TEMP tmp3, TEMP tmp4, USE_KILL src, USE_KILL dst, USE_KILL len, KILL tmp5, KILL cr);
11007
11008 format %{ "Encode array $src,$dst,$len -> $result // KILL RCX, RDX, $tmp1, $tmp2, $tmp3, $tmp4, RSI, RDI " %}
11009 ins_encode %{
11010 __ encode_iso_array($src$$Register, $dst$$Register, $len$$Register,
11011 $tmp1$$XMMRegister, $tmp2$$XMMRegister, $tmp3$$XMMRegister,
11012 $tmp4$$XMMRegister, $tmp5$$Register, $result$$Register);
11013 %}
11014 ins_pipe( pipe_slow );
11015 %}
11016
11017 //----------Overflow Math Instructions-----------------------------------------
11018
11019 instruct overflowAddI_rReg(rFlagsReg cr, rax_RegI op1, rRegI op2)
11020 %{
11021 match(Set cr (OverflowAddI op1 op2));
11022 effect(DEF cr, USE_KILL op1, USE op2);
11023
11024 format %{ "addl $op1, $op2\t# overflow check int" %}
11025
11026 ins_encode %{
11027 __ addl($op1$$Register, $op2$$Register);
11028 %}
11029 ins_pipe(ialu_reg_reg);
11030 %}
11031
11032 instruct overflowAddI_rReg_imm(rFlagsReg cr, rax_RegI op1, immI op2)
11033 %{
11034 match(Set cr (OverflowAddI op1 op2));
11035 effect(DEF cr, USE_KILL op1, USE op2);
11036
|
10997 %}
10998 ins_pipe( pipe_slow );
10999 %}
11000
11001 // encode char[] to byte[] in ISO_8859_1
11002 instruct encode_iso_array(rsi_RegP src, rdi_RegP dst, rdx_RegI len,
11003 regD tmp1, regD tmp2, regD tmp3, regD tmp4,
11004 rcx_RegI tmp5, rax_RegI result, rFlagsReg cr) %{
11005 match(Set result (EncodeISOArray src (Binary dst len)));
11006 effect(TEMP tmp1, TEMP tmp2, TEMP tmp3, TEMP tmp4, USE_KILL src, USE_KILL dst, USE_KILL len, KILL tmp5, KILL cr);
11007
11008 format %{ "Encode array $src,$dst,$len -> $result // KILL RCX, RDX, $tmp1, $tmp2, $tmp3, $tmp4, RSI, RDI " %}
11009 ins_encode %{
11010 __ encode_iso_array($src$$Register, $dst$$Register, $len$$Register,
11011 $tmp1$$XMMRegister, $tmp2$$XMMRegister, $tmp3$$XMMRegister,
11012 $tmp4$$XMMRegister, $tmp5$$Register, $result$$Register);
11013 %}
11014 ins_pipe( pipe_slow );
11015 %}
11016
11017 instruct getFP(rRegL dst) %{
11018 match(Set dst (GetFP));
11019 effect(DEF dst);
11020 ins_cost(1);
11021
11022 ins_encode %{
11023 // Remove wordSize for return addr which is already pushed.
11024 int framesize = Compile::current()->frame_size_in_bytes() - wordSize;
11025 Address base(rsp, framesize);
11026 __ lea($dst$$Register, base);
11027 %}
11028 ins_pipe(ialu_reg_reg_long);
11029 %}
11030
11031 //----------Overflow Math Instructions-----------------------------------------
11032
11033 instruct overflowAddI_rReg(rFlagsReg cr, rax_RegI op1, rRegI op2)
11034 %{
11035 match(Set cr (OverflowAddI op1 op2));
11036 effect(DEF cr, USE_KILL op1, USE op2);
11037
11038 format %{ "addl $op1, $op2\t# overflow check int" %}
11039
11040 ins_encode %{
11041 __ addl($op1$$Register, $op2$$Register);
11042 %}
11043 ins_pipe(ialu_reg_reg);
11044 %}
11045
11046 instruct overflowAddI_rReg_imm(rFlagsReg cr, rax_RegI op1, immI op2)
11047 %{
11048 match(Set cr (OverflowAddI op1 op2));
11049 effect(DEF cr, USE_KILL op1, USE op2);
11050
|