1 /*
2 * Copyright (c) 2005, 2017, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2012, 2017, SAP SE. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "precompiled.hpp"
27 #include "c1/c1_Compilation.hpp"
28 #include "c1/c1_FrameMap.hpp"
29 #include "c1/c1_Instruction.hpp"
30 #include "c1/c1_LIRAssembler.hpp"
31 #include "c1/c1_LIRGenerator.hpp"
32 #include "c1/c1_Runtime1.hpp"
33 #include "c1/c1_ValueStack.hpp"
34 #include "ci/ciArray.hpp"
35 #include "ci/ciObjArrayKlass.hpp"
36 #include "ci/ciTypeArrayKlass.hpp"
37 #include "runtime/sharedRuntime.hpp"
38 #include "runtime/stubRoutines.hpp"
39 #include "vmreg_ppc.inline.hpp"
40
41 #ifdef ASSERT
42 #define __ gen()->lir(__FILE__, __LINE__)->
43 #else
44 #define __ gen()->lir()->
45 #endif
46
47 void LIRItem::load_byte_item() {
48 // Byte loads use same registers as other loads.
49 load_item();
50 }
51
52
53 void LIRItem::load_nonconstant() {
54 LIR_Opr r = value()->operand();
55 if (_gen->can_inline_as_constant(value())) {
56 if (!r->is_constant()) {
57 r = LIR_OprFact::value_type(value()->type());
58 }
59 _result = r;
60 } else {
61 load_item();
62 }
63 }
64
65
66 //--------------------------------------------------------------
67 // LIRGenerator
68 //--------------------------------------------------------------
69
70 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::R3_oop_opr; }
71 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::R4_opr; }
72 LIR_Opr LIRGenerator::syncLockOpr() { return FrameMap::R5_opr; } // Need temp effect for MonitorEnterStub.
73 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::R4_oop_opr; } // Need temp effect for MonitorEnterStub.
74 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; } // not needed
75
76 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
77 LIR_Opr opr;
78 switch (type->tag()) {
79 case intTag: opr = FrameMap::R3_opr; break;
80 case objectTag: opr = FrameMap::R3_oop_opr; break;
81 case longTag: opr = FrameMap::R3_long_opr; break;
82 case floatTag: opr = FrameMap::F1_opr; break;
83 case doubleTag: opr = FrameMap::F1_double_opr; break;
84
85 case addressTag:
86 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
87 }
88
89 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
90 return opr;
91 }
92
93 LIR_Opr LIRGenerator::rlock_callee_saved(BasicType type) {
94 ShouldNotReachHere();
95 return LIR_OprFact::illegalOpr;
96 }
97
98
99 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
100 return new_register(T_INT);
101 }
102
103
104 //--------- loading items into registers --------------------------------
105
106 // PPC cannot inline all constants.
107 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
108 if (v->type()->as_IntConstant() != NULL) {
109 return Assembler::is_simm16(v->type()->as_IntConstant()->value());
110 } else if (v->type()->as_LongConstant() != NULL) {
111 return Assembler::is_simm16(v->type()->as_LongConstant()->value());
112 } else if (v->type()->as_ObjectConstant() != NULL) {
113 return v->type()->as_ObjectConstant()->value()->is_null_object();
114 } else {
115 return false;
116 }
117 }
118
119
120 // Only simm16 constants can be inlined.
121 bool LIRGenerator::can_inline_as_constant(Value i) const {
122 return can_store_as_constant(i, as_BasicType(i->type()));
123 }
124
125
126 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
127 if (c->type() == T_INT) {
128 return Assembler::is_simm16(c->as_jint());
129 }
130 if (c->type() == T_LONG) {
131 return Assembler::is_simm16(c->as_jlong());
132 }
133 if (c->type() == T_OBJECT) {
134 return c->as_jobject() == NULL;
135 }
136 return false;
137 }
138
139
140 LIR_Opr LIRGenerator::safepoint_poll_register() {
141 return new_register(T_INT);
142 }
143
144
145 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
146 int shift, int disp, BasicType type) {
147 assert(base->is_register(), "must be");
148 intx large_disp = disp;
149
150 // Accumulate fixed displacements.
151 if (index->is_constant()) {
152 large_disp += (intx)(index->as_constant_ptr()->as_jint()) << shift;
153 index = LIR_OprFact::illegalOpr;
154 }
155
156 if (index->is_register()) {
157 // Apply the shift and accumulate the displacement.
158 if (shift > 0) {
159 LIR_Opr tmp = new_pointer_register();
160 __ shift_left(index, shift, tmp);
161 index = tmp;
162 }
163 if (large_disp != 0) {
164 LIR_Opr tmp = new_pointer_register();
165 if (Assembler::is_simm16(large_disp)) {
166 __ add(index, LIR_OprFact::intptrConst(large_disp), tmp);
167 index = tmp;
168 } else {
169 __ move(LIR_OprFact::intptrConst(large_disp), tmp);
170 __ add(tmp, index, tmp);
171 index = tmp;
172 }
173 large_disp = 0;
174 }
175 } else if (!Assembler::is_simm16(large_disp)) {
176 // Index is illegal so replace it with the displacement loaded into a register.
177 index = new_pointer_register();
178 __ move(LIR_OprFact::intptrConst(large_disp), index);
179 large_disp = 0;
180 }
181
182 // At this point we either have base + index or base + displacement.
183 if (large_disp == 0) {
184 return new LIR_Address(base, index, type);
185 } else {
186 assert(Assembler::is_simm16(large_disp), "must be");
187 return new LIR_Address(base, large_disp, type);
188 }
189 }
190
191
192 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
193 BasicType type, bool needs_card_mark) {
194 int elem_size = type2aelembytes(type);
195 int shift = exact_log2(elem_size);
196
197 LIR_Opr base_opr;
198 intx offset = arrayOopDesc::base_offset_in_bytes(type);
199
200 if (index_opr->is_constant()) {
201 intx i = index_opr->as_constant_ptr()->as_jint();
202 intx array_offset = i * elem_size;
203 if (Assembler::is_simm16(array_offset + offset)) {
204 base_opr = array_opr;
205 offset = array_offset + offset;
206 } else {
207 base_opr = new_pointer_register();
208 if (Assembler::is_simm16(array_offset)) {
209 __ add(array_opr, LIR_OprFact::intptrConst(array_offset), base_opr);
210 } else {
211 __ move(LIR_OprFact::intptrConst(array_offset), base_opr);
212 __ add(base_opr, array_opr, base_opr);
213 }
214 }
215 } else {
216 #ifdef _LP64
217 if (index_opr->type() == T_INT) {
218 LIR_Opr tmp = new_register(T_LONG);
219 __ convert(Bytecodes::_i2l, index_opr, tmp);
220 index_opr = tmp;
221 }
222 #endif
223
224 base_opr = new_pointer_register();
225 assert (index_opr->is_register(), "Must be register");
226 if (shift > 0) {
227 __ shift_left(index_opr, shift, base_opr);
228 __ add(base_opr, array_opr, base_opr);
229 } else {
230 __ add(index_opr, array_opr, base_opr);
231 }
232 }
233 if (needs_card_mark) {
234 LIR_Opr ptr = new_pointer_register();
235 __ add(base_opr, LIR_OprFact::intptrConst(offset), ptr);
236 return new LIR_Address(ptr, type);
237 } else {
238 return new LIR_Address(base_opr, offset, type);
239 }
240 }
241
242
243 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
244 LIR_Opr r = NULL;
245 if (type == T_LONG) {
246 r = LIR_OprFact::longConst(x);
247 } else if (type == T_INT) {
248 r = LIR_OprFact::intConst(x);
249 } else {
250 ShouldNotReachHere();
251 }
252 if (!Assembler::is_simm16(x)) {
253 LIR_Opr tmp = new_register(type);
254 __ move(r, tmp);
255 return tmp;
256 }
257 return r;
258 }
259
260
261 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
262 LIR_Opr pointer = new_pointer_register();
263 __ move(LIR_OprFact::intptrConst(counter), pointer);
264 LIR_Address* addr = new LIR_Address(pointer, type);
265 increment_counter(addr, step);
266 }
267
268
269 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
270 LIR_Opr temp = new_register(addr->type());
271 __ move(addr, temp);
272 __ add(temp, load_immediate(step, addr->type()), temp);
273 __ move(temp, addr);
274 }
275
276
277 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
278 LIR_Opr tmp = FrameMap::R0_opr;
279 __ load(new LIR_Address(base, disp, T_INT), tmp, info);
280 __ cmp(condition, tmp, c);
281 }
282
283
284 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base,
285 int disp, BasicType type, CodeEmitInfo* info) {
286 LIR_Opr tmp = FrameMap::R0_opr;
287 __ load(new LIR_Address(base, disp, type), tmp, info);
288 __ cmp(condition, reg, tmp);
289 }
290
291
292 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base,
293 LIR_Opr disp, BasicType type, CodeEmitInfo* info) {
294 LIR_Opr tmp = FrameMap::R0_opr;
295 __ load(new LIR_Address(base, disp, type), tmp, info);
296 __ cmp(condition, reg, tmp);
297 }
298
299
300 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
301 assert(left != result, "should be different registers");
302 if (is_power_of_2(c + 1)) {
303 __ shift_left(left, log2_intptr(c + 1), result);
304 __ sub(result, left, result);
305 return true;
306 } else if (is_power_of_2(c - 1)) {
307 __ shift_left(left, log2_intptr(c - 1), result);
308 __ add(result, left, result);
309 return true;
310 }
311 return false;
312 }
313
314
315 void LIRGenerator::store_stack_parameter(LIR_Opr item, ByteSize offset_from_sp) {
316 BasicType t = item->type();
317 LIR_Opr sp_opr = FrameMap::SP_opr;
318 if ((t == T_LONG || t == T_DOUBLE) &&
319 ((in_bytes(offset_from_sp) - STACK_BIAS) % 8 != 0)) {
320 __ unaligned_move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
321 } else {
322 __ move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
323 }
324 }
325
326
327 //----------------------------------------------------------------------
328 // visitor functions
329 //----------------------------------------------------------------------
330
331 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
332 assert(x->is_pinned(),"");
333 bool needs_range_check = x->compute_needs_range_check();
334 bool use_length = x->length() != NULL;
335 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
336 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
337 !get_jobject_constant(x->value())->is_null_object() ||
338 x->should_profile());
339
340 LIRItem array(x->array(), this);
341 LIRItem index(x->index(), this);
342 LIRItem value(x->value(), this);
343 LIRItem length(this);
344
345 array.load_item();
346 index.load_nonconstant();
347
348 if (use_length && needs_range_check) {
349 length.set_instruction(x->length());
350 length.load_item();
351 }
352 if (needs_store_check || x->check_boolean()) {
353 value.load_item();
354 } else {
355 value.load_for_store(x->elt_type());
356 }
357
358 set_no_result(x);
359
360 // The CodeEmitInfo must be duplicated for each different
361 // LIR-instruction because spilling can occur anywhere between two
362 // instructions and so the debug information must be different.
363 CodeEmitInfo* range_check_info = state_for(x);
364 CodeEmitInfo* null_check_info = NULL;
365 if (x->needs_null_check()) {
366 null_check_info = new CodeEmitInfo(range_check_info);
367 }
368
369 // Emit array address setup early so it schedules better.
370 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
371
372 if (GenerateRangeChecks && needs_range_check) {
373 if (use_length) {
374 __ cmp(lir_cond_belowEqual, length.result(), index.result());
375 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
376 } else {
377 array_range_check(array.result(), index.result(), null_check_info, range_check_info);
378 // Range_check also does the null check.
379 null_check_info = NULL;
380 }
381 }
382
383 if (GenerateArrayStoreCheck && needs_store_check) {
384 // Following registers are used by slow_subtype_check:
385 LIR_Opr tmp1 = FrameMap::R4_opr; // super_klass
386 LIR_Opr tmp2 = FrameMap::R5_opr; // sub_klass
387 LIR_Opr tmp3 = FrameMap::R6_opr; // temp
388
389 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
390 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3,
391 store_check_info, x->profiled_method(), x->profiled_bci());
392 }
393
394 if (obj_store) {
395 // Needs GC write barriers.
396 pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
397 true /* do_load */, false /* patch */, NULL);
398 }
399 LIR_Opr result = maybe_mask_boolean(x, array.result(), value.result(), null_check_info);
400 __ move(result, array_addr, null_check_info);
401 if (obj_store) {
402 // Precise card mark.
403 post_barrier(LIR_OprFact::address(array_addr), value.result());
404 }
405 }
406
407
408 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
409 assert(x->is_pinned(),"");
410 LIRItem obj(x->obj(), this);
411 obj.load_item();
412
413 set_no_result(x);
414
415 // We use R4+R5 in order to get a temp effect. These regs are used in slow path (MonitorEnterStub).
416 LIR_Opr lock = FrameMap::R5_opr;
417 LIR_Opr scratch = FrameMap::R4_opr;
418 LIR_Opr hdr = FrameMap::R6_opr;
419
420 CodeEmitInfo* info_for_exception = NULL;
421 if (x->needs_null_check()) {
422 info_for_exception = state_for(x);
423 }
424
425 // This CodeEmitInfo must not have the xhandlers because here the
426 // object is already locked (xhandlers expects object to be unlocked).
427 CodeEmitInfo* info = state_for(x, x->state(), true);
428 monitor_enter(obj.result(), lock, hdr, scratch, x->monitor_no(), info_for_exception, info);
429 }
430
431
432 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
433 assert(x->is_pinned(),"");
434 LIRItem obj(x->obj(), this);
435 obj.dont_load_item();
436
437 set_no_result(x);
438 LIR_Opr lock = FrameMap::R5_opr;
439 LIR_Opr hdr = FrameMap::R4_opr; // Used for slow path (MonitorExitStub).
440 LIR_Opr obj_temp = FrameMap::R6_opr;
441 monitor_exit(obj_temp, lock, hdr, LIR_OprFact::illegalOpr, x->monitor_no());
442 }
443
444
445 // _ineg, _lneg, _fneg, _dneg
446 void LIRGenerator::do_NegateOp(NegateOp* x) {
447 LIRItem value(x->x(), this);
448 value.load_item();
449 LIR_Opr reg = rlock_result(x);
450 __ negate(value.result(), reg);
451 }
452
453
454 // for _fadd, _fmul, _fsub, _fdiv, _frem
455 // _dadd, _dmul, _dsub, _ddiv, _drem
456 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
457 switch (x->op()) {
458 case Bytecodes::_fadd:
459 case Bytecodes::_fmul:
460 case Bytecodes::_fsub:
461 case Bytecodes::_fdiv:
462 case Bytecodes::_dadd:
463 case Bytecodes::_dmul:
464 case Bytecodes::_dsub:
465 case Bytecodes::_ddiv: {
466 LIRItem left(x->x(), this);
467 LIRItem right(x->y(), this);
468 left.load_item();
469 right.load_item();
470 rlock_result(x);
471 arithmetic_op_fpu(x->op(), x->operand(), left.result(), right.result(), x->is_strictfp());
472 }
473 break;
474
475 case Bytecodes::_frem:
476 case Bytecodes::_drem: {
477 address entry = NULL;
478 switch (x->op()) {
479 case Bytecodes::_frem:
480 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
481 break;
482 case Bytecodes::_drem:
483 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
484 break;
485 default:
486 ShouldNotReachHere();
487 }
488 LIR_Opr result = call_runtime(x->x(), x->y(), entry, x->type(), NULL);
489 set_result(x, result);
490 }
491 break;
492
493 default: ShouldNotReachHere();
494 }
495 }
496
497
498 // for _ladd, _lmul, _lsub, _ldiv, _lrem
499 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
500 bool is_div_rem = x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem;
501
502 LIRItem right(x->y(), this);
503 // Missing test if instr is commutative and if we should swap.
504 if (right.value()->type()->as_LongConstant() &&
505 (x->op() == Bytecodes::_lsub && right.value()->type()->as_LongConstant()->value() == ((-1)<<15)) ) {
506 // Sub is implemented by addi and can't support min_simm16 as constant..
507 right.load_item();
508 } else {
509 right.load_nonconstant();
510 }
511 assert(right.is_constant() || right.is_register(), "wrong state of right");
512
513 if (is_div_rem) {
514 LIR_Opr divisor = right.result();
515 if (divisor->is_register()) {
516 CodeEmitInfo* null_check_info = state_for(x);
517 __ cmp(lir_cond_equal, divisor, LIR_OprFact::longConst(0));
518 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(null_check_info));
519 } else {
520 jlong const_divisor = divisor->as_constant_ptr()->as_jlong();
521 if (const_divisor == 0) {
522 CodeEmitInfo* null_check_info = state_for(x);
523 __ jump(new DivByZeroStub(null_check_info));
524 rlock_result(x);
525 __ move(LIR_OprFact::longConst(0), x->operand()); // dummy
526 return;
527 }
528 if (x->op() == Bytecodes::_lrem && !is_power_of_2(const_divisor) && const_divisor != -1) {
529 // Remainder computation would need additional tmp != R0.
530 right.load_item();
531 }
532 }
533 }
534
535 LIRItem left(x->x(), this);
536 left.load_item();
537 rlock_result(x);
538 if (is_div_rem) {
539 CodeEmitInfo* info = NULL; // Null check already done above.
540 LIR_Opr tmp = FrameMap::R0_opr;
541 if (x->op() == Bytecodes::_lrem) {
542 __ irem(left.result(), right.result(), x->operand(), tmp, info);
543 } else if (x->op() == Bytecodes::_ldiv) {
544 __ idiv(left.result(), right.result(), x->operand(), tmp, info);
545 }
546 } else {
547 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
548 }
549 }
550
551
552 // for: _iadd, _imul, _isub, _idiv, _irem
553 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
554 bool is_div_rem = x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem;
555
556 LIRItem right(x->y(), this);
557 // Missing test if instr is commutative and if we should swap.
558 if (right.value()->type()->as_IntConstant() &&
559 (x->op() == Bytecodes::_isub && right.value()->type()->as_IntConstant()->value() == ((-1)<<15)) ) {
560 // Sub is implemented by addi and can't support min_simm16 as constant.
561 right.load_item();
562 } else {
563 right.load_nonconstant();
564 }
565 assert(right.is_constant() || right.is_register(), "wrong state of right");
566
567 if (is_div_rem) {
568 LIR_Opr divisor = right.result();
569 if (divisor->is_register()) {
570 CodeEmitInfo* null_check_info = state_for(x);
571 __ cmp(lir_cond_equal, divisor, LIR_OprFact::intConst(0));
572 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(null_check_info));
573 } else {
574 jint const_divisor = divisor->as_constant_ptr()->as_jint();
575 if (const_divisor == 0) {
576 CodeEmitInfo* null_check_info = state_for(x);
577 __ jump(new DivByZeroStub(null_check_info));
578 rlock_result(x);
579 __ move(LIR_OprFact::intConst(0), x->operand()); // dummy
580 return;
581 }
582 if (x->op() == Bytecodes::_irem && !is_power_of_2(const_divisor) && const_divisor != -1) {
583 // Remainder computation would need additional tmp != R0.
584 right.load_item();
585 }
586 }
587 }
588
589 LIRItem left(x->x(), this);
590 left.load_item();
591 rlock_result(x);
592 if (is_div_rem) {
593 CodeEmitInfo* info = NULL; // Null check already done above.
594 LIR_Opr tmp = FrameMap::R0_opr;
595 if (x->op() == Bytecodes::_irem) {
596 __ irem(left.result(), right.result(), x->operand(), tmp, info);
597 } else if (x->op() == Bytecodes::_idiv) {
598 __ idiv(left.result(), right.result(), x->operand(), tmp, info);
599 }
600 } else {
601 arithmetic_op_int(x->op(), x->operand(), left.result(), right.result(), FrameMap::R0_opr);
602 }
603 }
604
605
606 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
607 ValueTag tag = x->type()->tag();
608 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
609 switch (tag) {
610 case floatTag:
611 case doubleTag: do_ArithmeticOp_FPU(x); return;
612 case longTag: do_ArithmeticOp_Long(x); return;
613 case intTag: do_ArithmeticOp_Int(x); return;
614 }
615 ShouldNotReachHere();
616 }
617
618
619 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
620 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
621 LIRItem value(x->x(), this);
622 LIRItem count(x->y(), this);
623 value.load_item();
624 LIR_Opr reg = rlock_result(x);
625 LIR_Opr mcount;
626 if (count.result()->is_register()) {
627 mcount = FrameMap::R0_opr;
628 } else {
629 mcount = LIR_OprFact::illegalOpr;
630 }
631 shift_op(x->op(), reg, value.result(), count.result(), mcount);
632 }
633
634
635 inline bool can_handle_logic_op_as_uimm(ValueType *type, Bytecodes::Code bc) {
636 jlong int_or_long_const;
637 if (type->as_IntConstant()) {
638 int_or_long_const = type->as_IntConstant()->value();
639 } else if (type->as_LongConstant()) {
640 int_or_long_const = type->as_LongConstant()->value();
641 } else if (type->as_ObjectConstant()) {
642 return type->as_ObjectConstant()->value()->is_null_object();
643 } else {
644 return false;
645 }
646
647 if (Assembler::is_uimm(int_or_long_const, 16)) return true;
648 if ((int_or_long_const & 0xFFFF) == 0 &&
649 Assembler::is_uimm((jlong)((julong)int_or_long_const >> 16), 16)) return true;
650
651 // see Assembler::andi
652 if (bc == Bytecodes::_iand &&
653 (is_power_of_2_long(int_or_long_const+1) ||
654 is_power_of_2_long(int_or_long_const) ||
655 is_power_of_2_long(-int_or_long_const))) return true;
656 if (bc == Bytecodes::_land &&
657 (is_power_of_2_long(int_or_long_const+1) ||
658 (Assembler::is_uimm(int_or_long_const, 32) && is_power_of_2_long(int_or_long_const)) ||
659 (int_or_long_const != min_jlong && is_power_of_2_long(-int_or_long_const)))) return true;
660
661 // special case: xor -1
662 if ((bc == Bytecodes::_ixor || bc == Bytecodes::_lxor) &&
663 int_or_long_const == -1) return true;
664 return false;
665 }
666
667
668 // _iand, _land, _ior, _lor, _ixor, _lxor
669 void LIRGenerator::do_LogicOp(LogicOp* x) {
670 LIRItem left(x->x(), this);
671 LIRItem right(x->y(), this);
672
673 left.load_item();
674
675 Value rval = right.value();
676 LIR_Opr r = rval->operand();
677 ValueType *type = rval->type();
678 // Logic instructions use unsigned immediate values.
679 if (can_handle_logic_op_as_uimm(type, x->op())) {
680 if (!r->is_constant()) {
681 r = LIR_OprFact::value_type(type);
682 rval->set_operand(r);
683 }
684 right.set_result(r);
685 } else {
686 right.load_item();
687 }
688
689 LIR_Opr reg = rlock_result(x);
690
691 logic_op(x->op(), reg, left.result(), right.result());
692 }
693
694
695 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
696 void LIRGenerator::do_CompareOp(CompareOp* x) {
697 LIRItem left(x->x(), this);
698 LIRItem right(x->y(), this);
699 left.load_item();
700 right.load_item();
701 LIR_Opr reg = rlock_result(x);
702 if (x->x()->type()->is_float_kind()) {
703 Bytecodes::Code code = x->op();
704 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
705 } else if (x->x()->type()->tag() == longTag) {
706 __ lcmp2int(left.result(), right.result(), reg);
707 } else {
708 Unimplemented();
709 }
710 }
711
712
713 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
714 assert(x->number_of_arguments() == 4, "wrong type");
715 LIRItem obj (x->argument_at(0), this); // object
716 LIRItem offset(x->argument_at(1), this); // offset of field
717 LIRItem cmp (x->argument_at(2), this); // Value to compare with field.
718 LIRItem val (x->argument_at(3), this); // Replace field with val if matches cmp.
719
720 LIR_Opr t1 = LIR_OprFact::illegalOpr;
721 LIR_Opr t2 = LIR_OprFact::illegalOpr;
722 LIR_Opr addr = new_pointer_register();
723
724 // Get address of field.
725 obj.load_item();
726 offset.load_item();
727 cmp.load_item();
728 val.load_item();
729
730 __ add(obj.result(), offset.result(), addr);
731
732 // Volatile load may be followed by Unsafe CAS.
733 if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
734 __ membar(); // To be safe. Unsafe semantics are unclear.
735 } else {
736 __ membar_release();
737 }
738
739 if (type == objectType) { // Write-barrier needed for Object fields.
740 // Only cmp value can get overwritten, no do_load required.
741 pre_barrier(LIR_OprFact::illegalOpr /* addr */, cmp.result() /* pre_val */,
742 false /* do_load */, false /* patch */, NULL);
743 }
744
745 if (type == objectType) {
746 if (UseCompressedOops) {
747 t1 = new_register(T_OBJECT);
748 t2 = new_register(T_OBJECT);
749 }
750 __ cas_obj(addr, cmp.result(), val.result(), t1, t2);
751 } else if (type == intType) {
752 __ cas_int(addr, cmp.result(), val.result(), t1, t2);
753 } else if (type == longType) {
754 __ cas_long(addr, cmp.result(), val.result(), t1, t2);
755 } else {
756 ShouldNotReachHere();
757 }
758 // Benerate conditional move of boolean result.
759 LIR_Opr result = rlock_result(x);
760 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
761 result, as_BasicType(type));
762 if (type == objectType) { // Write-barrier needed for Object fields.
763 // Precise card mark since could either be object or array.
764 post_barrier(addr, val.result());
765 }
766 }
767
768
769 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
770 switch (x->id()) {
771 case vmIntrinsics::_dabs: {
772 assert(x->number_of_arguments() == 1, "wrong type");
773 LIRItem value(x->argument_at(0), this);
774 value.load_item();
775 LIR_Opr dst = rlock_result(x);
776 __ abs(value.result(), dst, LIR_OprFact::illegalOpr);
777 break;
778 }
779 case vmIntrinsics::_dsqrt: {
780 if (VM_Version::has_fsqrt()) {
781 assert(x->number_of_arguments() == 1, "wrong type");
782 LIRItem value(x->argument_at(0), this);
783 value.load_item();
784 LIR_Opr dst = rlock_result(x);
785 __ sqrt(value.result(), dst, LIR_OprFact::illegalOpr);
786 break;
787 } // else fallthru
788 }
789 case vmIntrinsics::_dlog10: // fall through
790 case vmIntrinsics::_dlog: // fall through
791 case vmIntrinsics::_dsin: // fall through
792 case vmIntrinsics::_dtan: // fall through
793 case vmIntrinsics::_dcos: // fall through
794 case vmIntrinsics::_dexp: {
795 assert(x->number_of_arguments() == 1, "wrong type");
796
797 address runtime_entry = NULL;
798 switch (x->id()) {
799 case vmIntrinsics::_dsqrt:
800 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsqrt);
801 break;
802 case vmIntrinsics::_dsin:
803 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
804 break;
805 case vmIntrinsics::_dcos:
806 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
807 break;
808 case vmIntrinsics::_dtan:
809 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
810 break;
811 case vmIntrinsics::_dlog:
812 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
813 break;
814 case vmIntrinsics::_dlog10:
815 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
816 break;
817 case vmIntrinsics::_dexp:
818 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dexp);
819 break;
820 default:
821 ShouldNotReachHere();
822 }
823
824 LIR_Opr result = call_runtime(x->argument_at(0), runtime_entry, x->type(), NULL);
825 set_result(x, result);
826 break;
827 }
828 case vmIntrinsics::_dpow: {
829 assert(x->number_of_arguments() == 2, "wrong type");
830 address runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dpow);
831 LIR_Opr result = call_runtime(x->argument_at(0), x->argument_at(1), runtime_entry, x->type(), NULL);
832 set_result(x, result);
833 break;
834 }
835 }
836 }
837
838
839 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
840 assert(x->number_of_arguments() == 5, "wrong type");
841
842 // Make all state_for calls early since they can emit code.
843 CodeEmitInfo* info = state_for(x, x->state());
844
845 LIRItem src (x->argument_at(0), this);
846 LIRItem src_pos (x->argument_at(1), this);
847 LIRItem dst (x->argument_at(2), this);
848 LIRItem dst_pos (x->argument_at(3), this);
849 LIRItem length (x->argument_at(4), this);
850
851 // Load all values in callee_save_registers (C calling convention),
852 // as this makes the parameter passing to the fast case simpler.
853 src.load_item_force (FrameMap::R14_oop_opr);
854 src_pos.load_item_force (FrameMap::R15_opr);
855 dst.load_item_force (FrameMap::R17_oop_opr);
856 dst_pos.load_item_force (FrameMap::R18_opr);
857 length.load_item_force (FrameMap::R19_opr);
858 LIR_Opr tmp = FrameMap::R20_opr;
859
860 int flags;
861 ciArrayKlass* expected_type;
862 arraycopy_helper(x, &flags, &expected_type);
863
864 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(),
865 length.result(), tmp,
866 expected_type, flags, info);
867 set_no_result(x);
868 }
869
870
871 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
872 // _i2b, _i2c, _i2s
873 void LIRGenerator::do_Convert(Convert* x) {
874 if (!VM_Version::has_mtfprd()) {
875 switch (x->op()) {
876
877 // int -> float: force spill
878 case Bytecodes::_l2f: {
879 if (!VM_Version::has_fcfids()) { // fcfids is >= Power7 only
880 // fcfid+frsp needs fixup code to avoid rounding incompatibility.
881 address entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2f);
882 LIR_Opr result = call_runtime(x->value(), entry, x->type(), NULL);
883 set_result(x, result);
884 return;
885 } // else fallthru
886 }
887 case Bytecodes::_l2d: {
888 LIRItem value(x->value(), this);
889 LIR_Opr reg = rlock_result(x);
890 value.load_item();
891 LIR_Opr tmp = force_to_spill(value.result(), T_DOUBLE);
892 __ convert(x->op(), tmp, reg);
893 return;
894 }
895 case Bytecodes::_i2f:
896 case Bytecodes::_i2d: {
897 LIRItem value(x->value(), this);
898 LIR_Opr reg = rlock_result(x);
899 value.load_item();
900 // Convert i2l first.
901 LIR_Opr tmp1 = new_register(T_LONG);
902 __ convert(Bytecodes::_i2l, value.result(), tmp1);
903 LIR_Opr tmp2 = force_to_spill(tmp1, T_DOUBLE);
904 __ convert(x->op(), tmp2, reg);
905 return;
906 }
907
908 // float -> int: result will be stored
909 case Bytecodes::_f2l:
910 case Bytecodes::_d2l: {
911 LIRItem value(x->value(), this);
912 LIR_Opr reg = rlock_result(x);
913 value.set_destroys_register(); // USE_KILL
914 value.load_item();
915 set_vreg_flag(reg, must_start_in_memory);
916 __ convert(x->op(), value.result(), reg);
917 return;
918 }
919 case Bytecodes::_f2i:
920 case Bytecodes::_d2i: {
921 LIRItem value(x->value(), this);
922 LIR_Opr reg = rlock_result(x);
923 value.set_destroys_register(); // USE_KILL
924 value.load_item();
925 // Convert l2i afterwards.
926 LIR_Opr tmp1 = new_register(T_LONG);
927 set_vreg_flag(tmp1, must_start_in_memory);
928 __ convert(x->op(), value.result(), tmp1);
929 __ convert(Bytecodes::_l2i, tmp1, reg);
930 return;
931 }
932
933 // Within same category: just register conversions.
934 case Bytecodes::_i2b:
935 case Bytecodes::_i2c:
936 case Bytecodes::_i2s:
937 case Bytecodes::_i2l:
938 case Bytecodes::_l2i:
939 case Bytecodes::_f2d:
940 case Bytecodes::_d2f:
941 break;
942
943 default: ShouldNotReachHere();
944 }
945 }
946
947 // Register conversion.
948 LIRItem value(x->value(), this);
949 LIR_Opr reg = rlock_result(x);
950 value.load_item();
951 switch (x->op()) {
952 case Bytecodes::_f2l:
953 case Bytecodes::_d2l:
954 case Bytecodes::_f2i:
955 case Bytecodes::_d2i: value.set_destroys_register(); break; // USE_KILL
956 default: break;
957 }
958 __ convert(x->op(), value.result(), reg);
959 }
960
961
962 void LIRGenerator::do_NewInstance(NewInstance* x) {
963 // This instruction can be deoptimized in the slow path.
964 const LIR_Opr reg = result_register_for(x->type());
965 #ifndef PRODUCT
966 if (PrintNotLoaded && !x->klass()->is_loaded()) {
967 tty->print_cr(" ###class not loaded at new bci %d", x->printable_bci());
968 }
969 #endif
970 CodeEmitInfo* info = state_for(x, x->state());
971 LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path (NewInstanceStub).
972 LIR_Opr tmp1 = FrameMap::R5_oop_opr;
973 LIR_Opr tmp2 = FrameMap::R6_oop_opr;
974 LIR_Opr tmp3 = FrameMap::R7_oop_opr;
975 LIR_Opr tmp4 = FrameMap::R8_oop_opr;
976 new_instance(reg, x->klass(), x->is_unresolved(), tmp1, tmp2, tmp3, tmp4, klass_reg, info);
977
978 // Must prevent reordering of stores for object initialization
979 // with stores that publish the new object.
980 __ membar_storestore();
981 LIR_Opr result = rlock_result(x);
982 __ move(reg, result);
983 }
984
985
986 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
987 // Evaluate state_for early since it may emit code.
988 CodeEmitInfo* info = state_for(x, x->state());
989
990 LIRItem length(x->length(), this);
991 length.load_item();
992
993 LIR_Opr reg = result_register_for(x->type());
994 LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path (NewTypeArrayStub).
995 // We use R5 in order to get a temp effect. This reg is used in slow path (NewTypeArrayStub).
996 LIR_Opr tmp1 = FrameMap::R5_oop_opr;
997 LIR_Opr tmp2 = FrameMap::R6_oop_opr;
998 LIR_Opr tmp3 = FrameMap::R7_oop_opr;
999 LIR_Opr tmp4 = FrameMap::R8_oop_opr;
1000 LIR_Opr len = length.result();
1001 BasicType elem_type = x->elt_type();
1002
1003 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1004
1005 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1006 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1007
1008 // Must prevent reordering of stores for object initialization
1009 // with stores that publish the new object.
1010 __ membar_storestore();
1011 LIR_Opr result = rlock_result(x);
1012 __ move(reg, result);
1013 }
1014
1015
1016 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1017 // Evaluate state_for early since it may emit code.
1018 CodeEmitInfo* info = state_for(x, x->state());
1019 // In case of patching (i.e., object class is not yet loaded),
1020 // we need to reexecute the instruction and therefore provide
1021 // the state before the parameters have been consumed.
1022 CodeEmitInfo* patching_info = NULL;
1023 if (!x->klass()->is_loaded() || PatchALot) {
1024 patching_info = state_for(x, x->state_before());
1025 }
1026
1027 LIRItem length(x->length(), this);
1028 length.load_item();
1029
1030 const LIR_Opr reg = result_register_for(x->type());
1031 LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path (NewObjectArrayStub).
1032 // We use R5 in order to get a temp effect. This reg is used in slow path (NewObjectArrayStub).
1033 LIR_Opr tmp1 = FrameMap::R5_oop_opr;
1034 LIR_Opr tmp2 = FrameMap::R6_oop_opr;
1035 LIR_Opr tmp3 = FrameMap::R7_oop_opr;
1036 LIR_Opr tmp4 = FrameMap::R8_oop_opr;
1037 LIR_Opr len = length.result();
1038
1039 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1040 ciMetadata* obj = ciObjArrayKlass::make(x->klass());
1041 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1042 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1043 }
1044 klass2reg_with_patching(klass_reg, obj, patching_info);
1045 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1046
1047 // Must prevent reordering of stores for object initialization
1048 // with stores that publish the new object.
1049 __ membar_storestore();
1050 LIR_Opr result = rlock_result(x);
1051 __ move(reg, result);
1052 }
1053
1054
1055 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1056 Values* dims = x->dims();
1057 int i = dims->length();
1058 LIRItemList* items = new LIRItemList(i, i, NULL);
1059 while (i-- > 0) {
1060 LIRItem* size = new LIRItem(dims->at(i), this);
1061 items->at_put(i, size);
1062 }
1063
1064 // Evaluate state_for early since it may emit code.
1065 CodeEmitInfo* patching_info = NULL;
1066 if (!x->klass()->is_loaded() || PatchALot) {
1067 patching_info = state_for(x, x->state_before());
1068
1069 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1070 // clone all handlers (NOTE: Usually this is handled transparently
1071 // by the CodeEmitInfo cloning logic in CodeStub constructors but
1072 // is done explicitly here because a stub isn't being used).
1073 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1074 }
1075 CodeEmitInfo* info = state_for(x, x->state());
1076
1077 i = dims->length();
1078 while (i-- > 0) {
1079 LIRItem* size = items->at(i);
1080 size->load_nonconstant();
1081 // FrameMap::_reserved_argument_area_size includes the dimensions
1082 // varargs, because it's initialized to hir()->max_stack() when the
1083 // FrameMap is created.
1084 store_stack_parameter(size->result(), in_ByteSize(i*sizeof(jint) + FrameMap::first_available_sp_in_frame));
1085 }
1086
1087 const LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path.
1088 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1089
1090 LIR_Opr rank = FrameMap::R5_opr; // Used by slow path.
1091 __ move(LIR_OprFact::intConst(x->rank()), rank);
1092
1093 LIR_Opr varargs = FrameMap::as_pointer_opr(R6); // Used by slow path.
1094 __ leal(LIR_OprFact::address(new LIR_Address(FrameMap::SP_opr, FrameMap::first_available_sp_in_frame, T_INT)),
1095 varargs);
1096
1097 // Note: This instruction can be deoptimized in the slow path.
1098 LIR_OprList* args = new LIR_OprList(3);
1099 args->append(klass_reg);
1100 args->append(rank);
1101 args->append(varargs);
1102 const LIR_Opr reg = result_register_for(x->type());
1103 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1104 LIR_OprFact::illegalOpr,
1105 reg, args, info);
1106
1107 // Must prevent reordering of stores for object initialization
1108 // with stores that publish the new object.
1109 __ membar_storestore();
1110 LIR_Opr result = rlock_result(x);
1111 __ move(reg, result);
1112 }
1113
1114
1115 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1116 // nothing to do for now
1117 }
1118
1119
1120 void LIRGenerator::do_CheckCast(CheckCast* x) {
1121 LIRItem obj(x->obj(), this);
1122 CodeEmitInfo* patching_info = NULL;
1123 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
1124 // Must do this before locking the destination register as
1125 // an oop register, and before the obj is loaded (so x->obj()->item()
1126 // is valid for creating a debug info location).
1127 patching_info = state_for(x, x->state_before());
1128 }
1129 obj.load_item();
1130 LIR_Opr out_reg = rlock_result(x);
1131 CodeStub* stub;
1132 CodeEmitInfo* info_for_exception =
1133 (x->needs_exception_state() ? state_for(x) :
1134 state_for(x, x->state_before(), true /*ignore_xhandler*/));
1135
1136 if (x->is_incompatible_class_change_check()) {
1137 assert(patching_info == NULL, "can't patch this");
1138 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id,
1139 LIR_OprFact::illegalOpr, info_for_exception);
1140 } else if (x->is_invokespecial_receiver_check()) {
1141 assert(patching_info == NULL, "can't patch this");
1142 stub = new DeoptimizeStub(info_for_exception,
1143 Deoptimization::Reason_class_check,
1144 Deoptimization::Action_none);
1145 } else {
1146 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1147 }
1148 // Following registers are used by slow_subtype_check:
1149 LIR_Opr tmp1 = FrameMap::R4_oop_opr; // super_klass
1150 LIR_Opr tmp2 = FrameMap::R5_oop_opr; // sub_klass
1151 LIR_Opr tmp3 = FrameMap::R6_oop_opr; // temp
1152 __ checkcast(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
1153 x->direct_compare(), info_for_exception, patching_info, stub,
1154 x->profiled_method(), x->profiled_bci());
1155 }
1156
1157
1158 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1159 LIRItem obj(x->obj(), this);
1160 CodeEmitInfo* patching_info = NULL;
1161 if (!x->klass()->is_loaded() || PatchALot) {
1162 patching_info = state_for(x, x->state_before());
1163 }
1164 // Ensure the result register is not the input register because the
1165 // result is initialized before the patching safepoint.
1166 obj.load_item();
1167 LIR_Opr out_reg = rlock_result(x);
1168 // Following registers are used by slow_subtype_check:
1169 LIR_Opr tmp1 = FrameMap::R4_oop_opr; // super_klass
1170 LIR_Opr tmp2 = FrameMap::R5_oop_opr; // sub_klass
1171 LIR_Opr tmp3 = FrameMap::R6_oop_opr; // temp
1172 __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
1173 x->direct_compare(), patching_info,
1174 x->profiled_method(), x->profiled_bci());
1175 }
1176
1177
1178 void LIRGenerator::do_If(If* x) {
1179 assert(x->number_of_sux() == 2, "inconsistency");
1180 ValueTag tag = x->x()->type()->tag();
1181 LIRItem xitem(x->x(), this);
1182 LIRItem yitem(x->y(), this);
1183 LIRItem* xin = &xitem;
1184 LIRItem* yin = &yitem;
1185 If::Condition cond = x->cond();
1186
1187 LIR_Opr left = LIR_OprFact::illegalOpr;
1188 LIR_Opr right = LIR_OprFact::illegalOpr;
1189
1190 xin->load_item();
1191 left = xin->result();
1192
1193 if (yin->result()->is_constant() && yin->result()->type() == T_INT &&
1194 Assembler::is_simm16(yin->result()->as_constant_ptr()->as_jint())) {
1195 // Inline int constants which are small enough to be immediate operands.
1196 right = LIR_OprFact::value_type(yin->value()->type());
1197 } else if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 &&
1198 (cond == If::eql || cond == If::neq)) {
1199 // Inline long zero.
1200 right = LIR_OprFact::value_type(yin->value()->type());
1201 } else if (tag == objectTag && yin->is_constant() && (yin->get_jobject_constant()->is_null_object())) {
1202 right = LIR_OprFact::value_type(yin->value()->type());
1203 } else {
1204 yin->load_item();
1205 right = yin->result();
1206 }
1207 set_no_result(x);
1208
1209 // Add safepoint before generating condition code so it can be recomputed.
1210 if (x->is_safepoint()) {
1211 // Increment backedge counter if needed.
1212 increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
1213 __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1214 }
1215
1216 __ cmp(lir_cond(cond), left, right);
1217 // Generate branch profiling. Profiling code doesn't kill flags.
1218 profile_branch(x, cond);
1219 move_to_phi(x->state());
1220 if (x->x()->type()->is_float_kind()) {
1221 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1222 } else {
1223 __ branch(lir_cond(cond), right->type(), x->tsux());
1224 }
1225 assert(x->default_sux() == x->fsux(), "wrong destination above");
1226 __ jump(x->default_sux());
1227 }
1228
1229
1230 LIR_Opr LIRGenerator::getThreadPointer() {
1231 return FrameMap::as_pointer_opr(R16_thread);
1232 }
1233
1234
1235 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1236 LIR_Opr arg1 = FrameMap::R3_opr; // ARG1
1237 __ move(LIR_OprFact::intConst(block->block_id()), arg1);
1238 LIR_OprList* args = new LIR_OprList(1);
1239 args->append(arg1);
1240 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1241 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1242 }
1243
1244
1245 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1246 CodeEmitInfo* info) {
1247 #ifdef _LP64
1248 __ store(value, address, info);
1249 #else
1250 Unimplemented();
1251 // __ volatile_store_mem_reg(value, address, info);
1252 #endif
1253 }
1254
1255 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1256 CodeEmitInfo* info) {
1257 #ifdef _LP64
1258 __ load(address, result, info);
1259 #else
1260 Unimplemented();
1261 // __ volatile_load_mem_reg(address, result, info);
1262 #endif
1263 }
1264
1265
1266 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1267 BasicType type, bool is_volatile) {
1268 LIR_Opr base_op = src;
1269 LIR_Opr index_op = offset;
1270
1271 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1272 #ifndef _LP64
1273 if (is_volatile && type == T_LONG) {
1274 __ volatile_store_unsafe_reg(data, src, offset, type, NULL, lir_patch_none);
1275 } else
1276 #endif
1277 {
1278 if (type == T_BOOLEAN) {
1279 type = T_BYTE;
1280 }
1281 LIR_Address* addr;
1282 if (type == T_ARRAY || type == T_OBJECT) {
1283 LIR_Opr tmp = new_pointer_register();
1284 __ add(base_op, index_op, tmp);
1285 addr = new LIR_Address(tmp, type);
1286 } else {
1287 addr = new LIR_Address(base_op, index_op, type);
1288 }
1289
1290 if (is_obj) {
1291 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1292 true /* do_load */, false /* patch */, NULL);
1293 // _bs->c1_write_barrier_pre(this, LIR_OprFact::address(addr));
1294 }
1295 __ move(data, addr);
1296 if (is_obj) {
1297 // This address is precise.
1298 post_barrier(LIR_OprFact::address(addr), data);
1299 }
1300 }
1301 }
1302
1303
1304 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
1305 BasicType type, bool is_volatile) {
1306 #ifndef _LP64
1307 if (is_volatile && type == T_LONG) {
1308 __ volatile_load_unsafe_reg(src, offset, dst, type, NULL, lir_patch_none);
1309 } else
1310 #endif
1311 {
1312 LIR_Address* addr = new LIR_Address(src, offset, type);
1313 __ load(addr, dst);
1314 }
1315 }
1316
1317
1318 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) {
1319 BasicType type = x->basic_type();
1320 LIRItem src(x->object(), this);
1321 LIRItem off(x->offset(), this);
1322 LIRItem value(x->value(), this);
1323
1324 src.load_item();
1325 value.load_item();
1326 off.load_nonconstant();
1327
1328 LIR_Opr dst = rlock_result(x, type);
1329 LIR_Opr data = value.result();
1330 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1331
1332 LIR_Opr tmp = FrameMap::R0_opr;
1333 LIR_Opr ptr = new_pointer_register();
1334 __ add(src.result(), off.result(), ptr);
1335
1336 if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
1337 __ membar();
1338 } else {
1339 __ membar_release();
1340 }
1341
1342 if (x->is_add()) {
1343 __ xadd(ptr, data, dst, tmp);
1344 } else {
1345 const bool can_move_barrier = true; // TODO: port GraphKit::can_move_pre_barrier() from C2
1346 if (!can_move_barrier && is_obj) {
1347 // Do the pre-write barrier, if any.
1348 pre_barrier(ptr, LIR_OprFact::illegalOpr /* pre_val */,
1349 true /* do_load */, false /* patch */, NULL);
1350 }
1351 __ xchg(ptr, data, dst, tmp);
1352 if (is_obj) {
1353 // Seems to be a precise address.
1354 post_barrier(ptr, data);
1355 if (can_move_barrier) {
1356 pre_barrier(LIR_OprFact::illegalOpr, dst /* pre_val */,
1357 false /* do_load */, false /* patch */, NULL);
1358 }
1359 }
1360 }
1361
1362 if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
1363 __ membar_acquire();
1364 } else {
1365 __ membar();
1366 }
1367 }
1368
1369
1370 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1371 assert(UseCRC32Intrinsics, "or should not be here");
1372 LIR_Opr result = rlock_result(x);
1373
1374 switch (x->id()) {
1375 case vmIntrinsics::_updateCRC32: {
1376 LIRItem crc(x->argument_at(0), this);
1377 LIRItem val(x->argument_at(1), this);
1378 // Registers destroyed by update_crc32.
1379 crc.set_destroys_register();
1380 val.set_destroys_register();
1381 crc.load_item();
1382 val.load_item();
1383 __ update_crc32(crc.result(), val.result(), result);
1384 break;
1385 }
1386 case vmIntrinsics::_updateBytesCRC32:
1387 case vmIntrinsics::_updateByteBufferCRC32: {
1388 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1389
1390 LIRItem crc(x->argument_at(0), this);
1391 LIRItem buf(x->argument_at(1), this);
1392 LIRItem off(x->argument_at(2), this);
1393 LIRItem len(x->argument_at(3), this);
1394 buf.load_item();
1395 off.load_nonconstant();
1396
1397 LIR_Opr index = off.result();
1398 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1399 if (off.result()->is_constant()) {
1400 index = LIR_OprFact::illegalOpr;
1401 offset += off.result()->as_jint();
1402 }
1403 LIR_Opr base_op = buf.result();
1404 LIR_Address* a = NULL;
1405
1406 if (index->is_valid()) {
1407 LIR_Opr tmp = new_register(T_LONG);
1408 __ convert(Bytecodes::_i2l, index, tmp);
1409 index = tmp;
1410 __ add(index, LIR_OprFact::intptrConst(offset), index);
1411 a = new LIR_Address(base_op, index, T_BYTE);
1412 } else {
1413 a = new LIR_Address(base_op, offset, T_BYTE);
1414 }
1415
1416 BasicTypeList signature(3);
1417 signature.append(T_INT);
1418 signature.append(T_ADDRESS);
1419 signature.append(T_INT);
1420 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1421 const LIR_Opr result_reg = result_register_for(x->type());
1422
1423 LIR_Opr arg1 = cc->at(0),
1424 arg2 = cc->at(1),
1425 arg3 = cc->at(2);
1426
1427 crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32 stub doesn't care about high bits.
1428 __ leal(LIR_OprFact::address(a), arg2);
1429 len.load_item_force(arg3); // We skip int->long conversion here, , because CRC32 stub expects int.
1430
1431 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1432 __ move(result_reg, result);
1433 break;
1434 }
1435 default: {
1436 ShouldNotReachHere();
1437 }
1438 }
1439 }
1440
1441 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1442 assert(UseCRC32CIntrinsics, "or should not be here");
1443 LIR_Opr result = rlock_result(x);
1444
1445 switch (x->id()) {
1446 case vmIntrinsics::_updateBytesCRC32C:
1447 case vmIntrinsics::_updateDirectByteBufferCRC32C: {
1448 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32C);
1449
1450 LIRItem crc(x->argument_at(0), this);
1451 LIRItem buf(x->argument_at(1), this);
1452 LIRItem off(x->argument_at(2), this);
1453 LIRItem end(x->argument_at(3), this);
1454 buf.load_item();
1455 off.load_nonconstant();
1456 end.load_nonconstant();
1457
1458 // len = end - off
1459 LIR_Opr len = end.result();
1460 LIR_Opr tmpA = new_register(T_INT);
1461 LIR_Opr tmpB = new_register(T_INT);
1462 __ move(end.result(), tmpA);
1463 __ move(off.result(), tmpB);
1464 __ sub(tmpA, tmpB, tmpA);
1465 len = tmpA;
1466
1467 LIR_Opr index = off.result();
1468 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1469 if (off.result()->is_constant()) {
1470 index = LIR_OprFact::illegalOpr;
1471 offset += off.result()->as_jint();
1472 }
1473 LIR_Opr base_op = buf.result();
1474 LIR_Address* a = NULL;
1475
1476 if (index->is_valid()) {
1477 LIR_Opr tmp = new_register(T_LONG);
1478 __ convert(Bytecodes::_i2l, index, tmp);
1479 index = tmp;
1480 __ add(index, LIR_OprFact::intptrConst(offset), index);
1481 a = new LIR_Address(base_op, index, T_BYTE);
1482 } else {
1483 a = new LIR_Address(base_op, offset, T_BYTE);
1484 }
1485
1486 BasicTypeList signature(3);
1487 signature.append(T_INT);
1488 signature.append(T_ADDRESS);
1489 signature.append(T_INT);
1490 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1491 const LIR_Opr result_reg = result_register_for(x->type());
1492
1493 LIR_Opr arg1 = cc->at(0),
1494 arg2 = cc->at(1),
1495 arg3 = cc->at(2);
1496
1497 crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32C stub doesn't care about high bits.
1498 __ leal(LIR_OprFact::address(a), arg2);
1499 __ move(len, cc->at(2)); // We skip int->long conversion here, because CRC32C stub expects int.
1500
1501 __ call_runtime_leaf(StubRoutines::updateBytesCRC32C(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1502 __ move(result_reg, result);
1503 break;
1504 }
1505 default: {
1506 ShouldNotReachHere();
1507 }
1508 }
1509 }
1510
1511 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
1512 assert(x->number_of_arguments() == 3, "wrong type");
1513 assert(UseFMA, "Needs FMA instructions support.");
1514 LIRItem value(x->argument_at(0), this);
1515 LIRItem value1(x->argument_at(1), this);
1516 LIRItem value2(x->argument_at(2), this);
1517
1518 value.load_item();
1519 value1.load_item();
1520 value2.load_item();
1521
1522 LIR_Opr calc_input = value.result();
1523 LIR_Opr calc_input1 = value1.result();
1524 LIR_Opr calc_input2 = value2.result();
1525 LIR_Opr calc_result = rlock_result(x);
1526
1527 switch (x->id()) {
1528 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
1529 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
1530 default: ShouldNotReachHere();
1531 }
1532 }
1533
1534 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1535 fatal("vectorizedMismatch intrinsic is not implemented on this platform");
1536 }